Line data    Source code

       1            0 : /*
       2              :  * Copyright (c) 2023 Carlo Caione <ccaione@baylibre.com>
       3              :  * Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
       4              :  *
       5              :  * SPDX-License-Identifier: Apache-2.0
       6              :  */
       7              : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_MEM_ATTR_ARM_H_
       8              : #define ZEPHYR_INCLUDE_DT_BINDINGS_MEM_ATTR_ARM_H_
       9              : 
      10              : #include <zephyr/sys/util_macro.h>
      11              : #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
      12              : 
      13              : /*
      14              :  * Architecture specific ARM MPU related attributes.
      15              :  *
      16              :  * This list is to seamlessly support the MPU regions configuration using DT and
      17              :  * the `zephyr,memory-attr` property.
      18              :  *
      19              :  * This is legacy and it should NOT be extended further. If new MPU region
      20              :  * types must be added, these must rely on the generic memory attributes.
      21              :  */
      22            0 : #define DT_MEM_ARM_MASK   DT_MEM_ARCH_ATTR_MASK
      23            0 : #define DT_MEM_ARM_GET(x) ((x) & DT_MEM_ARM_MASK)
      24            0 : #define DT_MEM_ARM(x)     ((x) << DT_MEM_ARCH_ATTR_SHIFT)
      25              : 
      26            0 : #define ATTR_MPU_RAM         BIT(0)
      27            0 : #define ATTR_MPU_RAM_NOCACHE BIT(1)
      28            0 : #define ATTR_MPU_FLASH       BIT(2)
      29            0 : #define ATTR_MPU_PPB         BIT(3)
      30            0 : #define ATTR_MPU_IO          BIT(4)
      31            0 : #define ATTR_MPU_EXTMEM      BIT(5)
      32            0 : #define ATTR_MPU_RAM_PXN     BIT(6)
      33              : 
      34            0 : #define DT_MEM_ARM_MPU_RAM         DT_MEM_ARM(ATTR_MPU_RAM)
      35            0 : #define DT_MEM_ARM_MPU_RAM_NOCACHE DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE)
      36            0 : #define DT_MEM_ARM_MPU_FLASH       DT_MEM_ARM(ATTR_MPU_FLASH)
      37            0 : #define DT_MEM_ARM_MPU_PPB         DT_MEM_ARM(ATTR_MPU_PPB)
      38            0 : #define DT_MEM_ARM_MPU_IO          DT_MEM_ARM(ATTR_MPU_IO)
      39            0 : #define DT_MEM_ARM_MPU_EXTMEM      DT_MEM_ARM(ATTR_MPU_EXTMEM)
      40            0 : #define DT_MEM_ARM_MPU_RAM_PXN     DT_MEM_ARM(ATTR_MPU_RAM_PXN)
      41            0 : #define DT_MEM_ARM_MPU_UNKNOWN     DT_MEM_ARCH_ATTR_UNKNOWN
      42              : 
      43              : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_MEM_ATTR_ARM_H_ */