Line data Source code
1 0 : /*
2 : * Copyright (c) 2023 Ambiq Micro Inc. <www.ambiq.com>
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 :
7 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_AMBIQ_APOLLO3_PINCTRL_H_
8 : #define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_AMBIQ_APOLLO3_PINCTRL_H_
9 :
10 0 : #define APOLLO3_ALT_FUNC_POS 0
11 0 : #define APOLLO3_ALT_FUNC_MASK 0xf
12 :
13 0 : #define APOLLO3_PIN_NUM_POS 4
14 0 : #define APOLLO3_PIN_NUM_MASK 0x7f
15 :
16 0 : #define APOLLO3_PINMUX(pin_num, alt_func) \
17 : (pin_num << APOLLO3_PIN_NUM_POS | alt_func << APOLLO3_ALT_FUNC_POS)
18 :
19 0 : #define SLSCL_P0 APOLLO3_PINMUX(0, 0)
20 0 : #define SLSCK_P0 APOLLO3_PINMUX(0, 1)
21 0 : #define CLKOUT_P0 APOLLO3_PINMUX(0, 2)
22 0 : #define GPIO_P0 APOLLO3_PINMUX(0, 3)
23 0 : #define MSPI0_4_P0 APOLLO3_PINMUX(0, 5)
24 0 : #define NCE0_P0 APOLLO3_PINMUX(0, 7)
25 0 : #define SLSDAWIR3_P1 APOLLO3_PINMUX(1, 0)
26 0 : #define SLMOSI_P1 APOLLO3_PINMUX(1, 1)
27 0 : #define UART0TX_P1 APOLLO3_PINMUX(1, 2)
28 0 : #define GPIO_P1 APOLLO3_PINMUX(1, 3)
29 0 : #define MSPI0_5_P1 APOLLO3_PINMUX(1, 5)
30 0 : #define NCE1_P1 APOLLO3_PINMUX(1, 7)
31 0 : #define UART1RX_P2 APOLLO3_PINMUX(2, 0)
32 0 : #define SLMISO_P2 APOLLO3_PINMUX(2, 1)
33 0 : #define UART0RX_P2 APOLLO3_PINMUX(2, 2)
34 0 : #define GPIO_P2 APOLLO3_PINMUX(2, 3)
35 0 : #define MSPI0_6_P2 APOLLO3_PINMUX(2, 5)
36 0 : #define NCE2_P2 APOLLO3_PINMUX(2, 7)
37 0 : #define UA0RTS_P3 APOLLO3_PINMUX(3, 0)
38 0 : #define SLNCE_P3 APOLLO3_PINMUX(3, 1)
39 0 : #define NCE3_P3 APOLLO3_PINMUX(3, 2)
40 0 : #define GPIO_P3 APOLLO3_PINMUX(3, 3)
41 0 : #define MSPI0_7_P3 APOLLO3_PINMUX(3, 5)
42 0 : #define TRIG1_P3 APOLLO3_PINMUX(3, 6)
43 0 : #define I2SWCLK_P3 APOLLO3_PINMUX(3, 7)
44 0 : #define UA0CTS_P4 APOLLO3_PINMUX(4, 0)
45 0 : #define SLINT_P4 APOLLO3_PINMUX(4, 1)
46 0 : #define NCE4_P4 APOLLO3_PINMUX(4, 2)
47 0 : #define GPIO_P4 APOLLO3_PINMUX(4, 3)
48 0 : #define UART1RX_P4 APOLLO3_PINMUX(4, 5)
49 0 : #define CTIM17_P4 APOLLO3_PINMUX(4, 6)
50 0 : #define MSPI0_2_P4 APOLLO3_PINMUX(4, 7)
51 0 : #define M0SCL_P5 APOLLO3_PINMUX(5, 0)
52 0 : #define M0SCK_P5 APOLLO3_PINMUX(5, 1)
53 0 : #define UA0RTS_P5 APOLLO3_PINMUX(5, 2)
54 0 : #define GPIO_P5 APOLLO3_PINMUX(5, 3)
55 0 : #define CT8_P5 APOLLO3_PINMUX(5, 7)
56 0 : #define M0SDAWIR3_P6 APOLLO3_PINMUX(6, 0)
57 0 : #define M0MISO_P6 APOLLO3_PINMUX(6, 1)
58 0 : #define UA0CTS_P6 APOLLO3_PINMUX(6, 2)
59 0 : #define GPIO_P6 APOLLO3_PINMUX(6, 3)
60 0 : #define CTIM10_P6 APOLLO3_PINMUX(6, 5)
61 0 : #define I2SDAT_P6 APOLLO3_PINMUX(6, 7)
62 0 : #define NCE7_P7 APOLLO3_PINMUX(7, 0)
63 0 : #define M0MOSI_P7 APOLLO3_PINMUX(7, 1)
64 0 : #define CLKOUT_P7 APOLLO3_PINMUX(7, 2)
65 0 : #define GPIO_P7 APOLLO3_PINMUX(7, 3)
66 0 : #define TRIG0_P7 APOLLO3_PINMUX(7, 4)
67 0 : #define UART0TX_P7 APOLLO3_PINMUX(7, 5)
68 0 : #define CTIM19_P7 APOLLO3_PINMUX(7, 7)
69 0 : #define M1SCL_P8 APOLLO3_PINMUX(8, 0)
70 0 : #define M1SCK_P8 APOLLO3_PINMUX(8, 1)
71 0 : #define NCE8_P8 APOLLO3_PINMUX(8, 2)
72 0 : #define GPIO_P8 APOLLO3_PINMUX(8, 3)
73 0 : #define SCCCLK_P8 APOLLO3_PINMUX(8, 4)
74 0 : #define UART1TX_P8 APOLLO3_PINMUX(8, 6)
75 0 : #define M1SDAWIR3_P9 APOLLO3_PINMUX(9, 0)
76 0 : #define M1MISO_P9 APOLLO3_PINMUX(9, 1)
77 0 : #define NCE9_P9 APOLLO3_PINMUX(9, 2)
78 0 : #define GPIO_P9 APOLLO3_PINMUX(9, 3)
79 0 : #define SCCIO_P9 APOLLO3_PINMUX(9, 4)
80 0 : #define UART1RX_P9 APOLLO3_PINMUX(9, 6)
81 0 : #define UART1TX_P10 APOLLO3_PINMUX(10, 0)
82 0 : #define M1MOSI_P10 APOLLO3_PINMUX(10, 1)
83 0 : #define NCE10_P10 APOLLO3_PINMUX(10, 2)
84 0 : #define GPIO_P10 APOLLO3_PINMUX(10, 3)
85 0 : #define PDMCLK_P10 APOLLO3_PINMUX(10, 4)
86 0 : #define UA1RTS_P10 APOLLO3_PINMUX(10, 6)
87 0 : #define ADCSE2_P11 APOLLO3_PINMUX(11, 0)
88 0 : #define NCE11_P11 APOLLO3_PINMUX(11, 1)
89 0 : #define CTIM31_P11 APOLLO3_PINMUX(11, 2)
90 0 : #define GPIO_P11 APOLLO3_PINMUX(11, 3)
91 0 : #define SLINT_P11 APOLLO3_PINMUX(11, 4)
92 0 : #define UA1CTS_P11 APOLLO3_PINMUX(11, 5)
93 0 : #define UART0RX_P11 APOLLO3_PINMUX(11, 6)
94 0 : #define PDMDATA_P11 APOLLO3_PINMUX(11, 7)
95 0 : #define ADCD0NSE9_P12 APOLLO3_PINMUX(12, 0)
96 0 : #define NCE12_P12 APOLLO3_PINMUX(12, 1)
97 0 : #define CT0_P12 APOLLO3_PINMUX(12, 2)
98 0 : #define GPIO_P12 APOLLO3_PINMUX(12, 3)
99 0 : #define PDMCLK_P12 APOLLO3_PINMUX(12, 5)
100 0 : #define UA0CTS_P12 APOLLO3_PINMUX(12, 6)
101 0 : #define UART1TX_P12 APOLLO3_PINMUX(12, 7)
102 0 : #define ADCD0PSE8_P13 APOLLO3_PINMUX(13, 0)
103 0 : #define NCE13_P13 APOLLO3_PINMUX(13, 1)
104 0 : #define CTIM2_P13 APOLLO3_PINMUX(13, 2)
105 0 : #define GPIO_P13 APOLLO3_PINMUX(13, 3)
106 0 : #define I2SBCLK_P13 APOLLO3_PINMUX(13, 4)
107 0 : #define UA0RTS_P13 APOLLO3_PINMUX(13, 6)
108 0 : #define UART1RX_P13 APOLLO3_PINMUX(13, 7)
109 0 : #define ADCD1P_P14 APOLLO3_PINMUX(14, 0)
110 0 : #define NCE14_P14 APOLLO3_PINMUX(14, 1)
111 0 : #define UART1TX_P14 APOLLO3_PINMUX(14, 2)
112 0 : #define GPIO_P14 APOLLO3_PINMUX(14, 3)
113 0 : #define PDMCLK_P14 APOLLO3_PINMUX(14, 4)
114 0 : #define SWDCK_P14 APOLLO3_PINMUX(14, 6)
115 0 : #define XT32KHz_P14 APOLLO3_PINMUX(14, 7)
116 0 : #define ADCD1N_P15 APOLLO3_PINMUX(15, 0)
117 0 : #define NCE15_P15 APOLLO3_PINMUX(15, 1)
118 0 : #define UART1RX_P15 APOLLO3_PINMUX(15, 2)
119 0 : #define GPIO_P15 APOLLO3_PINMUX(15, 3)
120 0 : #define PDMDATA_P15 APOLLO3_PINMUX(15, 4)
121 0 : #define SWDIO_P15 APOLLO3_PINMUX(15, 6)
122 0 : #define SWO_P15 APOLLO3_PINMUX(15, 7)
123 0 : #define ADCSE0_P16 APOLLO3_PINMUX(16, 0)
124 0 : #define NCE16_P16 APOLLO3_PINMUX(16, 1)
125 0 : #define TRIG0_P16 APOLLO3_PINMUX(16, 2)
126 0 : #define GPIO_P16 APOLLO3_PINMUX(16, 3)
127 0 : #define SCCRST_P16 APOLLO3_PINMUX(16, 4)
128 0 : #define CMPIN0_P16 APOLLO3_PINMUX(16, 5)
129 0 : #define UART0TX_P16 APOLLO3_PINMUX(16, 6)
130 0 : #define UA1RTS_P16 APOLLO3_PINMUX(16, 7)
131 0 : #define CMPRF1_P17 APOLLO3_PINMUX(17, 0)
132 0 : #define NCE17_P17 APOLLO3_PINMUX(17, 1)
133 0 : #define TRIG1_P17 APOLLO3_PINMUX(17, 2)
134 0 : #define GPIO_P17 APOLLO3_PINMUX(17, 3)
135 0 : #define SCCCLK_P17 APOLLO3_PINMUX(17, 4)
136 0 : #define UART0RX_P17 APOLLO3_PINMUX(17, 6)
137 0 : #define UA1CTS_P17 APOLLO3_PINMUX(17, 7)
138 0 : #define CMPIN1_P18 APOLLO3_PINMUX(18, 0)
139 0 : #define NCE18_P18 APOLLO3_PINMUX(18, 1)
140 0 : #define CTIM4_P18 APOLLO3_PINMUX(18, 2)
141 0 : #define GPIO_P18 APOLLO3_PINMUX(18, 3)
142 0 : #define UA0RTS_P18 APOLLO3_PINMUX(18, 4)
143 0 : #define UART1TX_P18 APOLLO3_PINMUX(18, 6)
144 0 : #define SCCIO_P18 APOLLO3_PINMUX(18, 7)
145 0 : #define CMPRF0_P19 APOLLO3_PINMUX(19, 0)
146 0 : #define NCE19_P19 APOLLO3_PINMUX(19, 1)
147 0 : #define CTIM6_P19 APOLLO3_PINMUX(19, 2)
148 0 : #define GPIO_P19 APOLLO3_PINMUX(19, 3)
149 0 : #define SCCCLK_P19 APOLLO3_PINMUX(19, 4)
150 0 : #define UART1RX_P19 APOLLO3_PINMUX(19, 6)
151 0 : #define I2SBCLK_P19 APOLLO3_PINMUX(19, 7)
152 0 : #define SWDCK_P20 APOLLO3_PINMUX(20, 0)
153 0 : #define NCE20_P20 APOLLO3_PINMUX(20, 1)
154 0 : #define GPIO_P20 APOLLO3_PINMUX(20, 3)
155 0 : #define UART0TX_P20 APOLLO3_PINMUX(20, 4)
156 0 : #define UART1TX_P20 APOLLO3_PINMUX(20, 5)
157 0 : #define I2SBCLK_P20 APOLLO3_PINMUX(20, 6)
158 0 : #define UA1RTS_P20 APOLLO3_PINMUX(20, 7)
159 0 : #define SWDIO_P21 APOLLO3_PINMUX(21, 0)
160 0 : #define NCE21_P21 APOLLO3_PINMUX(21, 1)
161 0 : #define GPIO_P21 APOLLO3_PINMUX(21, 3)
162 0 : #define UART0RX_P21 APOLLO3_PINMUX(21, 4)
163 0 : #define UART1RX_P21 APOLLO3_PINMUX(21, 5)
164 0 : #define SCCRST_P21 APOLLO3_PINMUX(21, 6)
165 0 : #define UA1CTS_P21 APOLLO3_PINMUX(21, 7)
166 0 : #define UART0TX_P22 APOLLO3_PINMUX(22, 0)
167 0 : #define NCE22_P22 APOLLO3_PINMUX(22, 1)
168 0 : #define CTIM12_P22 APOLLO3_PINMUX(22, 2)
169 0 : #define GPIO_P22 APOLLO3_PINMUX(22, 3)
170 0 : #define PDMCLK_P22 APOLLO3_PINMUX(22, 4)
171 0 : #define MSPI0_0_P22 APOLLO3_PINMUX(22, 6)
172 0 : #define SWO_P22 APOLLO3_PINMUX(22, 7)
173 0 : #define UART0RX_P23 APOLLO3_PINMUX(23, 0)
174 0 : #define NCE23_P23 APOLLO3_PINMUX(23, 1)
175 0 : #define CTIM14_P23 APOLLO3_PINMUX(23, 2)
176 0 : #define GPIO_P23 APOLLO3_PINMUX(23, 3)
177 0 : #define I2SWCLK_P23 APOLLO3_PINMUX(23, 4)
178 0 : #define CMPOUT_P23 APOLLO3_PINMUX(23, 5)
179 0 : #define MSPI0_3_P23 APOLLO3_PINMUX(23, 6)
180 0 : #define UART1TX_P24 APOLLO3_PINMUX(24, 0)
181 0 : #define NCE24_P24 APOLLO3_PINMUX(24, 1)
182 0 : #define MSPI0_8_P24 APOLLO3_PINMUX(24, 2)
183 0 : #define GPIO_P24 APOLLO3_PINMUX(24, 3)
184 0 : #define UA0CTS_P24 APOLLO3_PINMUX(24, 4)
185 0 : #define CTIM21_P24 APOLLO3_PINMUX(24, 5)
186 0 : #define XT32KHz_P24 APOLLO3_PINMUX(24, 6)
187 0 : #define SWO_P24 APOLLO3_PINMUX(24, 7)
188 0 : #define UART1RX_P25 APOLLO3_PINMUX(25, 0)
189 0 : #define NCE25_P25 APOLLO3_PINMUX(25, 1)
190 0 : #define CTIM1_P25 APOLLO3_PINMUX(25, 2)
191 0 : #define GPIO_P25 APOLLO3_PINMUX(25, 3)
192 0 : #define M2SDAWIR3_P25 APOLLO3_PINMUX(25, 4)
193 0 : #define M2MISO_P25 APOLLO3_PINMUX(25, 5)
194 0 : #define NCE26_P26 APOLLO3_PINMUX(26, 1)
195 0 : #define CTIM3_P26 APOLLO3_PINMUX(26, 2)
196 0 : #define GPIO_P26 APOLLO3_PINMUX(26, 3)
197 0 : #define SCCRST_P26 APOLLO3_PINMUX(26, 4)
198 0 : #define MSPI0_1_P26 APOLLO3_PINMUX(26, 5)
199 0 : #define UART0TX_P26 APOLLO3_PINMUX(26, 6)
200 0 : #define UA1CTS_P26 APOLLO3_PINMUX(26, 7)
201 0 : #define UART0RX_P27 APOLLO3_PINMUX(27, 0)
202 0 : #define NCE27_P27 APOLLO3_PINMUX(27, 1)
203 0 : #define CTIM5_P27 APOLLO3_PINMUX(27, 2)
204 0 : #define GPIO_P27 APOLLO3_PINMUX(27, 3)
205 0 : #define M2SCL_P27 APOLLO3_PINMUX(27, 4)
206 0 : #define M2SCK_P27 APOLLO3_PINMUX(27, 5)
207 0 : #define I2SWCLK_P28 APOLLO3_PINMUX(28, 0)
208 0 : #define NCE28_P28 APOLLO3_PINMUX(28, 1)
209 0 : #define CTIM7_P28 APOLLO3_PINMUX(28, 2)
210 0 : #define GPIO_P28 APOLLO3_PINMUX(28, 3)
211 0 : #define M2MOSI_P28 APOLLO3_PINMUX(28, 5)
212 0 : #define UART0TX_P28 APOLLO3_PINMUX(28, 6)
213 0 : #define ADCSE1_P29 APOLLO3_PINMUX(29, 0)
214 0 : #define NCE29_P29 APOLLO3_PINMUX(29, 1)
215 0 : #define CTIM9_P29 APOLLO3_PINMUX(29, 2)
216 0 : #define GPIO_P29 APOLLO3_PINMUX(29, 3)
217 0 : #define UA0CTS_P29 APOLLO3_PINMUX(29, 4)
218 0 : #define UA1CTS_P29 APOLLO3_PINMUX(29, 5)
219 0 : #define UART0RX_P29 APOLLO3_PINMUX(29, 6)
220 0 : #define PDMDATA_P29 APOLLO3_PINMUX(29, 7)
221 0 : #define NCE30_P30 APOLLO3_PINMUX(30, 1)
222 0 : #define CTIM11_P30 APOLLO3_PINMUX(30, 2)
223 0 : #define GPIO_P30 APOLLO3_PINMUX(30, 3)
224 0 : #define UART0TX_P30 APOLLO3_PINMUX(30, 4)
225 0 : #define UA1RTS_P30 APOLLO3_PINMUX(30, 5)
226 0 : #define BLEIF_SCK_P30 APOLLO3_PINMUX(30, 6)
227 0 : #define I2SDAT_P30 APOLLO3_PINMUX(30, 7)
228 0 : #define ADCSE3_P31 APOLLO3_PINMUX(31, 0)
229 0 : #define NCE31_P31 APOLLO3_PINMUX(31, 1)
230 0 : #define CTIM13_P31 APOLLO3_PINMUX(31, 2)
231 0 : #define GPIO_P31 APOLLO3_PINMUX(31, 3)
232 0 : #define UART0RX_P31 APOLLO3_PINMUX(31, 4)
233 0 : #define SCCCLK_P31 APOLLO3_PINMUX(31, 5)
234 0 : #define BLEIF_MISO_P31 APOLLO3_PINMUX(31, 6)
235 0 : #define UA1RTS_P31 APOLLO3_PINMUX(31, 7)
236 0 : #define ADCSE4_P32 APOLLO3_PINMUX(32, 0)
237 0 : #define NCE32_P32 APOLLO3_PINMUX(32, 1)
238 0 : #define CTIM15_P32 APOLLO3_PINMUX(32, 2)
239 0 : #define GPIO_P32 APOLLO3_PINMUX(32, 3)
240 0 : #define SCCIO_P32 APOLLO3_PINMUX(32, 4)
241 0 : #define BLEIF_MOSI_P32 APOLLO3_PINMUX(32, 6)
242 0 : #define UA1CTS_P32 APOLLO3_PINMUX(32, 7)
243 0 : #define ADCSE5_P33 APOLLO3_PINMUX(33, 0)
244 0 : #define NCE33_P33 APOLLO3_PINMUX(33, 1)
245 0 : #define XT32KHz_P33 APOLLO3_PINMUX(33, 2)
246 0 : #define GPIO_P33 APOLLO3_PINMUX(33, 3)
247 0 : #define BLEIF_CSN_P33 APOLLO3_PINMUX(33, 4)
248 0 : #define UA0CTS_P33 APOLLO3_PINMUX(33, 5)
249 0 : #define CTIM23_P33 APOLLO3_PINMUX(33, 6)
250 0 : #define SWO_P33 APOLLO3_PINMUX(33, 7)
251 0 : #define ADCSE6_P34 APOLLO3_PINMUX(34, 0)
252 0 : #define NCE34_P34 APOLLO3_PINMUX(34, 1)
253 0 : #define UA1RTS_P34 APOLLO3_PINMUX(34, 2)
254 0 : #define GPIO_P34 APOLLO3_PINMUX(34, 3)
255 0 : #define CMPRF2_P34 APOLLO3_PINMUX(34, 4)
256 0 : #define UA0RTS_P34 APOLLO3_PINMUX(34, 5)
257 0 : #define UART0RX_P34 APOLLO3_PINMUX(34, 6)
258 0 : #define PDMDATA_P34 APOLLO3_PINMUX(34, 7)
259 0 : #define ADCSE7_P35 APOLLO3_PINMUX(35, 0)
260 0 : #define NCE35_P35 APOLLO3_PINMUX(35, 1)
261 0 : #define UART1TX_P35 APOLLO3_PINMUX(35, 2)
262 0 : #define GPIO_P35 APOLLO3_PINMUX(35, 3)
263 0 : #define I2SDAT_P35 APOLLO3_PINMUX(35, 4)
264 0 : #define CTIM27_P35 APOLLO3_PINMUX(35, 5)
265 0 : #define UA0RTS_P35 APOLLO3_PINMUX(35, 6)
266 0 : #define BLEIF_STATUS_P35 APOLLO3_PINMUX(35, 7)
267 0 : #define TRIG1_P36 APOLLO3_PINMUX(36, 0)
268 0 : #define NCE36_P36 APOLLO3_PINMUX(36, 1)
269 0 : #define UART1RX_P36 APOLLO3_PINMUX(36, 2)
270 0 : #define GPIO_P36 APOLLO3_PINMUX(36, 3)
271 0 : #define XT32KHz_P36 APOLLO3_PINMUX(36, 4)
272 0 : #define UA1CTS_P36 APOLLO3_PINMUX(36, 5)
273 0 : #define UA0CTS_P36 APOLLO3_PINMUX(36, 6)
274 0 : #define PDMDATA_P36 APOLLO3_PINMUX(36, 7)
275 0 : #define TRIG2_P37 APOLLO3_PINMUX(37, 0)
276 0 : #define NCE37_P37 APOLLO3_PINMUX(37, 1)
277 0 : #define UA0RTS_P37 APOLLO3_PINMUX(37, 2)
278 0 : #define GPIO_P37 APOLLO3_PINMUX(37, 3)
279 0 : #define SCCIO_P37 APOLLO3_PINMUX(37, 4)
280 0 : #define UART1TX_P37 APOLLO3_PINMUX(37, 5)
281 0 : #define PDMCLK_P37 APOLLO3_PINMUX(37, 6)
282 0 : #define CTIM29_P37 APOLLO3_PINMUX(37, 7)
283 0 : #define TRIG3_P38 APOLLO3_PINMUX(38, 0)
284 0 : #define NCE38_P38 APOLLO3_PINMUX(38, 1)
285 0 : #define UA0CTS_P38 APOLLO3_PINMUX(38, 2)
286 0 : #define GPIO_P38 APOLLO3_PINMUX(38, 3)
287 0 : #define M3MOSI_P38 APOLLO3_PINMUX(38, 5)
288 0 : #define UART1RX_P38 APOLLO3_PINMUX(38, 6)
289 0 : #define UART0TX_P39 APOLLO3_PINMUX(39, 0)
290 0 : #define UART1TX_P39 APOLLO3_PINMUX(39, 1)
291 0 : #define CTIM25_P39 APOLLO3_PINMUX(39, 2)
292 0 : #define GPIO_P39 APOLLO3_PINMUX(39, 3)
293 0 : #define M4SCL_P39 APOLLO3_PINMUX(39, 4)
294 0 : #define M4SCK_P39 APOLLO3_PINMUX(39, 5)
295 0 : #define UART0RX_P40 APOLLO3_PINMUX(40, 0)
296 0 : #define UART1RX_P40 APOLLO3_PINMUX(40, 1)
297 0 : #define TRIG0_P40 APOLLO3_PINMUX(40, 2)
298 0 : #define GPIO_P40 APOLLO3_PINMUX(40, 3)
299 0 : #define M4SDAWIR3_P40 APOLLO3_PINMUX(40, 4)
300 0 : #define M4MISO_P40 APOLLO3_PINMUX(40, 5)
301 0 : #define NCE41_P41 APOLLO3_PINMUX(41, 0)
302 0 : #define BLEIF_IRQ_P41 APOLLO3_PINMUX(41, 1)
303 0 : #define SWO_P41 APOLLO3_PINMUX(41, 2)
304 0 : #define GPIO_P41 APOLLO3_PINMUX(41, 3)
305 0 : #define I2SWCLK_P41 APOLLO3_PINMUX(41, 4)
306 0 : #define UA1RTS_P41 APOLLO3_PINMUX(41, 5)
307 0 : #define UART0TX_P41 APOLLO3_PINMUX(41, 6)
308 0 : #define UA0RTS_P41 APOLLO3_PINMUX(41, 7)
309 0 : #define UART1TX_P42 APOLLO3_PINMUX(42, 0)
310 0 : #define NCE42_P42 APOLLO3_PINMUX(42, 1)
311 0 : #define CTIM16_P42 APOLLO3_PINMUX(42, 2)
312 0 : #define GPIO_P42 APOLLO3_PINMUX(42, 3)
313 0 : #define M3SCL_P42 APOLLO3_PINMUX(42, 4)
314 0 : #define M3SCK_P42 APOLLO3_PINMUX(42, 5)
315 0 : #define UART1RX_P43 APOLLO3_PINMUX(43, 0)
316 0 : #define NCE43_P43 APOLLO3_PINMUX(43, 1)
317 0 : #define CTIM18_P43 APOLLO3_PINMUX(43, 2)
318 0 : #define GPIO_P43 APOLLO3_PINMUX(43, 3)
319 0 : #define M3SDAWIR3_P43 APOLLO3_PINMUX(43, 4)
320 0 : #define M3MISO_P43 APOLLO3_PINMUX(43, 5)
321 0 : #define UA1RTS_P44 APOLLO3_PINMUX(44, 0)
322 0 : #define NCE44_P44 APOLLO3_PINMUX(44, 1)
323 0 : #define CTIM20_P44 APOLLO3_PINMUX(44, 2)
324 0 : #define GPIO_P44 APOLLO3_PINMUX(44, 3)
325 0 : #define M4MOSI_P44 APOLLO3_PINMUX(44, 5)
326 0 : #define UART0TX_P44 APOLLO3_PINMUX(44, 6)
327 0 : #define UA1CTS_P45 APOLLO3_PINMUX(45, 0)
328 0 : #define NCE45_P45 APOLLO3_PINMUX(45, 1)
329 0 : #define CTIM22_P45 APOLLO3_PINMUX(45, 2)
330 0 : #define GPIO_P45 APOLLO3_PINMUX(45, 3)
331 0 : #define I2SDAT_P45 APOLLO3_PINMUX(45, 4)
332 0 : #define PDMDATA_P45 APOLLO3_PINMUX(45, 5)
333 0 : #define UART0RX_P45 APOLLO3_PINMUX(45, 6)
334 0 : #define SWO_P45 APOLLO3_PINMUX(45, 7)
335 0 : #define I2SBCLK_P46 APOLLO3_PINMUX(46, 0)
336 0 : #define NCE46_P46 APOLLO3_PINMUX(46, 1)
337 0 : #define CTIM24_P46 APOLLO3_PINMUX(46, 2)
338 0 : #define GPIO_P46 APOLLO3_PINMUX(46, 3)
339 0 : #define SCCRST_P46 APOLLO3_PINMUX(46, 4)
340 0 : #define PDMCLK_P46 APOLLO3_PINMUX(46, 5)
341 0 : #define UART1TX_P46 APOLLO3_PINMUX(46, 6)
342 0 : #define SWO_P46 APOLLO3_PINMUX(46, 7)
343 0 : #define XT32KHz_P47 APOLLO3_PINMUX(47, 0)
344 0 : #define NCE47_P47 APOLLO3_PINMUX(47, 1)
345 0 : #define CTIM26_P47 APOLLO3_PINMUX(47, 2)
346 0 : #define GPIO_P47 APOLLO3_PINMUX(47, 3)
347 0 : #define M5MOSI_P47 APOLLO3_PINMUX(47, 5)
348 0 : #define UART1RX_P47 APOLLO3_PINMUX(47, 6)
349 0 : #define UART0TX_P48 APOLLO3_PINMUX(48, 0)
350 0 : #define NCE48_P48 APOLLO3_PINMUX(48, 1)
351 0 : #define CTIM28_P48 APOLLO3_PINMUX(48, 2)
352 0 : #define GPIO_P48 APOLLO3_PINMUX(48, 3)
353 0 : #define M5SCL_P48 APOLLO3_PINMUX(48, 4)
354 0 : #define M5SCK_P48 APOLLO3_PINMUX(48, 5)
355 0 : #define UART0RX_P49 APOLLO3_PINMUX(49, 0)
356 0 : #define NCE49_P49 APOLLO3_PINMUX(49, 1)
357 0 : #define CTIM30_P49 APOLLO3_PINMUX(49, 2)
358 0 : #define GPIO_P49 APOLLO3_PINMUX(49, 3)
359 0 : #define M5SDAWIR3_P49 APOLLO3_PINMUX(49, 4)
360 0 : #define M5MISO_P49 APOLLO3_PINMUX(49, 5)
361 0 : #define SWO_P50 APOLLO3_PINMUX(50, 0)
362 0 : #define NCE50_P50 APOLLO3_PINMUX(50, 1)
363 0 : #define CT0_P50 APOLLO3_PINMUX(50, 2)
364 0 : #define GPIO_P50 APOLLO3_PINMUX(50, 3)
365 0 : #define UART0TX_P50 APOLLO3_PINMUX(50, 4)
366 0 : #define UART0RX_P50 APOLLO3_PINMUX(50, 5)
367 0 : #define UART1TX_P50 APOLLO3_PINMUX(50, 6)
368 0 : #define UART1RX_P50 APOLLO3_PINMUX(50, 7)
369 0 : #define MSPI1_0_P51 APOLLO3_PINMUX(51, 0)
370 0 : #define NCE51_P51 APOLLO3_PINMUX(51, 1)
371 0 : #define CTIM1_P51 APOLLO3_PINMUX(51, 2)
372 0 : #define GPIO_P51 APOLLO3_PINMUX(51, 3)
373 0 : #define MSPI1_1_P52 APOLLO3_PINMUX(52, 0)
374 0 : #define NCE52_P52 APOLLO3_PINMUX(52, 1)
375 0 : #define CTIM2_P52 APOLLO3_PINMUX(52, 2)
376 0 : #define GPIO_P52 APOLLO3_PINMUX(52, 3)
377 0 : #define MSPI1_2_P53 APOLLO3_PINMUX(53, 0)
378 0 : #define NCE53_P53 APOLLO3_PINMUX(53, 1)
379 0 : #define CTIM3_P53 APOLLO3_PINMUX(53, 2)
380 0 : #define GPIO_P53 APOLLO3_PINMUX(53, 3)
381 0 : #define MSPI1_3_P54 APOLLO3_PINMUX(54, 0)
382 0 : #define NCE54_P54 APOLLO3_PINMUX(54, 1)
383 0 : #define CTIM4_P54 APOLLO3_PINMUX(54, 2)
384 0 : #define GPIO_P54 APOLLO3_PINMUX(54, 3)
385 0 : #define MSPI1_4_P55 APOLLO3_PINMUX(55, 0)
386 0 : #define NCE55_P55 APOLLO3_PINMUX(55, 1)
387 0 : #define CTIM5_P55 APOLLO3_PINMUX(55, 2)
388 0 : #define GPIO_P55 APOLLO3_PINMUX(55, 3)
389 0 : #define MSPI1_5_P56 APOLLO3_PINMUX(56, 0)
390 0 : #define NCE56_P56 APOLLO3_PINMUX(56, 1)
391 0 : #define CTIM6_P56 APOLLO3_PINMUX(56, 2)
392 0 : #define GPIO_P56 APOLLO3_PINMUX(56, 3)
393 0 : #define MSPI1_6_P57 APOLLO3_PINMUX(57, 0)
394 0 : #define NCE57_P57 APOLLO3_PINMUX(57, 1)
395 0 : #define CTIM7_P57 APOLLO3_PINMUX(57, 2)
396 0 : #define GPIO_P57 APOLLO3_PINMUX(57, 3)
397 0 : #define MSPI1_7_P58 APOLLO3_PINMUX(58, 0)
398 0 : #define NCE58_P58 APOLLO3_PINMUX(58, 1)
399 0 : #define CTIM8_P58 APOLLO3_PINMUX(58, 2)
400 0 : #define GPIO_P58 APOLLO3_PINMUX(58, 3)
401 0 : #define MSPI1_8_P59 APOLLO3_PINMUX(59, 0)
402 0 : #define NCE59_P59 APOLLO3_PINMUX(59, 1)
403 0 : #define CTIM9_P59 APOLLO3_PINMUX(59, 2)
404 0 : #define GPIO_P59 APOLLO3_PINMUX(59, 3)
405 0 : #define MSPI1_9_P60 APOLLO3_PINMUX(60, 0)
406 0 : #define NCE60_P60 APOLLO3_PINMUX(60, 1)
407 0 : #define CTIM10_P60 APOLLO3_PINMUX(60, 2)
408 0 : #define GPIO_P60 APOLLO3_PINMUX(60, 3)
409 0 : #define SWO_P61 APOLLO3_PINMUX(61, 0)
410 0 : #define NCE61_P61 APOLLO3_PINMUX(61, 1)
411 0 : #define CTIM11_P61 APOLLO3_PINMUX(61, 2)
412 0 : #define GPIO_P61 APOLLO3_PINMUX(61, 3)
413 0 : #define UART0TX_P61 APOLLO3_PINMUX(61, 4)
414 0 : #define UART0RX_P61 APOLLO3_PINMUX(61, 5)
415 0 : #define UART1TX_P61 APOLLO3_PINMUX(61, 6)
416 0 : #define UART1RX_P61 APOLLO3_PINMUX(61, 7)
417 0 : #define SWO_P62 APOLLO3_PINMUX(62, 0)
418 0 : #define NCE62_P62 APOLLO3_PINMUX(62, 1)
419 0 : #define CTIM12_P62 APOLLO3_PINMUX(62, 2)
420 0 : #define GPIO_P62 APOLLO3_PINMUX(62, 3)
421 0 : #define UA0CTS_P62 APOLLO3_PINMUX(62, 4)
422 0 : #define UA0RTS_P62 APOLLO3_PINMUX(62, 5)
423 0 : #define UA1CTS_P62 APOLLO3_PINMUX(62, 6)
424 0 : #define UA1RTS_P62 APOLLO3_PINMUX(62, 7)
425 0 : #define SWO_P63 APOLLO3_PINMUX(63, 0)
426 0 : #define NCE63_P63 APOLLO3_PINMUX(63, 1)
427 0 : #define CTIM13_P63 APOLLO3_PINMUX(63, 2)
428 0 : #define GPIO_P63 APOLLO3_PINMUX(63, 3)
429 0 : #define UA0CTS_P63 APOLLO3_PINMUX(63, 4)
430 0 : #define UA0RTS_P63 APOLLO3_PINMUX(63, 5)
431 0 : #define UA1CTS_P63 APOLLO3_PINMUX(63, 6)
432 0 : #define UA1RTS_P63 APOLLO3_PINMUX(63, 7)
433 0 : #define MSPI2_0_P64 APOLLO3_PINMUX(64, 0)
434 0 : #define NCE64_P64 APOLLO3_PINMUX(64, 1)
435 0 : #define CTIM14_P64 APOLLO3_PINMUX(64, 2)
436 0 : #define GPIO_P64 APOLLO3_PINMUX(64, 3)
437 0 : #define MSPI2_1_P65 APOLLO3_PINMUX(65, 0)
438 0 : #define NCE65_P65 APOLLO3_PINMUX(65, 1)
439 0 : #define CTIM15_P65 APOLLO3_PINMUX(65, 2)
440 0 : #define GPIO_P65 APOLLO3_PINMUX(65, 3)
441 0 : #define MSPI2_2_P66 APOLLO3_PINMUX(66, 0)
442 0 : #define NCE66_P66 APOLLO3_PINMUX(66, 1)
443 0 : #define CTIM16_P66 APOLLO3_PINMUX(66, 2)
444 0 : #define GPIO_P66 APOLLO3_PINMUX(66, 3)
445 0 : #define MSPI2_3_P67 APOLLO3_PINMUX(67, 0)
446 0 : #define NCE67_P67 APOLLO3_PINMUX(67, 1)
447 0 : #define CTIM17_P67 APOLLO3_PINMUX(67, 2)
448 0 : #define GPIO_P67 APOLLO3_PINMUX(67, 3)
449 0 : #define MSPI2_4_P68 APOLLO3_PINMUX(68, 0)
450 0 : #define NCE68_P68 APOLLO3_PINMUX(68, 1)
451 0 : #define CTIM18_P68 APOLLO3_PINMUX(68, 2)
452 0 : #define GPIO_P68 APOLLO3_PINMUX(68, 3)
453 0 : #define SWO_P69 APOLLO3_PINMUX(69, 0)
454 0 : #define NCE69_P69 APOLLO3_PINMUX(69, 1)
455 0 : #define CTIM19_P69 APOLLO3_PINMUX(69, 2)
456 0 : #define GPIO_P69 APOLLO3_PINMUX(69, 3)
457 0 : #define UART0TX_P69 APOLLO3_PINMUX(69, 4)
458 0 : #define UART0RX_P69 APOLLO3_PINMUX(69, 5)
459 0 : #define UART1TX_P69 APOLLO3_PINMUX(69, 6)
460 0 : #define UART1RX_P69 APOLLO3_PINMUX(69, 7)
461 0 : #define SWO_P70 APOLLO3_PINMUX(70, 0)
462 0 : #define NCE70_P70 APOLLO3_PINMUX(70, 1)
463 0 : #define CTIM20_P70 APOLLO3_PINMUX(70, 2)
464 0 : #define GPIO_P70 APOLLO3_PINMUX(70, 3)
465 0 : #define UART0TX_P70 APOLLO3_PINMUX(70, 4)
466 0 : #define UART0RX_P70 APOLLO3_PINMUX(70, 5)
467 0 : #define UART1TX_P70 APOLLO3_PINMUX(70, 6)
468 0 : #define UART1RX_P70 APOLLO3_PINMUX(70, 7)
469 0 : #define SWO_P71 APOLLO3_PINMUX(71, 0)
470 0 : #define NCE71_P71 APOLLO3_PINMUX(71, 1)
471 0 : #define CTIM21_P71 APOLLO3_PINMUX(71, 2)
472 0 : #define GPIO_P71 APOLLO3_PINMUX(71, 3)
473 0 : #define UART0TX_P71 APOLLO3_PINMUX(71, 4)
474 0 : #define UART0RX_P71 APOLLO3_PINMUX(71, 5)
475 0 : #define UART1TX_P71 APOLLO3_PINMUX(71, 6)
476 0 : #define UART1RX_P71 APOLLO3_PINMUX(71, 7)
477 0 : #define SWO_P72 APOLLO3_PINMUX(72, 0)
478 0 : #define NCE72_P72 APOLLO3_PINMUX(72, 1)
479 0 : #define CTIM22_P72 APOLLO3_PINMUX(72, 2)
480 0 : #define GPIO_P72 APOLLO3_PINMUX(72, 3)
481 0 : #define UART0TX_P72 APOLLO3_PINMUX(72, 4)
482 0 : #define UART0RX_P72 APOLLO3_PINMUX(72, 5)
483 0 : #define UART1TX_P72 APOLLO3_PINMUX(72, 6)
484 0 : #define UART1RX_P72 APOLLO3_PINMUX(72, 7)
485 0 : #define SWO_P73 APOLLO3_PINMUX(73, 0)
486 0 : #define NCE73_P73 APOLLO3_PINMUX(73, 1)
487 0 : #define CTIM23_P73 APOLLO3_PINMUX(73, 2)
488 0 : #define GPIO_P73 APOLLO3_PINMUX(73, 3)
489 0 : #define UA0CTS_P73 APOLLO3_PINMUX(73, 4)
490 0 : #define UA0RTS_P73 APOLLO3_PINMUX(73, 5)
491 0 : #define UA1CTS_P73 APOLLO3_PINMUX(73, 6)
492 0 : #define UA1RTS_P73 APOLLO3_PINMUX(73, 7)
493 :
494 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_AMBIQ_APOLLO3_PINCTRL_H_ */
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