Line data Source code
1 0 : /*
2 : * Copyright (c) 2023 IoT.bzh
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A779F0_H_
7 : #define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A779F0_H_
8 :
9 : #include "pinctrl-rcar-common.h"
10 :
11 : /* Pins declaration */
12 0 : #define PIN_NONE -1
13 0 : #define PIN_SCIF_CLK RCAR_GP_PIN(0, 0)
14 0 : #define PIN_HSCK0 RCAR_GP_PIN(0, 1)
15 0 : #define PIN_HRX0 RCAR_GP_PIN(0, 2)
16 0 : #define PIN_HTX0 RCAR_GP_PIN(0, 3)
17 0 : #define PIN_HCTS0_N RCAR_GP_PIN(0, 4)
18 0 : #define PIN_HRTS0_N RCAR_GP_PIN(0, 5)
19 0 : #define PIN_RX0 RCAR_GP_PIN(0, 6)
20 0 : #define PIN_TX0 RCAR_GP_PIN(0, 7)
21 0 : #define PIN_SCK0 RCAR_GP_PIN(0, 8)
22 0 : #define PIN_RTS0_N RCAR_GP_PIN(0, 9)
23 0 : #define PIN_CTS0_N RCAR_GP_PIN(0, 10)
24 0 : #define PIN_MSIOF0_SYNC RCAR_GP_PIN(0, 11)
25 0 : #define PIN_MSIOF0_RXD RCAR_GP_PIN(0, 12)
26 0 : #define PIN_MSIOF0_TXD RCAR_GP_PIN(0, 13)
27 0 : #define PIN_MSIOF0_SCK RCAR_GP_PIN(0, 14)
28 0 : #define PIN_MSIOF0_SS1 RCAR_GP_PIN(0, 15)
29 0 : #define PIN_MSIOF0_SS2 RCAR_GP_PIN(0, 16)
30 0 : #define PIN_IRQ0 RCAR_GP_PIN(0, 17)
31 0 : #define PIN_IRQ1 RCAR_GP_PIN(0, 18)
32 0 : #define PIN_IRQ2 RCAR_GP_PIN(0, 19)
33 0 : #define PIN_IRQ3 RCAR_GP_PIN(0, 20)
34 0 : #define PIN_GP1_00 RCAR_GP_PIN(1, 0)
35 0 : #define PIN_GP1_01 RCAR_GP_PIN(1, 1)
36 0 : #define PIN_GP1_02 RCAR_GP_PIN(1, 2)
37 0 : #define PIN_GP1_03 RCAR_GP_PIN(1, 3)
38 0 : #define PIN_GP1_04 RCAR_GP_PIN(1, 4)
39 0 : #define PIN_GP1_05 RCAR_GP_PIN(1, 5)
40 0 : #define PIN_GP1_06 RCAR_GP_PIN(1, 6)
41 0 : #define PIN_GP1_07 RCAR_GP_PIN(1, 7)
42 0 : #define PIN_GP1_08 RCAR_GP_PIN(1, 8)
43 0 : #define PIN_GP1_09 RCAR_GP_PIN(1, 9)
44 0 : #define PIN_GP1_10 RCAR_GP_PIN(1, 10)
45 0 : #define PIN_GP1_11 RCAR_GP_PIN(1, 11)
46 0 : #define PIN_MMC_SD_CLK RCAR_GP_PIN(1, 12)
47 0 : #define PIN_MMC_SD_D0 RCAR_GP_PIN(1, 13)
48 0 : #define PIN_MMC_SD_D1 RCAR_GP_PIN(1, 14)
49 0 : #define PIN_MMC_SD_D2 RCAR_GP_PIN(1, 15)
50 0 : #define PIN_MMC_SD_D3 RCAR_GP_PIN(1, 16)
51 0 : #define PIN_MMC_D5 RCAR_GP_PIN(1, 17)
52 0 : #define PIN_MMC_D4 RCAR_GP_PIN(1, 18)
53 0 : #define PIN_MMC_D6 RCAR_GP_PIN(1, 19)
54 0 : #define PIN_MMC_DS RCAR_GP_PIN(1, 20)
55 0 : #define PIN_MMC_D7 RCAR_GP_PIN(1, 21)
56 0 : #define PIN_MMC_SD_CMD RCAR_GP_PIN(1, 22)
57 0 : #define PIN_SD_CD RCAR_GP_PIN(1, 23)
58 0 : #define PIN_SD_WP RCAR_GP_PIN(1, 24)
59 0 : #define PIN_RPC_INT_N RCAR_GP_PIN(2, 0)
60 0 : #define PIN_RPC_WP_N RCAR_GP_PIN(2, 1)
61 0 : #define PIN_RPC_RESET_N RCAR_GP_PIN(2, 2)
62 0 : #define PIN_QSPI1_SSL RCAR_GP_PIN(2, 3)
63 0 : #define PIN_QSPI1_IO3 RCAR_GP_PIN(2, 4)
64 0 : #define PIN_QSPI1_MISO_IO1 RCAR_GP_PIN(2, 5)
65 0 : #define PIN_QSPI1_IO2 RCAR_GP_PIN(2, 6)
66 0 : #define PIN_QSPI1_MOSI_IO0 RCAR_GP_PIN(2, 7)
67 0 : #define PIN_QSPI1_SPCLK RCAR_GP_PIN(2, 8)
68 0 : #define PIN_QSPI0_MOSI_IO0 RCAR_GP_PIN(2, 9)
69 0 : #define PIN_QSPI0_SPCLK RCAR_GP_PIN(2, 10)
70 0 : #define PIN_QSPI0_IO2 RCAR_GP_PIN(2, 11)
71 0 : #define PIN_QSPI0_MISO_IO1 RCAR_GP_PIN(2, 12)
72 0 : #define PIN_QSPI0_SSL RCAR_GP_PIN(2, 13)
73 0 : #define PIN_QSPI0_IO3 RCAR_GP_PIN(2, 14)
74 0 : #define PIN_PCIE0_CLKREQ_N RCAR_GP_PIN(2, 15)
75 0 : #define PIN_PCIE1_CLKREQ_N RCAR_GP_PIN(2, 16)
76 0 : #define PIN_TSN1_MDIO RCAR_GP_PIN(3, 0)
77 0 : #define PIN_TSN2_MDIO RCAR_GP_PIN(3, 1)
78 0 : #define PIN_TSN0_MDIO RCAR_GP_PIN(3, 2)
79 0 : #define PIN_TSN2_MDC RCAR_GP_PIN(3, 3)
80 0 : #define PIN_TSN0_MDC RCAR_GP_PIN(3, 4)
81 0 : #define PIN_TSN1_MDC RCAR_GP_PIN(3, 5)
82 0 : #define PIN_TSN1_LINK RCAR_GP_PIN(3, 6)
83 0 : #define PIN_TSN2_LINK RCAR_GP_PIN(3, 7)
84 0 : #define PIN_TSN0_LINK RCAR_GP_PIN(3, 8)
85 0 : #define PIN_TSN2_PHY_INT RCAR_GP_PIN(3, 9)
86 0 : #define PIN_TSN0_PHY_INT RCAR_GP_PIN(3, 10)
87 0 : #define PIN_TSN1_PHY_INT RCAR_GP_PIN(3, 11)
88 0 : #define PIN_TSN0_MAGIC RCAR_GP_PIN(3, 12)
89 0 : #define PIN_TSN1_AVTP_PPS RCAR_GP_PIN(3, 13)
90 0 : #define PIN_TSN1_AVTP_MATCH RCAR_GP_PIN(3, 14)
91 0 : #define PIN_TSN1_AVTP_CAPTURE RCAR_GP_PIN(3, 15)
92 0 : #define PIN_TSN0_AVTP_PPS RCAR_GP_PIN(3, 16)
93 0 : #define PIN_TSN0_AVTP_MATCH RCAR_GP_PIN(3, 17)
94 0 : #define PIN_TSN0_AVTP_CAPTURE RCAR_GP_PIN(3, 18)
95 0 : #define PIN_GP4_00 RCAR_GP_PIN(4, 0)
96 0 : #define PIN_GP4_01 RCAR_GP_PIN(4, 1)
97 0 : #define PIN_GP4_02 RCAR_GP_PIN(4, 2)
98 0 : #define PIN_GP4_03 RCAR_GP_PIN(4, 3)
99 0 : #define PIN_GP4_04 RCAR_GP_PIN(4, 4)
100 0 : #define PIN_GP4_05 RCAR_GP_PIN(4, 5)
101 0 : #define PIN_GP4_06 RCAR_GP_PIN(4, 6)
102 0 : #define PIN_GP4_07 RCAR_GP_PIN(4, 7)
103 0 : #define PIN_GP4_08 RCAR_GP_PIN(4, 8)
104 0 : #define PIN_GP4_09 RCAR_GP_PIN(4, 9)
105 0 : #define PIN_GP4_10 RCAR_GP_PIN(4, 10)
106 0 : #define PIN_GP4_11 RCAR_GP_PIN(4, 11)
107 0 : #define PIN_GP4_12 RCAR_GP_PIN(4, 12)
108 0 : #define PIN_GP4_13 RCAR_GP_PIN(4, 13)
109 0 : #define PIN_GP4_14 RCAR_GP_PIN(4, 14)
110 0 : #define PIN_GP4_15 RCAR_GP_PIN(4, 15)
111 0 : #define PIN_GP4_16 RCAR_GP_PIN(4, 16)
112 0 : #define PIN_GP4_17 RCAR_GP_PIN(4, 17)
113 0 : #define PIN_GP4_18 RCAR_GP_PIN(4, 18)
114 0 : #define PIN_GP4_19 RCAR_GP_PIN(4, 19)
115 0 : #define PIN_MSPI0SC RCAR_GP_PIN(4, 20)
116 0 : #define PIN_MSPI0SI RCAR_GP_PIN(4, 21)
117 0 : #define PIN_MSPI0SO_MSPI0DCS RCAR_GP_PIN(4, 22)
118 0 : #define PIN_MSPI0CSS1 RCAR_GP_PIN(4, 23)
119 0 : #define PIN_MSPI0CSS0 RCAR_GP_PIN(4, 24)
120 0 : #define PIN_MSPI1SI RCAR_GP_PIN(4, 25)
121 0 : #define PIN_MSPI1SO_MSPI1DCS RCAR_GP_PIN(4, 26)
122 0 : #define PIN_MSPI1CSS0 RCAR_GP_PIN(4, 27)
123 0 : #define PIN_MSPI1SC RCAR_GP_PIN(4, 28)
124 0 : #define PIN_MSPI1CSS2 RCAR_GP_PIN(4, 29)
125 0 : #define PIN_MSPI1CSS1 RCAR_GP_PIN(4, 30)
126 0 : #define PIN_RIIC0SCL RCAR_GP_PIN(5, 0)
127 0 : #define PIN_RIIC0SDA RCAR_GP_PIN(5, 1)
128 0 : #define PIN_ETNB0MD RCAR_GP_PIN(5, 2)
129 0 : #define PIN_ETNB0WOL RCAR_GP_PIN(5, 3)
130 0 : #define PIN_ETNB0LINKSTA RCAR_GP_PIN(5, 4)
131 0 : #define PIN_ETNB0MDC RCAR_GP_PIN(5, 5)
132 0 : #define PIN_ETNB0RXER RCAR_GP_PIN(5, 6)
133 0 : #define PIN_ETNB0RXD3 RCAR_GP_PIN(5, 7)
134 0 : #define PIN_ETNB0RXD1 RCAR_GP_PIN(5, 8)
135 0 : #define PIN_ETNB0RXD2 RCAR_GP_PIN(5, 9)
136 0 : #define PIN_ETNB0RXDV RCAR_GP_PIN(5, 10)
137 0 : #define PIN_ETNB0RXD0 RCAR_GP_PIN(5, 11)
138 0 : #define PIN_ETNB0RXCLK RCAR_GP_PIN(5, 12)
139 0 : #define PIN_ETNB0TXER RCAR_GP_PIN(5, 13)
140 0 : #define PIN_ETNB0TXD3 RCAR_GP_PIN(5, 14)
141 0 : #define PIN_ETNB0TXCLK RCAR_GP_PIN(5, 15)
142 0 : #define PIN_ETNB0TXD1 RCAR_GP_PIN(5, 16)
143 0 : #define PIN_ETNB0TXD2 RCAR_GP_PIN(5, 17)
144 0 : #define PIN_ETNB0TXEN RCAR_GP_PIN(5, 18)
145 0 : #define PIN_ETNB0TXD0 RCAR_GP_PIN(5, 19)
146 0 : #define PIN_RLIN37TX RCAR_GP_PIN(6, 0)
147 0 : #define PIN_RLIN37RX_INTP23 RCAR_GP_PIN(6, 1)
148 0 : #define PIN_RLIN36TX RCAR_GP_PIN(6, 2)
149 0 : #define PIN_RLIN36RX_INTP22 RCAR_GP_PIN(6, 3)
150 0 : #define PIN_RLIN35TX RCAR_GP_PIN(6, 4)
151 0 : #define PIN_RLIN35RX_INTP21 RCAR_GP_PIN(6, 5)
152 0 : #define PIN_RLIN34TX RCAR_GP_PIN(6, 6)
153 0 : #define PIN_RLIN34RX_INTP20 RCAR_GP_PIN(6, 7)
154 0 : #define PIN_RLIN33TX RCAR_GP_PIN(6, 8)
155 0 : #define PIN_RLIN33RX_INTP19 RCAR_GP_PIN(6, 9)
156 0 : #define PIN_RLIN32TX RCAR_GP_PIN(6, 10)
157 0 : #define PIN_RLIN32RX_INTP18 RCAR_GP_PIN(6, 11)
158 0 : #define PIN_RLIN31TX RCAR_GP_PIN(6, 12)
159 0 : #define PIN_RLIN31RX_INTP17 RCAR_GP_PIN(6, 13)
160 0 : #define PIN_RLIN30TX RCAR_GP_PIN(6, 14)
161 0 : #define PIN_RLIN30RX_INTP16 RCAR_GP_PIN(6, 15)
162 0 : #define PIN_INTP37 RCAR_GP_PIN(6, 16)
163 0 : #define PIN_INTP36 RCAR_GP_PIN(6, 17)
164 0 : #define PIN_INTP35 RCAR_GP_PIN(6, 18)
165 0 : #define PIN_INTP34 RCAR_GP_PIN(6, 19)
166 0 : #define PIN_INTP33 RCAR_GP_PIN(6, 20)
167 0 : #define PIN_INTP32 RCAR_GP_PIN(6, 21)
168 0 : #define PIN_NMI1 RCAR_GP_PIN(6, 22)
169 0 : #define PIN_PRESETOUT1_N RCAR_GP_PIN(6, 31)
170 0 : #define PIN_CAN0TX RCAR_GP_PIN(7, 0)
171 0 : #define PIN_CAN0RX_INTP0 RCAR_GP_PIN(7, 1)
172 0 : #define PIN_CAN1TX RCAR_GP_PIN(7, 2)
173 0 : #define PIN_CAN1RX_INTP1 RCAR_GP_PIN(7, 3)
174 0 : #define PIN_CAN2TX RCAR_GP_PIN(7, 4)
175 0 : #define PIN_CAN2RX_INTP2 RCAR_GP_PIN(7, 5)
176 0 : #define PIN_CAN3TX RCAR_GP_PIN(7, 6)
177 0 : #define PIN_CAN3RX_INTP3 RCAR_GP_PIN(7, 7)
178 0 : #define PIN_CAN4TX RCAR_GP_PIN(7, 8)
179 0 : #define PIN_CAN4RX_INTP4 RCAR_GP_PIN(7, 9)
180 0 : #define PIN_CAN5TX RCAR_GP_PIN(7, 10)
181 0 : #define PIN_CAN5RX_INTP5 RCAR_GP_PIN(7, 11)
182 0 : #define PIN_CAN6TX RCAR_GP_PIN(7, 12)
183 0 : #define PIN_CAN6RX_INTP6 RCAR_GP_PIN(7, 13)
184 0 : #define PIN_CAN7TX RCAR_GP_PIN(7, 14)
185 0 : #define PIN_CAN7RX_INTP7 RCAR_GP_PIN(7, 15)
186 0 : #define PIN_CAN8TX RCAR_GP_PIN(7, 16)
187 0 : #define PIN_CAN8RX_INTP8 RCAR_GP_PIN(7, 17)
188 0 : #define PIN_CAN9TX RCAR_GP_PIN(7, 18)
189 0 : #define PIN_CAN9RX_INTP9 RCAR_GP_PIN(7, 19)
190 0 : #define PIN_CAN10TX RCAR_GP_PIN(7, 20)
191 0 : #define PIN_CAN10RX_INTP10 RCAR_GP_PIN(7, 21)
192 0 : #define PIN_CAN11TX RCAR_GP_PIN(7, 22)
193 0 : #define PIN_CAN11RX_INTP11 RCAR_GP_PIN(7, 23)
194 0 : #define PIN_CAN12TX RCAR_GP_PIN(7, 24)
195 0 : #define PIN_CAN12RX_INTP12 RCAR_GP_PIN(7, 25)
196 0 : #define PIN_CAN13TX RCAR_GP_PIN(7, 26)
197 0 : #define PIN_CAN13RX_INTP13 RCAR_GP_PIN(7, 27)
198 0 : #define PIN_CAN14TX RCAR_GP_PIN(7, 28)
199 0 : #define PIN_CAN14RX_INTP14 RCAR_GP_PIN(7, 29)
200 0 : #define PIN_CAN15TX RCAR_GP_PIN(7, 30)
201 0 : #define PIN_CAN15RX_INTP15 RCAR_GP_PIN(7, 31)
202 :
203 : /* Pinmux function declarations */
204 0 : #define FUNC_SCIF_CLK IP0SR0(0, 0)
205 0 : #define FUNC_HSCK0 IP0SR0(4, 0)
206 0 : #define FUNC_SCK3 IP0SR0(4, 1)
207 0 : #define FUNC_MSIOF3_SCK IP0SR0(4, 2)
208 0 : #define FUNC_TSN0_AVTP_CAPTURE_A IP0SR0(4, 5)
209 0 : #define FUNC_HRX0 IP0SR0(8, 0)
210 0 : #define FUNC_RX3 IP0SR0(8, 1)
211 0 : #define FUNC_MSIOF3_RXD IP0SR0(8, 2)
212 0 : #define FUNC_TSN0_AVTP_MATCH_A IP0SR0(8, 5)
213 0 : #define FUNC_HTX0 IP0SR0(12, 0)
214 0 : #define FUNC_TX3 IP0SR0(12, 1)
215 0 : #define FUNC_MSIOF3_TXD IP0SR0(12, 2)
216 0 : #define FUNC_HCTS0_N IP0SR0(16, 0)
217 0 : #define FUNC_CTS3_N IP0SR0(16, 1)
218 0 : #define FUNC_MSIOF3_SS1 IP0SR0(16, 2)
219 0 : #define FUNC_TSN0_MDC_A IP0SR0(16, 5)
220 0 : #define FUNC_HRTS0_N IP0SR0(20, 0)
221 0 : #define FUNC_RTS3_N IP0SR0(20, 1)
222 0 : #define FUNC_MSIOF3_SS2 IP0SR0(20, 2)
223 0 : #define FUNC_TSN0_MDIO_A IP0SR0(20, 5)
224 0 : #define FUNC_RX0 IP0SR0(24, 0)
225 0 : #define FUNC_HRX1 IP0SR0(24, 1)
226 0 : #define FUNC_MSIOF1_RXD IP0SR0(24, 3)
227 0 : #define FUNC_TSN1_AVTP_MATCH_A IP0SR0(24, 5)
228 0 : #define FUNC_TX0 IP0SR0(28, 0)
229 0 : #define FUNC_HTX1 IP0SR0(28, 1)
230 0 : #define FUNC_MSIOF1_TXD IP0SR0(28, 3)
231 0 : #define FUNC_TSN1_AVTP_CAPTURE_A IP0SR0(28, 5)
232 0 : #define FUNC_SCK0 IP1SR0(0, 0)
233 0 : #define FUNC_HSCK1 IP1SR0(0, 1)
234 0 : #define FUNC_MSIOF1_SCK IP1SR0(0, 3)
235 0 : #define FUNC_RTS0_N IP1SR0(4, 0)
236 0 : #define FUNC_HRTS1_N IP1SR0(4, 1)
237 0 : #define FUNC_MSIOF3_SYNC IP1SR0(4, 2)
238 0 : #define FUNC_TSN1_MDIO_A IP1SR0(4, 5)
239 0 : #define FUNC_CTS0_N IP1SR0(8, 0)
240 0 : #define FUNC_HCTS1_N IP1SR0(8, 1)
241 0 : #define FUNC_MSIOF1_SYNC IP1SR0(8, 3)
242 0 : #define FUNC_TSN1_MDC_A IP1SR0(8, 5)
243 0 : #define FUNC_MSIOF0_SYNC IP1SR0(12, 0)
244 0 : #define FUNC_HCTS3_N IP1SR0(12, 1)
245 0 : #define FUNC_CTS1_N IP1SR0(12, 2)
246 0 : #define FUNC_IRQ4 IP1SR0(12, 3)
247 0 : #define FUNC_TSN0_LINK_A IP1SR0(12, 5)
248 0 : #define FUNC_MSIOF0_RXD IP1SR0(16, 0)
249 0 : #define FUNC_HRX3 IP1SR0(16, 1)
250 0 : #define FUNC_RX1 IP1SR0(16, 2)
251 0 : #define FUNC_MSIOF0_TXD IP1SR0(20, 0)
252 0 : #define FUNC_HTX3 IP1SR0(20, 1)
253 0 : #define FUNC_TX1 IP1SR0(20, 2)
254 0 : #define FUNC_MSIOF0_SCK IP1SR0(24, 0)
255 0 : #define FUNC_HSCK3 IP1SR0(24, 1)
256 0 : #define FUNC_SCK1 IP1SR0(24, 2)
257 0 : #define FUNC_MSIOF0_SS1 IP1SR0(28, 0)
258 0 : #define FUNC_HRTS3_N IP1SR0(28, 1)
259 0 : #define FUNC_RTS1_N IP1SR0(28, 2)
260 0 : #define FUNC_IRQ5 IP1SR0(28, 3)
261 0 : #define FUNC_TSN1_LINK_A IP1SR0(28, 5)
262 0 : #define FUNC_MSIOF0_SS2 IP2SR0(0, 0)
263 0 : #define FUNC_TSN2_LINK_A IP2SR0(0, 5)
264 0 : #define FUNC_IRQ0 IP2SR0(4, 0)
265 0 : #define FUNC_MSIOF1_SS1 IP2SR0(4, 3)
266 0 : #define FUNC_TSN0_MAGIC_A IP2SR0(4, 5)
267 0 : #define FUNC_IRQ1 IP2SR0(8, 0)
268 0 : #define FUNC_MSIOF1_SS2 IP2SR0(8, 3)
269 0 : #define FUNC_TSN0_PHY_INT_A IP2SR0(8, 5)
270 0 : #define FUNC_IRQ2 IP2SR0(12, 0)
271 0 : #define FUNC_TSN1_PHY_INT_A IP2SR0(12, 5)
272 0 : #define FUNC_IRQ3 IP2SR0(16, 0)
273 0 : #define FUNC_TSN2_PHY_INT_A IP2SR0(16, 5)
274 0 : #define FUNC_GP1_00 IP0SR1(0, 0)
275 0 : #define FUNC_TCLK1 IP0SR1(0, 1)
276 0 : #define FUNC_HSCK2 IP0SR1(0, 2)
277 0 : #define FUNC_GP1_01 IP0SR1(4, 0)
278 :
279 0 : #define FUNC_MMC_SD_CLK IPSR_DUMMY
280 0 : #define FUNC_MMC_SD_D0 IPSR_DUMMY
281 0 : #define FUNC_MMC_SD_D1 IPSR_DUMMY
282 0 : #define FUNC_MMC_SD_D2 IPSR_DUMMY
283 0 : #define FUNC_MMC_SD_D3 IPSR_DUMMY
284 0 : #define FUNC_MMC_D4 IPSR_DUMMY
285 0 : #define FUNC_MMC_D5 IPSR_DUMMY
286 0 : #define FUNC_MMC_D6 IPSR_DUMMY
287 0 : #define FUNC_MMC_D7 IPSR_DUMMY
288 0 : #define FUNC_MMC_DS IPSR_DUMMY
289 0 : #define FUNC_MMC_SD_CMD IPSR_DUMMY
290 0 : #define FUNC_SD_CD IPSR_DUMMY
291 0 : #define FUNC_SD_WP IPSR_DUMMY
292 :
293 0 : #define FUNC_TCLK4 IP0SR1(4, 1)
294 0 : #define FUNC_HRX2 IP0SR1(4, 2)
295 0 : #define FUNC_GP1_02 IP0SR1(8, 0)
296 0 : #define FUNC_HTX2 IP0SR1(8, 2)
297 0 : #define FUNC_MSIOF2_SS1 IP0SR1(8, 3)
298 0 : #define FUNC_TSN2_MDC_A IP0SR1(8, 5)
299 0 : #define FUNC_GP1_03 IP0SR1(12, 0)
300 0 : #define FUNC_TCLK2 IP0SR1(12, 1)
301 0 : #define FUNC_HCTS2_N IP0SR1(12, 2)
302 0 : #define FUNC_MSIOF2_SS2 IP0SR1(12, 3)
303 0 : #define FUNC_CTS4_N IP0SR1(12, 4)
304 0 : #define FUNC_TSN2_MDIO_A IP0SR1(12, 5)
305 0 : #define FUNC_GP1_04 IP0SR1(16, 0)
306 0 : #define FUNC_TCLK3 IP0SR1(16, 1)
307 0 : #define FUNC_HRTS2_N IP0SR1(16, 2)
308 0 : #define FUNC_MSIOF2_SYNC IP0SR1(16, 3)
309 0 : #define FUNC_RTS4_N IP0SR1(16, 4)
310 0 : #define FUNC_GP1_05 IP0SR1(20, 0)
311 0 : #define FUNC_MSIOF2_SCK IP0SR1(20, 1)
312 0 : #define FUNC_SCK4 IP0SR1(20, 2)
313 0 : #define FUNC_GP1_06 IP0SR1(24, 0)
314 0 : #define FUNC_MSIOF2_RXD IP0SR1(24, 1)
315 0 : #define FUNC_RX4 IP0SR1(24, 2)
316 0 : #define FUNC_GP1_07 IP0SR1(28, 0)
317 0 : #define FUNC_MSIOF2_TXD IP0SR1(28, 1)
318 0 : #define FUNC_TX4 IP0SR1(28, 2)
319 0 : #define FUNC_GP4_00 IP0SR4(0, 0)
320 0 : #define FUNC_MSPI4SC IP0SR4(0, 1)
321 0 : #define FUNC_TAUD0I2 IP0SR4(0, 3)
322 0 : #define FUNC_TAUD0O2 IP0SR4(0, 4)
323 0 : #define FUNC_GP4_01 IP0SR4(4, 0)
324 0 : #define FUNC_MSPI4SI IP0SR4(4, 1)
325 0 : #define FUNC_TAUD0I4 IP0SR4(4, 3)
326 0 : #define FUNC_TAUD0O4 IP0SR4(4, 4)
327 0 : #define FUNC_GP4_02 IP0SR4(8, 0)
328 0 : #define FUNC_MSPI4SO_MSPI4DCS IP0SR4(8, 1)
329 0 : #define FUNC_TAUD0I3 IP0SR4(8, 3)
330 0 : #define FUNC_TAUD0O3 IP0SR4(8, 4)
331 0 : #define FUNC_GP4_03 IP0SR4(12, 0)
332 0 : #define FUNC_MSPI4CSS1 IP0SR4(12, 1)
333 0 : #define FUNC_TAUD0I6 IP0SR4(12, 3)
334 0 : #define FUNC_TAUD0O6 IP0SR4(12, 4)
335 0 : #define FUNC_GP4_04 IP0SR4(16, 0)
336 0 : #define FUNC_MSPI4CSS0 IP0SR4(16, 1)
337 0 : #define FUNC_MSPI4SSI_N IP0SR4(16, 2)
338 0 : #define FUNC_TAUD0I5 IP0SR4(16, 3)
339 0 : #define FUNC_TAUD0O5 IP0SR4(16, 4)
340 0 : #define FUNC_GP4_05 IP0SR4(20, 0)
341 0 : #define FUNC_MSPI4CSS3 IP0SR4(20, 1)
342 0 : #define FUNC_TAUD0I8 IP0SR4(20, 3)
343 0 : #define FUNC_TAUD0O8 IP0SR4(20, 4)
344 0 : #define FUNC_GP4_06 IP0SR4(24, 0)
345 0 : #define FUNC_MSPI4CSS2 IP0SR4(24, 1)
346 0 : #define FUNC_TAUD0I7 IP0SR4(24, 3)
347 0 : #define FUNC_TAUD0O7 IP0SR4(24, 4)
348 0 : #define FUNC_GP4_07 IP0SR4(28, 0)
349 0 : #define FUNC_MSPI4CSS5 IP0SR4(28, 1)
350 0 : #define FUNC_TAUD0I10 IP0SR4(28, 3)
351 0 : #define FUNC_TAUD0O10 IP0SR4(28, 4)
352 0 : #define FUNC_GP4_08 IP1SR4(0, 0)
353 0 : #define FUNC_MSPI4CSS4 IP1SR4(0, 1)
354 0 : #define FUNC_TAUD0I9 IP1SR4(0, 3)
355 0 : #define FUNC_TAUD0O9 IP1SR4(0, 4)
356 0 : #define FUNC_GP4_09 IP1SR4(4, 0)
357 0 : #define FUNC_MSPI4CSS7 IP1SR4(4, 1)
358 0 : #define FUNC_TAUD0I12 IP1SR4(4, 3)
359 0 : #define FUNC_TAUD0O12 IP1SR4(4, 4)
360 0 : #define FUNC_GP4_10 IP1SR4(8, 0)
361 0 : #define FUNC_MSPI4CSS6 IP1SR4(8, 1)
362 0 : #define FUNC_TAUD0I11 IP1SR4(8, 3)
363 0 : #define FUNC_TAUD0O11 IP1SR4(8, 4)
364 0 : #define FUNC_GP4_11 IP1SR4(12, 0)
365 0 : #define FUNC_ERRORIN0_N IP1SR4(12, 1)
366 0 : #define FUNC_TAUD0I14 IP1SR4(12, 3)
367 0 : #define FUNC_TAUD0O14 IP1SR4(12, 4)
368 0 : #define FUNC_GP4_12 IP1SR4(16, 0)
369 0 : #define FUNC_ERROROUT_C_N IP1SR4(16, 1)
370 0 : #define FUNC_TAUD0I13 IP1SR4(16, 3)
371 0 : #define FUNC_TAUD0O13 IP1SR4(16, 4)
372 0 : #define FUNC_GP4_13 IP1SR4(20, 0)
373 0 : #define FUNC_GP4_14 IP1SR4(24, 0)
374 0 : #define FUNC_ERRORIN1_N IP1SR4(24, 1)
375 0 : #define FUNC_TAUD0I15 IP1SR4(24, 3)
376 0 : #define FUNC_TAUD0O15 IP1SR4(24, 4)
377 0 : #define FUNC_GP4_15 IP1SR4(28, 0)
378 0 : #define FUNC_MSPI1CSS3 IP1SR4(28, 1)
379 0 : #define FUNC_TAUD1I1 IP1SR4(28, 3)
380 0 : #define FUNC_TAUD1O1 IP1SR4(28, 4)
381 0 : #define FUNC_GP4_16 IP2SR4(0, 0)
382 0 : #define FUNC_TAUD1I0 IP2SR4(0, 3)
383 0 : #define FUNC_TAUD1O0 IP2SR4(0, 4)
384 0 : #define FUNC_GP4_17 IP2SR4(4, 0)
385 0 : #define FUNC_MSPI1CSS5 IP2SR4(4, 1)
386 0 : #define FUNC_TAUD1I3 IP2SR4(4, 3)
387 0 : #define FUNC_TAUD1O3 IP2SR4(4, 4)
388 0 : #define FUNC_GP4_18 IP2SR4(8, 0)
389 0 : #define FUNC_MSPI1CSS4 IP2SR4(8, 1)
390 0 : #define FUNC_TAUD1I2 IP2SR4(8, 3)
391 0 : #define FUNC_TAUD1O2 IP2SR4(8, 4)
392 0 : #define FUNC_GP4_19 IP2SR4(12, 0)
393 0 : #define FUNC_MSPI1CSS6 IP2SR4(12, 1)
394 0 : #define FUNC_TAUD1I4 IP2SR4(12, 3)
395 0 : #define FUNC_TAUD1O4 IP2SR4(12, 4)
396 0 : #define FUNC_MSPI0SC IP2SR4(16, 0)
397 0 : #define FUNC_MSPI1CSS7 IP2SR4(16, 1)
398 0 : #define FUNC_TAUD1I5 IP2SR4(16, 3)
399 0 : #define FUNC_TAUD1O5 IP2SR4(16, 4)
400 0 : #define FUNC_MSPI0SI IP2SR4(20, 0)
401 0 : #define FUNC_TAUD1I7 IP2SR4(20, 3)
402 0 : #define FUNC_TAUD1O7 IP2SR4(20, 4)
403 0 : #define FUNC_MSPI0SO_MSPI0DCS IP2SR4(24, 0)
404 0 : #define FUNC_TAUD1I6 IP2SR4(24, 3)
405 0 : #define FUNC_TAUD1O6 IP2SR4(24, 4)
406 0 : #define FUNC_MSPI0CSS1 IP2SR4(28, 0)
407 0 : #define FUNC_TAUD1I9 IP2SR4(28, 3)
408 0 : #define FUNC_TAUD1O9 IP2SR4(28, 4)
409 0 : #define FUNC_MSPI0CSS0 IP3SR4(0, 0)
410 0 : #define FUNC_MSPI0SSI_N IP3SR4(0, 1)
411 0 : #define FUNC_TAUD1I8 IP3SR4(0, 3)
412 0 : #define FUNC_TAUD1O8 IP3SR4(0, 4)
413 0 : #define FUNC_MSPI1SO_MSPI1DCS IP3SR4(8, 0)
414 0 : #define FUNC_MSPI0CSS3 IP3SR4(8, 2)
415 0 : #define FUNC_TAUD1I11 IP3SR4(8, 3)
416 0 : #define FUNC_TAUD1O11 IP3SR4(8, 4)
417 0 : #define FUNC_MSPI1SC IP3SR4(16, 0)
418 0 : #define FUNC_MSPI0CSS2 IP3SR4(16, 2)
419 0 : #define FUNC_TAUD1I10 IP3SR4(16, 3)
420 0 : #define FUNC_TAUD1O10 IP3SR4(16, 4)
421 0 : #define FUNC_RIIC0SCL IP0SR5(0, 0)
422 0 : #define FUNC_TAUD0I0 IP0SR5(0, 3)
423 0 : #define FUNC_TAUD0O0 IP0SR5(0, 4)
424 0 : #define FUNC_RIIC0SDA IP0SR5(4, 0)
425 0 : #define FUNC_TAUD0I1 IP0SR5(4, 3)
426 0 : #define FUNC_TAUD0O1 IP0SR5(4, 4)
427 0 : #define FUNC_ETNB0MD IP0SR5(8, 0)
428 0 : #define FUNC_ETNB0WOL IP0SR5(12, 0)
429 0 : #define FUNC_ETNB0LINKSTA IP0SR5(16, 0)
430 0 : #define FUNC_ETNB0MDC IP0SR5(20, 0)
431 0 : #define FUNC_ETNB0RXCLK IP0SR5(24, 0)
432 0 : #define FUNC_ETNB0CRS_DV IP0SR5(24, 1)
433 0 : #define FUNC_ETNB0TXCLK IP0SR5(28, 0)
434 0 : #define FUNC_ETNB0REFCLK IP0SR5(28, 1)
435 0 : #define FUNC_RLIN33TX IP1SR6(0, 0)
436 0 : #define FUNC_TAUJ3O3 IP1SR6(0, 3)
437 0 : #define FUNC_TAUJ3I3 IP1SR6(0, 4)
438 0 : #define FUNC_NMI1 IP1SR6(0, 5)
439 0 : #define FUNC_RLIN33RX_INTP19 IP1SR6(4, 0)
440 0 : #define FUNC_TAUJ3O2 IP1SR6(4, 3)
441 0 : #define FUNC_TAUJ3I2 IP1SR6(4, 4)
442 0 : #define FUNC_RLIN32TX IP1SR6(8, 0)
443 0 : #define FUNC_TAUJ3O1 IP1SR6(8, 3)
444 0 : #define FUNC_TAUJ3I1 IP1SR6(8, 4)
445 0 : #define FUNC_RLIN32RX_INTP18 IP1SR6(12, 0)
446 0 : #define FUNC_TAUJ3O0 IP1SR6(12, 3)
447 0 : #define FUNC_TAUJ3I0 IP1SR6(12, 4)
448 0 : #define FUNC_INTP35 IP1SR6(12, 5)
449 0 : #define FUNC_RLIN31TX IP1SR6(16, 0)
450 0 : #define FUNC_TAUJ1I3 IP1SR6(16, 3)
451 0 : #define FUNC_TAUJ1O3 IP1SR6(16, 4)
452 0 : #define FUNC_INTP34 IP1SR6(16, 5)
453 0 : #define FUNC_RLIN31RX_INTP17 IP1SR6(20, 0)
454 0 : #define FUNC_TAUJ1I2 IP1SR6(20, 3)
455 0 : #define FUNC_TAUJ1O2 IP1SR6(20, 4)
456 0 : #define FUNC_INTP33 IP1SR6(20, 5)
457 0 : #define FUNC_RLIN30TX IP1SR6(24, 0)
458 0 : #define FUNC_TAUJ1I1 IP1SR6(24, 3)
459 0 : #define FUNC_TAUJ1O1 IP1SR6(24, 4)
460 0 : #define FUNC_RLIN30RX_INTP16 IP1SR6(28, 0)
461 0 : #define FUNC_TAUJ1I0 IP1SR6(28, 3)
462 0 : #define FUNC_TAUJ1O0 IP1SR6(28, 4)
463 0 : #define FUNC_FLXA0STPWT IP2SR6(8, 2)
464 0 : #define FUNC_CAN0TX IP0SR7(0, 0)
465 0 : #define FUNC_RSENT0SPCO IP0SR7(0, 1)
466 0 : #define FUNC_MSPI2SO_MSPI2DCS IP0SR7(0, 3)
467 0 : #define FUNC_CAN0RX_INTP0 IP0SR7(4, 0)
468 0 : #define FUNC_RSENT0RX IP0SR7(4, 1)
469 0 : #define FUNC_RSENT0RX_RSENT0SPCO IP0SR7(4, 2)
470 0 : #define FUNC_MSPI2SC IP0SR7(4, 3)
471 0 : #define FUNC_CAN1TX IP0SR7(8, 0)
472 0 : #define FUNC_RSENT1SPCO IP0SR7(8, 1)
473 0 : #define FUNC_MSPI2SSI_N IP0SR7(8, 3)
474 0 : #define FUNC_MSPI2CSS0 IP0SR7(8, 4)
475 0 : #define FUNC_CAN1RX_INTP1 IP0SR7(12, 0)
476 0 : #define FUNC_RSENT1RX IP0SR7(12, 1)
477 0 : #define FUNC_RSENT1RX_RSENT1SPCO IP0SR7(12, 2)
478 0 : #define FUNC_MSPI2SI IP0SR7(12, 3)
479 0 : #define FUNC_CAN2TX IP0SR7(16, 0)
480 0 : #define FUNC_RSENT2SPCO IP0SR7(16, 1)
481 0 : #define FUNC_MSPI2CSS2 IP0SR7(16, 4)
482 0 : #define FUNC_CAN2RX_INTP2 IP0SR7(20, 0)
483 0 : #define FUNC_RSENT2RX IP0SR7(20, 1)
484 0 : #define FUNC_RSENT2RX_RSENT2SPCO IP0SR7(20, 2)
485 0 : #define FUNC_MSPI2CSS1 IP0SR7(20, 4)
486 0 : #define FUNC_CAN3TX IP0SR7(24, 0)
487 0 : #define FUNC_RSENT3SPCO IP0SR7(24, 1)
488 0 : #define FUNC_MSPI2CSS4 IP0SR7(24, 4)
489 0 : #define FUNC_CAN3RX_INTP3 IP0SR7(28, 0)
490 0 : #define FUNC_RSENT3RX IP0SR7(28, 1)
491 0 : #define FUNC_RSENT3RX_RSENT3SPCO IP0SR7(28, 2)
492 0 : #define FUNC_MSPI2CSS3 IP0SR7(28, 4)
493 0 : #define FUNC_CAN4TX IP1SR7(0, 0)
494 0 : #define FUNC_RSENT4SPCO IP1SR7(0, 1)
495 0 : #define FUNC_MSPI2CSS6 IP1SR7(0, 4)
496 0 : #define FUNC_CAN4RX_INTP4 IP1SR7(4, 0)
497 0 : #define FUNC_RSENT4RX IP1SR7(4, 1)
498 0 : #define FUNC_RSENT4RX_RSENT4SPCO IP1SR7(4, 2)
499 0 : #define FUNC_MSPI2CSS5 IP1SR7(4, 4)
500 0 : #define FUNC_CAN5TX IP1SR7(8, 0)
501 0 : #define FUNC_RSENT5SPCO IP1SR7(8, 1)
502 0 : #define FUNC_CAN5RX_INTP5 IP1SR7(12, 0)
503 0 : #define FUNC_RSENT5RX IP1SR7(12, 1)
504 0 : #define FUNC_RSENT5RX_RSENT5SPCO IP1SR7(12, 2)
505 0 : #define FUNC_MSPI2CSS7 IP1SR7(12, 4)
506 0 : #define FUNC_CAN6TX IP1SR7(16, 0)
507 0 : #define FUNC_RSENT6SPCO IP1SR7(16, 1)
508 0 : #define FUNC_MSPI3SO_MSPI3DCS IP1SR7(16, 3)
509 0 : #define FUNC_CAN6RX_INTP6 IP1SR7(20, 0)
510 0 : #define FUNC_RSENT6RX IP1SR7(20, 1)
511 0 : #define FUNC_RSENT6RX_RSENT6SPCO IP1SR7(20, 2)
512 0 : #define FUNC_MSPI3SC IP1SR7(20, 3)
513 0 : #define FUNC_CAN7TX IP1SR7(24, 0)
514 0 : #define FUNC_RSENT7SPCO IP1SR7(24, 1)
515 0 : #define FUNC_MSPI3SSI_N IP1SR7(24, 3)
516 0 : #define FUNC_CAN7RX_INTP7 IP1SR7(28, 0)
517 0 : #define FUNC_RSENT7RX IP1SR7(28, 1)
518 0 : #define FUNC_RSENT7RX_RSENT7SPCO IP1SR7(28, 2)
519 0 : #define FUNC_MSPI3SI IP1SR7(28, 3)
520 0 : #define FUNC_CAN8TX IP2SR7(0, 0)
521 0 : #define FUNC_RLIN38TX IP2SR7(0, 1)
522 0 : #define FUNC_MSPI3CSS1 IP2SR7(0, 3)
523 0 : #define FUNC_CAN8RX_INTP8 IP2SR7(4, 0)
524 0 : #define FUNC_RLIN38RX_INTP24 IP2SR7(4, 1)
525 0 : #define FUNC_MSPI3CSS0 IP2SR7(4, 3)
526 0 : #define FUNC_CAN9TX IP2SR7(8, 0)
527 0 : #define FUNC_RLIN39TX IP2SR7(8, 1)
528 0 : #define FUNC_MSPI3CSS3 IP2SR7(8, 3)
529 0 : #define FUNC_CAN9RX_INTP9 IP2SR7(12, 0)
530 0 : #define FUNC_RLIN39RX_INTP25 IP2SR7(12, 1)
531 0 : #define FUNC_MSPI3CSS2 IP2SR7(12, 3)
532 0 : #define FUNC_CAN10TX IP2SR7(16, 0)
533 0 : #define FUNC_RLIN310TX IP2SR7(16, 1)
534 0 : #define FUNC_MSPI3CSS5 IP2SR7(16, 3)
535 0 : #define FUNC_CAN10RX_INTP10 IP2SR7(20, 0)
536 0 : #define FUNC_RLIN310RX_INTP26 IP2SR7(20, 1)
537 0 : #define FUNC_MSPI3CSS4 IP2SR7(20, 3)
538 0 : #define FUNC_CAN11TX IP2SR7(24, 0)
539 0 : #define FUNC_RLIN311TX IP2SR7(24, 1)
540 0 : #define FUNC_MSPI3CSS7 IP2SR7(24, 3)
541 0 : #define FUNC_CAN11RX_INTP11 IP2SR7(28, 0)
542 0 : #define FUNC_RLIN311RX_INTP27 IP2SR7(28, 1)
543 0 : #define FUNC_MSPI3CSS6 IP2SR7(28, 3)
544 0 : #define FUNC_FLXA0RXDB IP3SR7(8, 2)
545 0 : #define FUNC_FLXA0RXDA IP3SR7(12, 2)
546 0 : #define FUNC_FLXA0TXDB IP3SR7(16, 2)
547 0 : #define FUNC_FLXA0TXDA IP3SR7(20, 2)
548 0 : #define FUNC_FLXA0TXENB IP3SR7(24, 2)
549 0 : #define FUNC_FLXA0TXENA IP3SR7(28, 2)
550 :
551 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A779F0_H_ */
|
