Line data    Source code

       1            0 : /*
       2              :  * Copyright (c) 2025 Renesas Electronics Corporation
       3              :  * SPDX-License-Identifier: Apache-2.0
       4              :  */
       5              : 
       6              : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RZA_COMMON_H_
       7              : #define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RZA_COMMON_H_
       8              : 
       9              : /* Superset list of all possible IO ports. */
      10            0 : #define PORT_00 0x0000 /* IO port 0 */
      11            0 : #define PORT_01 0x0100 /* IO port 1 */
      12            0 : #define PORT_02 0x0200 /* IO port 2 */
      13            0 : #define PORT_03 0x0300 /* IO port 3 */
      14            0 : #define PORT_04 0x0400 /* IO port 4 */
      15            0 : #define PORT_05 0x0500 /* IO port 5 */
      16            0 : #define PORT_06 0x0600 /* IO port 6 */
      17            0 : #define PORT_07 0x0700 /* IO port 7 */
      18            0 : #define PORT_08 0x0800 /* IO port 8 */
      19            0 : #define PORT_09 0x0900 /* IO port 9 */
      20            0 : #define PORT_10 0x0A00 /* IO port 10 */
      21            0 : #define PORT_11 0x0B00 /* IO port 11 */
      22            0 : #define PORT_12 0x0C00 /* IO port 12 */
      23            0 : #define PORT_13 0x0D00 /* IO port 13 */
      24            0 : #define PORT_14 0x0E00 /* IO port 14 */
      25            0 : #define PORT_15 0x0F00 /* IO port 15 */
      26            0 : #define PORT_16 0x1000 /* IO port 16 */
      27            0 : #define PORT_17 0x1100 /* IO port 17 */
      28            0 : #define PORT_18 0x1200 /* IO port 18 */
      29              : 
      30              : /*
      31              :  * Create the value contain port/pin/function information
      32              :  *
      33              :  * port: port number BSP_IO_PORT_00..BSP_IO_PORT_18
      34              :  * pin: pin number
      35              :  * func: pin function
      36              :  */
      37            0 : #define RZA_PINMUX(port, pin, func) (port | pin | (func << 4))
      38              : 
      39              : /* Special purpose port */
      40            0 : #define BSP_IO_NMI 0xFFFF0100 /* NMI */
      41              : 
      42            0 : #define BSP_IO_TMS_SWDIO 0xFFFF0200 /* TMS_SWDIO */
      43              : 
      44            0 : #define BSP_IO_TDO 0xFFFF0300 /* TDO */
      45              : 
      46            0 : #define BSP_IO_AUDIO_CLK1 0xFFFF0400 /* AUDIO_CLK1 */
      47            0 : #define BSP_IO_AUDIO_CLK2 0xFFFF0401 /* AUDIO_CLK2 */
      48              : 
      49            0 : #define BSP_IO_SD0_CLK   0xFFFF0600 /* CD0_CLK */
      50            0 : #define BSP_IO_SD0_CMD   0xFFFF0601 /* CD0_CMD */
      51            0 : #define BSP_IO_SD0_RST_N 0xFFFF0602 /* CD0_RST_N */
      52              : 
      53            0 : #define BSP_IO_SD0_DATA0 0xFFFF0700 /* SD0_DATA0 */
      54            0 : #define BSP_IO_SD0_DATA1 0xFFFF0701 /* SD0_DATA1 */
      55            0 : #define BSP_IO_SD0_DATA2 0xFFFF0702 /* SD0_DATA2 */
      56            0 : #define BSP_IO_SD0_DATA3 0xFFFF0703 /* SD0_DATA3 */
      57            0 : #define BSP_IO_SD0_DATA4 0xFFFF0704 /* SD0_DATA4 */
      58            0 : #define BSP_IO_SD0_DATA5 0xFFFF0705 /* SD0_DATA5 */
      59            0 : #define BSP_IO_SD0_DATA6 0xFFFF0706 /* SD0_DATA6 */
      60            0 : #define BSP_IO_SD0_DATA7 0xFFFF0707 /* SD0_DATA7 */
      61              : 
      62            0 : #define BSP_IO_SD1_CLK 0xFFFF0800 /* SD1_CLK */
      63            0 : #define BSP_IO_SD1_CMD 0xFFFF0801 /* SD1_CMD */
      64              : 
      65            0 : #define BSP_IO_SD1_DATA0 0xFFFF0900 /* SD1_DATA0 */
      66            0 : #define BSP_IO_SD1_DATA1 0xFFFF0901 /* SD1_DATA1 */
      67            0 : #define BSP_IO_SD1_DATA2 0xFFFF0902 /* SD1_DATA2 */
      68            0 : #define BSP_IO_SD1_DATA3 0xFFFF0903 /* SD1_DATA3 */
      69              : 
      70            0 : #define BSP_IO_QSPI0_SPCLK 0xFFFF0A00 /* QSPI0_SPCLK */
      71            0 : #define BSP_IO_QSPI0_IO0   0xFFFF0A01 /* QSPI0_IO0 */
      72            0 : #define BSP_IO_QSPI0_IO1   0xFFFF0A02 /* QSPI0_IO1 */
      73            0 : #define BSP_IO_QSPI0_IO2   0xFFFF0A03 /* QSPI0_IO2 */
      74            0 : #define BSP_IO_QSPI0_IO3   0xFFFF0A04 /* QSPI0_IO3 */
      75            0 : #define BSP_IO_QSPI0_SSL   0xFFFF0A05 /* QSPI0_SSL */
      76              : 
      77            0 : #define BSP_IO_OM_CS1_N 0xFFFF0B00 /* OM_CS1_N */
      78            0 : #define BSP_IO_OM_DQS   0xFFFF0B01 /* OM_DQS */
      79            0 : #define BSP_IO_OM_SIO4  0xFFFF0B02 /* OM_SIO4 */
      80            0 : #define BSP_IO_OM_SIO5  0xFFFF0B03 /* OM_SIO5 */
      81            0 : #define BSP_IO_OM_SIO6  0xFFFF0B04 /* OM_SIO6 */
      82            0 : #define BSP_IO_OM_SIO7  0xFFFF0B05 /* OM_SIO7 */
      83              : 
      84            0 : #define BSP_IO_QSPI_RESET_N 0xFFFF0C00 /* QSPI_RESET_N */
      85            0 : #define BSP_IO_QSPI_WP_N    0xFFFF0C01 /* QSPI_WP_N */
      86              : 
      87            0 : #define BSP_IO_WDTOVF_PERROUT_N 0xFFFF0D00 /* WDTOVF_PERROUT_N */
      88              : 
      89            0 : #define BSP_IO_RIIC0_SDA 0xFFFF0E00 /* RIIC0_SDA */
      90            0 : #define BSP_IO_RIIC0_SCL 0xFFFF0E01 /* RIIC0_SCL */
      91            0 : #define BSP_IO_RIIC1_SDA 0xFFFF0E02 /* RIIC1_SDA */
      92            0 : #define BSP_IO_RIIC1_SCL 0xFFFF0E03 /* RIIC1_SCL */
      93              : 
      94              : /* FILNUM */
      95            0 : #define RZA_FILNUM_4_STAGE  0
      96            0 : #define RZA_FILNUM_8_STAGE  1
      97            0 : #define RZA_FILNUM_12_STAGE 2
      98            0 : #define RZA_FILNUM_16_STAGE 3
      99              : 
     100              : /* FILCLKSEL */
     101            0 : #define RZA_FILCLKSEL_NOT_DIV   0
     102            0 : #define RZA_FILCLKSEL_DIV_9000  1
     103            0 : #define RZA_FILCLKSEL_DIV_18000 2
     104            0 : #define RZA_FILCLKSEL_DIV_36000 3
     105              : 
     106            0 : #define RZA_FILTER_SET(filnum, filclksel) (((filnum) & 0x3) << 0x2) | (filclksel & 0x3)
     107              : 
     108              : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RZA_COMMON_H_ */