Line data Source code
1 0 : /*
2 : * Copyright (c) 2025 Renesas Electronics Corporation
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RZA2M_H_
7 : #define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RZA2M_H_
8 :
9 0 : #define RZA2M_PIN_NUM_IN_PORT 8
10 :
11 : /* Port names as labeled in the Hardware Manual */
12 0 : #define PORT_00 0
13 0 : #define PORT_01 1
14 0 : #define PORT_02 2
15 0 : #define PORT_03 3
16 0 : #define PORT_04 4
17 0 : #define PORT_05 5
18 0 : #define PORT_06 6
19 0 : #define PORT_07 7
20 0 : #define PORT_08 8
21 0 : #define PORT_09 9
22 0 : #define PORT_A 10
23 0 : #define PORT_B 11
24 0 : #define PORT_C 12
25 0 : #define PORT_D 13
26 0 : #define PORT_E 14
27 0 : #define PORT_F 15
28 0 : #define PORT_G 16
29 0 : #define PORT_H 17
30 : /* No I */
31 0 : #define PORT_J 18
32 0 : #define PORT_K 19
33 0 : #define PORT_L 20
34 0 : #define PORT_M 21 /* Pins PM_0/1 are labeled JP_0/1 in HW manual */
35 :
36 0 : #define PORT_CKIO 22
37 0 : #define PORT_PPOC 23 /* Select between 1.8V and 3.3V for SPI and SD/MMC */
38 :
39 0 : #define PIN_POSEL 0 /* Sets function for POSEL0 bits. 00, 01, 10 - 1.8v, 11 - 3.3v */
40 0 : #define PIN_POC2 1 /* Sets function for SSD host 0, 0 - 1.8v 1 - 3.3v */
41 0 : #define PIN_POC3 2 /* Sets function for SSD host 1, 0 - 1.8v 1 - 3.3v */
42 :
43 : /*
44 : * Create the pin index from its bank and position numbers and store in
45 : * the upper 16 bits the alternate function identifier
46 : */
47 0 : #define RZA2M_PINMUX(b, p, f) ((b) * RZA2M_PIN_NUM_IN_PORT + (p) | (f << 16))
48 :
49 0 : #define CKIO_DRV RZA2M_PINMUX(PORT_CKIO, 0, 0)
50 :
51 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RZA2M_H_ */
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