Line data    Source code

       1           0 : /*
       2             :  * Copyright (c) 2017 Linaro Limited
       3             :  *
       4             :  * SPDX-License-Identifier: Apache-2.0
       5             :  */
       6             : 
       7             : #ifndef ZEPHYR_STM32_PINCTRLF1_H_
       8             : #define ZEPHYR_STM32_PINCTRLF1_H_
       9             : 
      10             : #include <zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h>
      11             : #include <zephyr/dt-bindings/pinctrl/stm32f1-afio.h>
      12             : 
      13             : /* Adapted from Linux: include/dt-bindings/pinctrl/stm32-pinfunc.h */
      14             : 
      15             : /**
      16             :  * @brief Macro to generate pinmux int using port, pin number and mode arguments
      17             :  * This is adapted from Linux equivalent st,stm32f429-pinctrl binding
      18             :  */
      19             : 
      20           1 : #define STM32_MODE_SHIFT  0U
      21           0 : #define STM32_MODE_MASK   0x3U
      22           0 : #define STM32_LINE_SHIFT  2U
      23           0 : #define STM32_LINE_MASK   0xFU
      24           0 : #define STM32_PORT_SHIFT  6U
      25           0 : #define STM32_PORT_MASK   0xFU
      26           0 : #define STM32_REMAP_SHIFT 10U
      27           0 : #define STM32_REMAP_MASK  0x3FFU
      28             : 
      29             : /**
      30             :  * @brief Pin configuration configuration bit field.
      31             :  *
      32             :  * Fields:
      33             :  *
      34             :  * - mode  [ 0 : 1 ]
      35             :  * - line  [ 2 : 5 ]
      36             :  * - port  [ 6 : 9 ]
      37             :  * - remap [ 10 : 19 ]
      38             :  *
      39             :  * @param port Port ('A'..'K')
      40             :  * @param line Pin (0..15)
      41             :  * @param mode Pin mode (ANALOG, GPIO_IN, ALTERNATE).
      42             :  * @param remap Pin remapping configuration (NO_REMAP, REMAP_1, ...)
      43             :  */
      44           1 : #define STM32F1_PINMUX(port, line, mode, remap)                                \
      45             :                 (((((port) - 'A') & STM32_PORT_MASK) << STM32_PORT_SHIFT) |    \
      46             :                 (((line) & STM32_LINE_MASK) << STM32_LINE_SHIFT) |           \
      47             :                 (((mode) & STM32_MODE_MASK) << STM32_MODE_SHIFT) |           \
      48             :                 (((remap) & STM32_REMAP_MASK) << STM32_REMAP_SHIFT))
      49             : 
      50             : /**
      51             :  * @brief Pin modes
      52             :  */
      53             : 
      54           1 : #define ALTERNATE       0x0  /* Alternate function output */
      55           0 : #define GPIO_IN         0x1  /* Input */
      56           0 : #define ANALOG          0x2  /* Analog */
      57           0 : #define GPIO_OUT        0x3  /* Output */
      58             : 
      59             : /**
      60             :  * @brief PIN configuration bitfield
      61             :  *
      62             :  * Pin configuration is coded with the following
      63             :  * fields
      64             :  *    GPIO I/O Mode       [ 0 ]
      65             :  *    GPIO Input config   [ 1 : 2 ]
      66             :  *    GPIO Output speed   [ 3 : 4 ]
      67             :  *    GPIO Output PP/OD   [ 5 ]
      68             :  *    GPIO Output AF/GP   [ 6 ]
      69             :  *    GPIO PUPD Config    [ 7 : 8 ]
      70             :  *    GPIO ODR            [ 9 ]
      71             :  *
      72             :  * Applicable to STM32F1 series
      73             :  */
      74             : 
      75             : /* Port Mode */
      76           1 : #define STM32_MODE_INPUT                (0x0 << STM32_MODE_INOUT_SHIFT)
      77           0 : #define STM32_MODE_OUTPUT               (0x1 << STM32_MODE_INOUT_SHIFT)
      78           0 : #define STM32_MODE_INOUT_MASK           0x1
      79           0 : #define STM32_MODE_INOUT_SHIFT          0
      80             : 
      81             : /* Input Port configuration */
      82           0 : #define STM32_CNF_IN_ANALOG             (0x0 << STM32_CNF_IN_SHIFT)
      83           0 : #define STM32_CNF_IN_FLOAT              (0x1 << STM32_CNF_IN_SHIFT)
      84           0 : #define STM32_CNF_IN_PUPD               (0x2 << STM32_CNF_IN_SHIFT)
      85           0 : #define STM32_CNF_IN_MASK               0x3
      86           0 : #define STM32_CNF_IN_SHIFT              1
      87             : 
      88             : /* Output Port configuration */
      89           0 : #define STM32_MODE_OUTPUT_MAX_10        (0x0 << STM32_MODE_OSPEED_SHIFT)
      90           0 : #define STM32_MODE_OUTPUT_MAX_2         (0x1 << STM32_MODE_OSPEED_SHIFT)
      91           0 : #define STM32_MODE_OUTPUT_MAX_50        (0x2 << STM32_MODE_OSPEED_SHIFT)
      92           0 : #define STM32_MODE_OSPEED_MASK          0x3
      93           0 : #define STM32_MODE_OSPEED_SHIFT         3
      94             : 
      95           0 : #define STM32_CNF_PUSH_PULL             (0x0 << STM32_CNF_OUT_0_SHIFT)
      96           0 : #define STM32_CNF_OPEN_DRAIN            (0x1 << STM32_CNF_OUT_0_SHIFT)
      97           0 : #define STM32_CNF_OUT_0_MASK            0x1
      98           0 : #define STM32_CNF_OUT_0_SHIFT           5
      99             : 
     100           0 : #define STM32_CNF_GP_OUTPUT             (0x0 << STM32_CNF_OUT_1_SHIFT)
     101           0 : #define STM32_CNF_ALT_FUNC              (0x1 << STM32_CNF_OUT_1_SHIFT)
     102           0 : #define STM32_CNF_OUT_1_MASK            0x1
     103           0 : #define STM32_CNF_OUT_1_SHIFT           6
     104             : 
     105             : /* GPIO High impedance/Pull-up/Pull-down */
     106           0 : #define STM32_PUPD_NO_PULL              (0x0 << STM32_PUPD_SHIFT)
     107           0 : #define STM32_PUPD_PULL_UP              (0x1 << STM32_PUPD_SHIFT)
     108           0 : #define STM32_PUPD_PULL_DOWN            (0x2 << STM32_PUPD_SHIFT)
     109           0 : #define STM32_PUPD_MASK                 0x3
     110           0 : #define STM32_PUPD_SHIFT                7
     111             : 
     112             : /* GPIO plain output value */
     113           0 : #define STM32_ODR_0                     (0x0 << STM32_ODR_SHIFT)
     114           0 : #define STM32_ODR_1                     (0x1 << STM32_ODR_SHIFT)
     115           0 : #define STM32_ODR_MASK                  0x1
     116           0 : #define STM32_ODR_SHIFT                 9
     117             : 
     118             : #endif  /* ZEPHYR_STM32_PINCTRLF1_H_ */