Line data    Source code

       1            0 : /*
       2              :  * SPDX-License-Identifier: Apache-2.0
       3              :  * Copyright (c) 2024 sensry.io
       4              :  */
       5              : 
       6              : #ifndef _ZEPHYR_DT_BINDINGS_PINCTRL_SY1XX_PINCTRL_
       7              : #define _ZEPHYR_DT_BINDINGS_PINCTRL_SY1XX_PINCTRL_
       8              : 
       9            0 : #define SY1XX_PAD(pad) (pad * 8)
      10              : 
      11            0 : #define SY1XX_UART0_PAD_CFG0 0x0020
      12            0 : #define SY1XX_UART1_PAD_CFG0 0x0024
      13            0 : #define SY1XX_UART2_PAD_CFG0 0x0028
      14              : 
      15            0 : #define SY1XX_SPI0_PAD_CFG0 0x002c
      16            0 : #define SY1XX_SPI0_PAD_CFG1 0x0030
      17              : 
      18            0 : #define SY1XX_SPI1_PAD_CFG0 0x0034
      19            0 : #define SY1XX_SPI1_PAD_CFG1 0x0038
      20              : 
      21            0 : #define SY1XX_SPI2_PAD_CFG0 0x003c
      22            0 : #define SY1XX_SPI2_PAD_CFG1 0x0040
      23              : 
      24            0 : #define SY1XX_SPI3_PAD_CFG0 0x0044
      25            0 : #define SY1XX_SPI3_PAD_CFG1 0x0048
      26              : 
      27            0 : #define SY1XX_SPI4_PAD_CFG0 0x004c
      28            0 : #define SY1XX_SPI4_PAD_CFG1 0x0050
      29              : 
      30            0 : #define SY1XX_SPI5_PAD_CFG0 0x0054
      31            0 : #define SY1XX_SPI5_PAD_CFG1 0x0058
      32              : 
      33            0 : #define SY1XX_SPI6_PAD_CFG0 0x005c
      34            0 : #define SY1XX_SPI6_PAD_CFG1 0x0060
      35              : 
      36            0 : #define SY1XX_I2C0_PAD_CFG0 0x0100
      37            0 : #define SY1XX_I2C1_PAD_CFG0 0x0104
      38            0 : #define SY1XX_I2C2_PAD_CFG0 0x0108
      39            0 : #define SY1XX_I2C3_PAD_CFG0 0x010c
      40              : 
      41            0 : #define SY1XX_GPIO0_PAD_CFG0 0x0110
      42            0 : #define SY1XX_GPIO0_PAD_CFG1 0x0114
      43            0 : #define SY1XX_GPIO0_PAD_CFG2 0x0118
      44            0 : #define SY1XX_GPIO0_PAD_CFG3 0x011c
      45            0 : #define SY1XX_GPIO0_PAD_CFG4 0x0120
      46            0 : #define SY1XX_GPIO0_PAD_CFG5 0x0124
      47            0 : #define SY1XX_GPIO0_PAD_CFG6 0x0128
      48            0 : #define SY1XX_GPIO0_PAD_CFG7 0x012c
      49              : 
      50            0 : #define SY1XX_RGMII0_PAD_CFG0 0x0130
      51            0 : #define SY1XX_RGMII0_PAD_CFG1 0x0134
      52            0 : #define SY1XX_RGMII0_PAD_CFG2 0x0138
      53            0 : #define SY1XX_RGMII0_PAD_CFG3 0x013c
      54              : 
      55            0 : #define SY1XX_CAN0_PAD_CFG0 0x0140
      56              : 
      57            0 : #define SY1XX_I2S0_PAD_CFG0 0x0144
      58            0 : #define SY1XX_I2S1_PAD_CFG0 0x0148
      59            0 : #define SY1XX_I2S2_PAD_CFG0 0x014c
      60            0 : #define SY1XX_I2S3_PAD_CFG0 0x0150
      61              : 
      62            0 : #define SY1XX_HBUS0_PAD_CFG0 0x0154
      63            0 : #define SY1XX_HBUS0_PAD_CFG1 0x0158
      64            0 : #define SY1XX_HBUS0_PAD_CFG2 0x015c
      65            0 : #define SY1XX_HBUS0_PAD_CFG3 0x0160
      66              : 
      67            0 : #define SY1XX_QSPI0_PAD_CFG0 0x0164
      68            0 : #define SY1XX_QSPI0_PAD_CFG1 0x0168
      69              : 
      70              : #endif /* _ZEPHYR_DT_BINDINGS_PINCTRL_SY1XX_PINCTRL_ */