Line data    Source code

       1            0 : /*
       2              :  * Copyright 2024 NXP
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : 
       7              : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_POWER_IMX95_POWER_H_
       8              : #define ZEPHYR_INCLUDE_DT_BINDINGS_POWER_IMX95_POWER_H_
       9              : 
      10            0 : #define IMX95_PD_ANA       0
      11            0 : #define IMX95_PD_AON       1
      12            0 : #define IMX95_PD_BBSM      2
      13            0 : #define IMX95_PD_CAMERA    3
      14            0 : #define IMX95_PD_CCMSRCGPC 4
      15            0 : #define IMX95_PD_A55C0     5
      16            0 : #define IMX95_PD_A55C1     6
      17            0 : #define IMX95_PD_A55C2     7
      18            0 : #define IMX95_PD_A55C3     8
      19            0 : #define IMX95_PD_A55C4     9
      20            0 : #define IMX95_PD_A55C5     10
      21            0 : #define IMX95_PD_A55P      11
      22            0 : #define IMX95_PD_DDR       12
      23            0 : #define IMX95_PD_DISPLAY   13
      24            0 : #define IMX95_PD_GPU       14
      25            0 : #define IMX95_PD_HSIO_TOP  15
      26            0 : #define IMX95_PD_HSIO_WAON 16
      27            0 : #define IMX95_PD_M7        17
      28            0 : #define IMX95_PD_NETC      18
      29            0 : #define IMX95_PD_NOC       19
      30            0 : #define IMX95_PD_NPU       20
      31            0 : #define IMX95_PD_VPU       21
      32            0 : #define IMX95_PD_WAKEUP    22
      33              : 
      34              : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_POWER_IMX95_POWER_H_ */