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1 0 : /* 2 : * Copyright (c) 2023 Nordic Semiconductor ASA 3 : * 4 : * SPDX-License-Identifier: Apache-2.0 5 : */ 6 : 7 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_REGULATOR_NPM2100_H_ 8 : #define ZEPHYR_INCLUDE_DT_BINDINGS_REGULATOR_NPM2100_H_ 9 : 10 : /** 11 : * @defgroup regulator_npm2100 NPM2100 Devicetree helpers. 12 : * @ingroup regulator_interface 13 : * @{ 14 : */ 15 : 16 : /** 17 : * @name NPM2100 Regulator modes 18 : * @{ 19 : */ 20 : /* Load switch selection, applies to LDOSW only */ 21 0 : #define NPM2100_REG_LDSW_EN 0x01U 22 : 23 : /* DPS modes applies to BOOST only */ 24 0 : #define NPM2100_REG_DPS_MASK 0x03U 25 0 : #define NPM2100_REG_DPS_ALLOW 0x01U 26 0 : #define NPM2100_REG_DPS_ALLOWLP 0x02U 27 : 28 : /* Operating mode */ 29 0 : #define NPM2100_REG_OPER_MASK 0x1CU 30 0 : #define NPM2100_REG_OPER_AUTO 0x00U 31 0 : #define NPM2100_REG_OPER_HP 0x04U 32 0 : #define NPM2100_REG_OPER_LP 0x08U 33 0 : #define NPM2100_REG_OPER_ULP 0x0CU 34 0 : #define NPM2100_REG_OPER_PASS 0x10U 35 0 : #define NPM2100_REG_OPER_NOHP 0x14U 36 0 : #define NPM2100_REG_OPER_OFF 0x18U 37 : 38 : /* Forced mode when GPIO active */ 39 0 : #define NPM2100_REG_FORCE_MASK 0xE0U 40 0 : #define NPM2100_REG_FORCE_HP 0x20U 41 0 : #define NPM2100_REG_FORCE_LP 0x40U 42 0 : #define NPM2100_REG_FORCE_ULP 0x60U 43 0 : #define NPM2100_REG_FORCE_PASS 0x80U 44 0 : #define NPM2100_REG_FORCE_NOHP 0xA0U 45 : 46 : /** @} */ 47 : 48 : /** @} */ 49 : 50 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_REGULATOR_NPM2100_H_*/