Line data Source code
1 0 : /*
2 : * Copyright (c) 2025 Nuvoton Technology Corporation.
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 :
7 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M55M1X_RESET_H
8 : #define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M55M1X_RESET_H
9 :
10 : /* Beginning of M55M1 BSP sys_reg.h reset module copy */
11 :
12 0 : #define SYS_RSTCTL_CHIPRST_Pos 0
13 0 : #define SYS_RSTCTL_NPURST_Pos 6
14 0 : #define SYS_ACMPRST_ACMP01RST_Pos 0
15 0 : #define SYS_ACMPRST_ACMP23RST_Pos 1
16 0 : #define SYS_AWFRST_AWF0RST_Pos 0
17 0 : #define SYS_BPWMRST_BPWM0RST_Pos 0
18 0 : #define SYS_BPWMRST_BPWM1RST_Pos 1
19 0 : #define SYS_CANFDRST_CANFD0RST_Pos 0
20 0 : #define SYS_CANFDRST_CANFD1RST_Pos 1
21 0 : #define SYS_CCAPRST_CCAP0RST_Pos 0
22 0 : #define SYS_CRCRST_CRC0RST_Pos 0
23 0 : #define SYS_CRYPTORST_CRYPTO0RST_Pos 0
24 0 : #define SYS_DACRST_DAC01RST_Pos 0
25 0 : #define SYS_DMICRST_DMIC0RST_Pos 0
26 0 : #define SYS_EADCRST_EADC0RST_Pos 0
27 0 : #define SYS_EBIRST_EBI0RST_Pos 0
28 0 : #define SYS_ECAPRST_ECAP0RST_Pos 0
29 0 : #define SYS_ECAPRST_ECAP1RST_Pos 1
30 0 : #define SYS_ECAPRST_ECAP2RST_Pos 2
31 0 : #define SYS_ECAPRST_ECAP3RST_Pos 3
32 0 : #define SYS_EMACRST_EMAC0RST_Pos 0
33 0 : #define SYS_EPWMRST_EPWM0RST_Pos 0
34 0 : #define SYS_EPWMRST_EPWM1RST_Pos 1
35 0 : #define SYS_EQEIRST_EQEI0RST_Pos 0
36 0 : #define SYS_EQEIRST_EQEI1RST_Pos 1
37 0 : #define SYS_EQEIRST_EQEI2RST_Pos 2
38 0 : #define SYS_EQEIRST_EQEI3RST_Pos 3
39 0 : #define SYS_FMCRST_FMC0RST_Pos 0
40 0 : #define SYS_GDMARST_GDMA0RST_Pos 0
41 0 : #define SYS_GPIORST_GPIO0RST_Pos 0
42 0 : #define SYS_HSOTGRST_HSOTG0RST_Pos 0
43 0 : #define SYS_HSUSBDRST_HSUSBD0RST_Pos 0
44 0 : #define SYS_HSUSBHRST_HSUSBH0RST_Pos 0
45 0 : #define SYS_I2CRST_I2C0RST_Pos 0
46 0 : #define SYS_I2CRST_I2C1RST_Pos 1
47 0 : #define SYS_I2CRST_I2C2RST_Pos 2
48 0 : #define SYS_I2CRST_I2C3RST_Pos 3
49 0 : #define SYS_I2SRST_I2S0RST_Pos 0
50 0 : #define SYS_I2SRST_I2S1RST_Pos 1
51 0 : #define SYS_I3CRST_I3C0RST_Pos 0
52 0 : #define SYS_KDFRST_KDF0RST_Pos 0
53 0 : #define SYS_KPIRST_KPI0RST_Pos 0
54 0 : #define SYS_KSRST_KS0RST_Pos 0
55 0 : #define SYS_LPADCRST_LPADC0RST_Pos 0
56 0 : #define SYS_LPPDMARST_LPPDMA0RST_Pos 0
57 0 : #define SYS_LPGPIORST_LPGPIO0RST_Pos 0
58 0 : #define SYS_LPI2CRST_LPI2C0RST_Pos 0
59 0 : #define SYS_LPSPIRST_LPSPI0RST_Pos 0
60 0 : #define SYS_LPTMRRST_LPTMR0RST_Pos 0
61 0 : #define SYS_LPTMRRST_LPTMR1RST_Pos 1
62 0 : #define SYS_LPUARTRST_LPUART0RST_Pos 0
63 0 : #define SYS_OTFCRST_OTFC0RST_Pos 0
64 0 : #define SYS_OTGRST_OTG0RST_Pos 0
65 0 : #define SYS_PDMARST_PDMA0RST_Pos 0
66 0 : #define SYS_PDMARST_PDMA1RST_Pos 1
67 0 : #define SYS_PSIORST_PSIO0RST_Pos 0
68 0 : #define SYS_QSPIRST_QSPI0RST_Pos 0
69 0 : #define SYS_QSPIRST_QSPI1RST_Pos 1
70 0 : #define SYS_RTCRST_RTC0RST_Pos 0
71 0 : #define SYS_SCRST_SC0RST_Pos 0
72 0 : #define SYS_SCRST_SC1RST_Pos 1
73 0 : #define SYS_SCRST_SC2RST_Pos 2
74 0 : #define SYS_SCURST_SCU0RST_Pos 0
75 0 : #define SYS_SDHRST_SDH0RST_Pos 0
76 0 : #define SYS_SDHRST_SDH1RST_Pos 1
77 0 : #define SYS_SPIRST_SPI0RST_Pos 0
78 0 : #define SYS_SPIRST_SPI1RST_Pos 1
79 0 : #define SYS_SPIRST_SPI2RST_Pos 2
80 0 : #define SYS_SPIRST_SPI3RST_Pos 3
81 0 : #define SYS_SPIMRST_SPIM0RST_Pos 0
82 0 : #define SYS_TMRRST_TMR0RST_Pos 0
83 0 : #define SYS_TMRRST_TMR1RST_Pos 1
84 0 : #define SYS_TMRRST_TMR2RST_Pos 2
85 0 : #define SYS_TMRRST_TMR3RST_Pos 3
86 0 : #define SYS_TRNGRST_TRNG0RST_Pos 0
87 0 : #define SYS_TTMRRST_TTMR0RST_Pos 0
88 0 : #define SYS_TTMRRST_TTMR1RST_Pos 1
89 0 : #define SYS_UARTRST_UART0RST_Pos 0
90 0 : #define SYS_UARTRST_UART1RST_Pos 1
91 0 : #define SYS_UARTRST_UART2RST_Pos 2
92 0 : #define SYS_UARTRST_UART3RST_Pos 3
93 0 : #define SYS_UARTRST_UART4RST_Pos 4
94 0 : #define SYS_UARTRST_UART5RST_Pos 5
95 0 : #define SYS_UARTRST_UART6RST_Pos 6
96 0 : #define SYS_UARTRST_UART7RST_Pos 7
97 0 : #define SYS_UARTRST_UART8RST_Pos 8
98 0 : #define SYS_UARTRST_UART9RST_Pos 9
99 0 : #define SYS_USBDRST_USBD0RST_Pos 0
100 0 : #define SYS_USBHRST_USBH0RST_Pos 0
101 0 : #define SYS_USCIRST_USCI0RST_Pos 0
102 0 : #define SYS_UTCPDRST_UTCPD0RST_Pos 0
103 0 : #define SYS_WWDTRST_WWDT0RST_Pos 0
104 0 : #define SYS_WWDTRST_WWDT1RST_Pos 1
105 :
106 : /* End of M55M1 BSP sys_reg.h reset module copy */
107 :
108 : /* Beginning of M55M1 BSP sys.h reset module copy */
109 :
110 : /*---------------------------------------------------------------------
111 : * Module Reset Control Resister constant definitions.
112 : *---------------------------------------------------------------------
113 : */
114 :
115 0 : #define NUMAKER_SYS_ACMP01RST ((0x200UL<<20) | SYS_ACMPRST_ACMP01RST_Pos)
116 0 : #define NUMAKER_SYS_ACMP23RST ((0x200UL<<20) | SYS_ACMPRST_ACMP23RST_Pos)
117 0 : #define NUMAKER_SYS_AWF0RST ((0x204UL<<20) | SYS_AWFRST_AWF0RST_Pos)
118 0 : #define NUMAKER_SYS_BPWM0RST ((0x208UL<<20) | SYS_BPWMRST_BPWM0RST_Pos)
119 0 : #define NUMAKER_SYS_BPWM1RST ((0x208UL<<20) | SYS_BPWMRST_BPWM1RST_Pos)
120 0 : #define NUMAKER_SYS_CANFD0RST ((0x20CUL<<20) | SYS_CANFDRST_CANFD0RST_Pos)
121 0 : #define NUMAKER_SYS_CANFD1RST ((0x20CUL<<20) | SYS_CANFDRST_CANFD1RST_Pos)
122 0 : #define NUMAKER_SYS_CCAP0RST ((0x210UL<<20) | SYS_CCAPRST_CCAP0RST_Pos)
123 0 : #define NUMAKER_SYS_CRC0RST ((0x214UL<<20) | SYS_CRCRST_CRC0RST_Pos)
124 0 : #define NUMAKER_SYS_CRYPTO0RST ((0x218UL<<20) | SYS_CRYPTORST_CRYPTO0RST_Pos)
125 0 : #define NUMAKER_SYS_DAC01RST ((0x21CUL<<20) | SYS_DACRST_DAC01RST_Pos)
126 0 : #define NUMAKER_SYS_DMIC0RST ((0x220UL<<20) | SYS_DMICRST_DMIC0RST_Pos)
127 0 : #define NUMAKER_SYS_EADC0RST ((0x224UL<<20) | SYS_EADCRST_EADC0RST_Pos)
128 0 : #define NUMAKER_SYS_EBI0RST ((0x228UL<<20) | SYS_EBIRST_EBI0RST_Pos)
129 0 : #define NUMAKER_SYS_ECAP0RST ((0x22CUL<<20) | SYS_ECAPRST_ECAP0RST_Pos)
130 0 : #define NUMAKER_SYS_ECAP1RST ((0x22CUL<<20) | SYS_ECAPRST_ECAP1RST_Pos)
131 0 : #define NUMAKER_SYS_ECAP2RST ((0x22CUL<<20) | SYS_ECAPRST_ECAP2RST_Pos)
132 0 : #define NUMAKER_SYS_ECAP3RST ((0x22CUL<<20) | SYS_ECAPRST_ECAP3RST_Pos)
133 0 : #define NUMAKER_SYS_EMAC0RST ((0x230UL<<20) | SYS_EMACRST_EMAC0RST_Pos)
134 0 : #define NUMAKER_SYS_EPWM0RST ((0x234UL<<20) | SYS_EPWMRST_EPWM0RST_Pos)
135 0 : #define NUMAKER_SYS_EPWM1RST ((0x234UL<<20) | SYS_EPWMRST_EPWM1RST_Pos)
136 0 : #define NUMAKER_SYS_EQEI0RST ((0x238UL<<20) | SYS_EQEIRST_EQEI0RST_Pos)
137 0 : #define NUMAKER_SYS_EQEI1RST ((0x238UL<<20) | SYS_EQEIRST_EQEI1RST_Pos)
138 0 : #define NUMAKER_SYS_EQEI2RST ((0x238UL<<20) | SYS_EQEIRST_EQEI2RST_Pos)
139 0 : #define NUMAKER_SYS_EQEI3RST ((0x238UL<<20) | SYS_EQEIRST_EQEI3RST_Pos)
140 0 : #define NUMAKER_SYS_FMC0RST ((0x23CUL<<20) | SYS_FMCRST_FMC0RST_Pos)
141 0 : #define NUMAKER_SYS_GDMA0RST ((0x240UL<<20) | SYS_GDMARST_GDMA0RST_Pos)
142 0 : #define NUMAKER_SYS_GPIO0RST ((0x244UL<<20) | SYS_GPIORST_GPIO0RST_Pos)
143 0 : #define NUMAKER_SYS_HSOTG0RST ((0x248UL<<20) | SYS_HSOTGRST_HSOTG0RST_Pos)
144 0 : #define NUMAKER_SYS_HSUSBD0RST ((0x24CUL<<20) | SYS_HSUSBDRST_HSUSBD0RST_Pos)
145 0 : #define NUMAKER_SYS_HSUSBH0RST ((0x250UL<<20) | SYS_HSUSBHRST_HSUSBH0RST_Pos)
146 0 : #define NUMAKER_SYS_I2C0RST ((0x254UL<<20) | SYS_I2CRST_I2C0RST_Pos)
147 0 : #define NUMAKER_SYS_I2C1RST ((0x254UL<<20) | SYS_I2CRST_I2C1RST_Pos)
148 0 : #define NUMAKER_SYS_I2C2RST ((0x254UL<<20) | SYS_I2CRST_I2C2RST_Pos)
149 0 : #define NUMAKER_SYS_I2C3RST ((0x254UL<<20) | SYS_I2CRST_I2C3RST_Pos)
150 0 : #define NUMAKER_SYS_I2S0RST ((0x258UL<<20) | SYS_I2SRST_I2S0RST_Pos)
151 0 : #define NUMAKER_SYS_I2S1RST ((0x258UL<<20) | SYS_I2SRST_I2S1RST_Pos)
152 0 : #define NUMAKER_SYS_I3C0RST ((0x25CUL<<20) | SYS_I3CRST_I3C0RST_Pos)
153 0 : #define NUMAKER_SYS_KDF0RST ((0x260UL<<20) | SYS_KDFRST_KDF0RST_Pos)
154 0 : #define NUMAKER_SYS_KPI0RST ((0x264UL<<20) | SYS_KPIRST_KPI0RST_Pos)
155 0 : #define NUMAKER_SYS_KS0RST ((0x268UL<<20) | SYS_KSRST_KS0RST_Pos)
156 0 : #define NUMAKER_SYS_LPADC0RST ((0x26CUL<<20) | SYS_LPADCRST_LPADC0RST_Pos)
157 0 : #define NUMAKER_SYS_LPPDMA0RST ((0x270UL<<20) | SYS_LPPDMARST_LPPDMA0RST_Pos)
158 0 : #define NUMAKER_SYS_LPGPIO0RST ((0x274UL<<20) | SYS_LPGPIORST_LPGPIO0RST_Pos)
159 0 : #define NUMAKER_SYS_LPI2C0RST ((0x278UL<<20) | SYS_LPI2CRST_LPI2C0RST_Pos)
160 0 : #define NUMAKER_SYS_LPSPI0RST ((0x27CUL<<20) | SYS_LPSPIRST_LPSPI0RST_Pos)
161 0 : #define NUMAKER_SYS_LPTMR0RST ((0x280UL<<20) | SYS_LPTMRRST_LPTMR0RST_Pos)
162 0 : #define NUMAKER_SYS_LPTMR1RST ((0x280UL<<20) | SYS_LPTMRRST_LPTMR1RST_Pos)
163 0 : #define NUMAKER_SYS_LPUART0RST ((0x284UL<<20) | SYS_LPUARTRST_LPUART0RST_Pos)
164 0 : #define NUMAKER_SYS_NPURST ((0x004UL<<20) | SYS_RSTCTL_NPURST_Pos)
165 0 : #define NUMAKER_SYS_OTFC0RST ((0x288UL<<20) | SYS_OTFCRST_OTFC0RST_Pos)
166 0 : #define NUMAKER_SYS_OTG0RST ((0x28CUL<<20) | SYS_OTGRST_OTG0RST_Pos)
167 0 : #define NUMAKER_SYS_PDMA0RST ((0x290UL<<20) | SYS_PDMARST_PDMA0RST_Pos)
168 0 : #define NUMAKER_SYS_PDMA1RST ((0x290UL<<20) | SYS_PDMARST_PDMA1RST_Pos)
169 0 : #define NUMAKER_SYS_PSIO0RST ((0x294UL<<20) | SYS_PSIORST_PSIO0RST_Pos)
170 0 : #define NUMAKER_SYS_QSPI0RST ((0x298UL<<20) | SYS_QSPIRST_QSPI0RST_Pos)
171 0 : #define NUMAKER_SYS_QSPI1RST ((0x298UL<<20) | SYS_QSPIRST_QSPI1RST_Pos)
172 0 : #define NUMAKER_SYS_RTC0RST ((0x29CUL<<20) | SYS_RTCRST_RTC0RST_Pos)
173 0 : #define NUMAKER_SYS_SC0RST ((0x2A0UL<<20) | SYS_SCRST_SC0RST_Pos)
174 0 : #define NUMAKER_SYS_SC1RST ((0x2A0UL<<20) | SYS_SCRST_SC1RST_Pos)
175 0 : #define NUMAKER_SYS_SC2RST ((0x2A0UL<<20) | SYS_SCRST_SC2RST_Pos)
176 0 : #define NUMAKER_SYS_SCU0RST ((0x2A4UL<<20) | SYS_SCURST_SCU0RST_Pos)
177 0 : #define NUMAKER_SYS_SDH0RST ((0x2A8UL<<20) | SYS_SDHRST_SDH0RST_Pos)
178 0 : #define NUMAKER_SYS_SDH1RST ((0x2A8UL<<20) | SYS_SDHRST_SDH1RST_Pos)
179 0 : #define NUMAKER_SYS_SPI0RST ((0x2ACUL<<20) | SYS_SPIRST_SPI0RST_Pos)
180 0 : #define NUMAKER_SYS_SPI1RST ((0x2ACUL<<20) | SYS_SPIRST_SPI1RST_Pos)
181 0 : #define NUMAKER_SYS_SPI2RST ((0x2ACUL<<20) | SYS_SPIRST_SPI2RST_Pos)
182 0 : #define NUMAKER_SYS_SPI3RST ((0x2ACUL<<20) | SYS_SPIRST_SPI3RST_Pos)
183 0 : #define NUMAKER_SYS_SPIM0RST ((0x2B0UL<<20) | SYS_SPIMRST_SPIM0RST_Pos)
184 0 : #define NUMAKER_SYS_TMR0RST ((0x2C0UL<<20) | SYS_TMRRST_TMR0RST_Pos)
185 0 : #define NUMAKER_SYS_TMR1RST ((0x2C0UL<<20) | SYS_TMRRST_TMR1RST_Pos)
186 0 : #define NUMAKER_SYS_TMR2RST ((0x2C0UL<<20) | SYS_TMRRST_TMR2RST_Pos)
187 0 : #define NUMAKER_SYS_TMR3RST ((0x2C0UL<<20) | SYS_TMRRST_TMR3RST_Pos)
188 0 : #define NUMAKER_SYS_TRNG0RST ((0x2C4UL<<20) | SYS_TRNGRST_TRNG0RST_Pos)
189 0 : #define NUMAKER_SYS_TTMR0RST ((0x2C8UL<<20) | SYS_TTMRRST_TTMR0RST_Pos)
190 0 : #define NUMAKER_SYS_TTMR1RST ((0x2C8UL<<20) | SYS_TTMRRST_TTMR1RST_Pos)
191 0 : #define NUMAKER_SYS_UART0RST ((0x2CCUL<<20) | SYS_UARTRST_UART0RST_Pos)
192 0 : #define NUMAKER_SYS_UART1RST ((0x2CCUL<<20) | SYS_UARTRST_UART1RST_Pos)
193 0 : #define NUMAKER_SYS_UART2RST ((0x2CCUL<<20) | SYS_UARTRST_UART2RST_Pos)
194 0 : #define NUMAKER_SYS_UART3RST ((0x2CCUL<<20) | SYS_UARTRST_UART3RST_Pos)
195 0 : #define NUMAKER_SYS_UART4RST ((0x2CCUL<<20) | SYS_UARTRST_UART4RST_Pos)
196 0 : #define NUMAKER_SYS_UART5RST ((0x2CCUL<<20) | SYS_UARTRST_UART5RST_Pos)
197 0 : #define NUMAKER_SYS_UART6RST ((0x2CCUL<<20) | SYS_UARTRST_UART6RST_Pos)
198 0 : #define NUMAKER_SYS_UART7RST ((0x2CCUL<<20) | SYS_UARTRST_UART7RST_Pos)
199 0 : #define NUMAKER_SYS_UART8RST ((0x2CCUL<<20) | SYS_UARTRST_UART8RST_Pos)
200 0 : #define NUMAKER_SYS_UART9RST ((0x2CCUL<<20) | SYS_UARTRST_UART9RST_Pos)
201 0 : #define NUMAKER_SYS_USBD0RST ((0x2D0UL<<20) | SYS_USBDRST_USBD0RST_Pos)
202 0 : #define NUMAKER_SYS_USBH0RST ((0x2D4UL<<20) | SYS_USBHRST_USBH0RST_Pos)
203 0 : #define NUMAKER_SYS_USCI0RST ((0x2D8UL<<20) | SYS_USCIRST_USCI0RST_Pos)
204 0 : #define NUMAKER_SYS_UTCPD0RST ((0x2DCUL<<20) | SYS_UTCPDRST_UTCPD0RST_Pos)
205 0 : #define NUMAKER_SYS_WWDT0RST ((0x2E0UL<<20) | SYS_WWDTRST_WWDT0RST_Pos)
206 0 : #define NUMAKER_SYS_WWDT1RST ((0x2E0UL<<20) | SYS_WWDTRST_WWDT1RST_Pos)
207 :
208 : /* End of M55M1 BSP sys.h reset module copy */
209 :
210 : #endif
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