Line data    Source code

       1            0 : /*
       2              :  * Copyright (c) 2022 Google Inc
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : 
       7              : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_STM32U5_RESET_H_
       8              : #define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_STM32U5_RESET_H_
       9              : 
      10              : #include "stm32-common.h"
      11              : 
      12              : /* RCC bus reset register offset */
      13            0 : #define STM32_RESET_BUS_AHB1  0x60
      14            0 : #define STM32_RESET_BUS_AHB2L 0x64
      15            0 : #define STM32_RESET_BUS_AHB2H 0x68
      16            0 : #define STM32_RESET_BUS_AHB3  0x6C
      17            0 : #define STM32_RESET_BUS_APB1L 0x74
      18            0 : #define STM32_RESET_BUS_APB1H 0x78
      19            0 : #define STM32_RESET_BUS_APB2  0x7C
      20            0 : #define STM32_RESET_BUS_APB3  0x80
      21              : 
      22              : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_RESET_STM32U5_RESET_H_ */