Line data    Source code

       1            0 : /*
       2              :  * Copyright (c) 2023 STMicroelectronics
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ST_LIS2DU12_H_
       7              : #define ZEPHYR_INCLUDE_DT_BINDINGS_ST_LIS2DU12_H_
       8              : 
       9              : /* Accel range */
      10            0 : #define LIS2DU12_DT_FS_2G                       0
      11            0 : #define LIS2DU12_DT_FS_4G                       1
      12            0 : #define LIS2DU12_DT_FS_8G                       2
      13            0 : #define LIS2DU12_DT_FS_16G                      3
      14              : 
      15              : /* Accel rates */
      16            0 : #define LIS2DU12_DT_ODR_OFF                     0x00 /* Power-Down */
      17            0 : #define LIS2DU12_DT_ODR_AT_1Hz6_ULP             0x01 /* 1Hz6 (ultra low power) */
      18            0 : #define LIS2DU12_DT_ODR_AT_3Hz_ULP              0x02 /* 3Hz (ultra low power) */
      19            0 : #define LIS2DU12_DT_ODR_AT_6Hz_ULP              0x03 /* 6Hz (ultra low power) */
      20            0 : #define LIS2DU12_DT_ODR_AT_6Hz                  0x04 /* 6Hz (normal) */
      21            0 : #define LIS2DU12_DT_ODR_AT_12Hz                 0x05 /* 12Hz5 (normal) */
      22            0 : #define LIS2DU12_DT_ODR_AT_25Hz                 0x06 /* 25Hz (normal) */
      23            0 : #define LIS2DU12_DT_ODR_AT_50Hz                 0x07 /* 50Hz (normal) */
      24            0 : #define LIS2DU12_DT_ODR_AT_100Hz                0x08 /* 100Hz (normal) */
      25            0 : #define LIS2DU12_DT_ODR_AT_200Hz                0x09 /* 200Hz (normal) */
      26            0 : #define LIS2DU12_DT_ODR_AT_400Hz                0x0a /* 400Hz (normal) */
      27            0 : #define LIS2DU12_DT_ODR_AT_800Hz                0x0b /* 800Hz (normal) */
      28            0 : #define LIS2DU12_DT_ODR_TRIG_PIN                0x0e /* Single-shot high latency by INT2 */
      29            0 : #define LIS2DU12_DT_ODR_TRIG_SW                 0x0f /* Single-shot high latency by IF */
      30              : 
      31              : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ST_LIS2DU12_H_ */