Zephyr API Documentation 4.0.99
A Scalable Open Source RTOS
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max32680_dma.h
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1/*
2 * Copyright (c) 2024 Analog Devices, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32680_DMA_H_
8#define ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32680_DMA_H_
9
10#define MAX32_DMA_SLOT_MEMTOMEM 0x00U
11#define MAX32_DMA_SLOT_SPI1_RX 0x01U
12#define MAX32_DMA_SLOT_UART0_RX 0x04U
13#define MAX32_DMA_SLOT_UART1_RX 0x05U
14#define MAX32_DMA_SLOT_I2C0_RX 0x07U
15#define MAX32_DMA_SLOT_I2C1_RX 0x08U
16#define MAX32_DMA_SLOT_ADC 0x09U
17#define MAX32_DMA_SLOT_UART2_RX 0x0EU
18#define MAX32_DMA_SLOT_SPI0_RX 0x0FU
19#define MAX32_DMA_SLOT_UART3_RX 0x1CU
20#define MAX32_DMA_SLOT_I2S_RX 0x1EU
21#define MAX32_DMA_SLOT_SPI1_TX 0x21U
22#define MAX32_DMA_SLOT_UART0_TX 0x24U
23#define MAX32_DMA_SLOT_UART1_TX 0x25U
24#define MAX32_DMA_SLOT_I2C0_TX 0x27U
25#define MAX32_DMA_SLOT_I2C1_TX 0x28U
26#define MAX32_DMA_SLOT_CRC 0x2CU
27#define MAX32_DMA_SLOT_UART2_TX 0x2EU
28#define MAX32_DMA_SLOT_SPI0_TX 0x2FU
29#define MAX32_DMA_SLOT_UART3_TX 0x3CU
30#define MAX32_DMA_SLOT_I2S_TX 0x3EU
31
32#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32680_DMA_H_ */