Zephyr API Documentation 4.1.99
A Scalable Open Source RTOS
 4.1.99
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siwx91x-pinctrl.h
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1/*
2 * Copyright (c) 2024 Silicon Laboratories Inc.
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6#ifndef INCLUDE_ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_SIWX91X_PINCTRL_H_
7#define INCLUDE_ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_SIWX91X_PINCTRL_H_
8
9#include <zephyr/dt-bindings/pinctrl/silabs-pinctrl-siwx91x.h>
10
11/* clang-format off */
12
13#define AGPIO_ULP0 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 0)
14#define AGPIO_ULP1 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 1)
15#define AGPIO_ULP2 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 2)
16#define AGPIO_ULP4 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 4)
17#define AGPIO_ULP5 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 5)
18#define AGPIO_ULP6 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 6)
19#define AGPIO_ULP7 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 7)
20#define AGPIO_ULP8 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 8)
21#define AGPIO_ULP9 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 9)
22#define AGPIO_ULP10 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 10)
23#define AGPIO_ULP11 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 11)
24
25#define AUXULP_TRIG0_PA11 SIWX91X_GPIO(9, 5, 6, 0, 11, 5)
26#define AUXULP_TRIG0_PB14 SIWX91X_GPIO(11, 5, 0, 1, 14, 11)
27#define AUXULP_TRIG0_PD1 SIWX91X_GPIO(9, 5, 13, 3, 1, 11)
28#define AUXULP_TRIG0_ULP5 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 5)
29#define AUXULP_TRIG0_ULP6 SIWX91X_GPIO(0xFF, 10, 0xFF, 4, 0, 6)
30#define AUXULP_TRIG0_ULP11 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 11)
31#define AUXULP_TRIG1_ULP4 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 4)
32#define AUXULP_TRIG1_ULP7 SIWX91X_GPIO(0xFF, 10, 0xFF, 4, 0, 7)
33
34#define CLK_I2SPLL_PB11 SIWX91X_GPIO(12, 0xFF, 0, 1, 11, 0)
35#define CLK_I2SPLL_PD0 SIWX91X_GPIO(10, 0xFF, 12, 3, 0, 0)
36#define CLK_I2SPLL_PD6 SIWX91X_GPIO(10, 0xFF, 18, 3, 6, 0)
37#define CLK_INTFPLL_PB10 SIWX91X_GPIO(12, 0xFF, 0, 1, 10, 0)
38#define CLK_INTFPLL_PC15 SIWX91X_GPIO(10, 0xFF, 11, 2, 15, 0)
39#define CLK_INTFPLL_PD5 SIWX91X_GPIO(10, 0xFF, 17, 3, 5, 0)
40#define CLK_MCUOUT_PA11 SIWX91X_GPIO(12, 0xFF, 6, 0, 11, 0)
41#define CLK_MEMSREF_PD2 SIWX91X_GPIO(10, 0xFF, 14, 3, 2, 0)
42#define CLK_MEMSREF_PD8 SIWX91X_GPIO(10, 0xFF, 20, 3, 8, 0)
43#define CLK_OUT_PA12 SIWX91X_GPIO(8, 0xFF, 7, 0, 12, 0)
44#define CLK_OUT_PA15 SIWX91X_GPIO(8, 0xFF, 8, 0, 15, 0)
45#define CLK_PLLTESTMODE_PD3 SIWX91X_GPIO(10, 0xFF, 15, 3, 3, 0)
46#define CLK_SOCPLL_PB9 SIWX91X_GPIO(12, 0xFF, 0, 1, 9, 0)
47#define CLK_SOCPLL_PC14 SIWX91X_GPIO(10, 0xFF, 10, 2, 14, 0)
48#define CLK_SOCPLL_PD4 SIWX91X_GPIO(10, 0xFF, 16, 3, 4, 0)
49#define CLK_XTALONIN_PB12 SIWX91X_GPIO(12, 0xFF, 0, 1, 12, 0)
50#define CLK_XTALONIN_PD9 SIWX91X_GPIO(10, 0xFF, 21, 3, 9, 0)
51
52#define COMP1_OUT_PA8 SIWX91X_GPIO(9, 5, 3, 0, 8, 2)
53#define COMP1_OUT_PB12 SIWX91X_GPIO(11, 5, 0, 1, 12, 9)
54#define COMP1_OUT_PC15 SIWX91X_GPIO(9, 5, 11, 2, 15, 9)
55#define COMP1_OUT_ULP2 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 2)
56#define COMP1_OUT_ULP6 SIWX91X_GPIO(0xFF, 9, 0xFF, 4, 0, 6)
57#define COMP2_OUT_ULP7 SIWX91X_GPIO(0xFF, 9, 0xFF, 4, 0, 7)
58
59#define GSPI_CLK_PA8 SIWX91X_GPIO(4, 0xFF, 3, 0, 8, 0)
60#define GSPI_CLK_PB9 SIWX91X_GPIO(4, 0xFF, 0, 1, 9, 0)
61#define GSPI_CLK_PC14 SIWX91X_GPIO(4, 0xFF, 10, 2, 14, 0)
62#define GSPI_CLK_PD4 SIWX91X_GPIO(4, 0xFF, 16, 3, 4, 0)
63#define GSPI_CS0_PA9 SIWX91X_GPIO(4, 0xFF, 4, 0, 9, 0)
64#define GSPI_CS0_PB12 SIWX91X_GPIO(4, 0xFF, 0, 1, 12, 0)
65#define GSPI_CS0_PD1 SIWX91X_GPIO(4, 0xFF, 13, 3, 1, 0)
66#define GSPI_CS0_PD5 SIWX91X_GPIO(4, 0xFF, 17, 3, 5, 0)
67#define GSPI_CS1_PA10 SIWX91X_GPIO(4, 0xFF, 5, 0, 10, 0)
68#define GSPI_CS1_PB13 SIWX91X_GPIO(4, 0xFF, 0, 1, 13, 0)
69#define GSPI_CS1_PD2 SIWX91X_GPIO(4, 0xFF, 14, 3, 2, 0)
70#define GSPI_CS1_PD6 SIWX91X_GPIO(4, 0xFF, 18, 3, 6, 0)
71#define GSPI_CS2_PA15 SIWX91X_GPIO(4, 0xFF, 8, 0, 15, 0)
72#define GSPI_CS2_PB14 SIWX91X_GPIO(4, 0xFF, 0, 1, 14, 0)
73#define GSPI_CS2_PD3 SIWX91X_GPIO(4, 0xFF, 15, 3, 3, 0)
74#define GSPI_CS2_PD7 SIWX91X_GPIO(4, 0xFF, 19, 3, 7, 0)
75#define GSPI_MISO_PA11 SIWX91X_GPIO(4, 0xFF, 6, 0, 11, 0)
76#define GSPI_MISO_PB10 SIWX91X_GPIO(4, 0xFF, 0, 1, 10, 0)
77#define GSPI_MISO_PC15 SIWX91X_GPIO(4, 0xFF, 11, 2, 15, 0)
78#define GSPI_MISO_PD8 SIWX91X_GPIO(4, 0xFF, 20, 3, 8, 0)
79#define GSPI_MOSI_PA6 SIWX91X_GPIO(12, 0xFF, 1, 0, 6, 0)
80#define GSPI_MOSI_PA12 SIWX91X_GPIO(4, 0xFF, 7, 0, 12, 0)
81#define GSPI_MOSI_PB11 SIWX91X_GPIO(4, 0xFF, 0, 1, 11, 0)
82#define GSPI_MOSI_PD0 SIWX91X_GPIO(4, 0xFF, 12, 3, 0, 0)
83#define GSPI_MOSI_PD9 SIWX91X_GPIO(4, 0xFF, 21, 3, 9, 0)
84
85#define I2C0_SCL_PA7 SIWX91X_GPIO(4, 0xFF, 2, 0, 7, 0)
86#define I2C0_SCL_PC0 SIWX91X_GPIO(11, 0xFF, 9, 2, 0, 0)
87#define I2C0_SCL_ULP1 SIWX91X_GPIO(4, 6, 23, 4, 1, 1)
88#define I2C0_SCL_ULP2 SIWX91X_GPIO(4, 6, 24, 4, 2, 2)
89#define I2C0_SCL_ULP11 SIWX91X_GPIO(4, 6, 33, 4, 11, 11)
90#define I2C0_SDA_PA6 SIWX91X_GPIO(4, 0xFF, 1, 0, 6, 0)
91#define I2C0_SDA_PB15 SIWX91X_GPIO(11, 0xFF, 9, 1, 15, 0)
92#define I2C0_SDA_ULP0 SIWX91X_GPIO(4, 6, 22, 4, 0, 0)
93#define I2C0_SDA_ULP3 SIWX91X_GPIO(4, 6, 25, 4, 3, 3)
94#define I2C0_SDA_ULP10 SIWX91X_GPIO(4, 6, 32, 4, 10, 10)
95
96#define I2C1_SCL_PA6 SIWX91X_GPIO(5, 0xFF, 1, 0, 6, 0)
97#define I2C1_SCL_PB13 SIWX91X_GPIO(5, 0xFF, 0, 1, 13, 0)
98#define I2C1_SCL_PC1 SIWX91X_GPIO(11, 0xFF, 9, 2, 1, 0)
99#define I2C1_SCL_PD2 SIWX91X_GPIO(5, 0xFF, 14, 3, 2, 0)
100#define I2C1_SCL_PD6 SIWX91X_GPIO(5, 0xFF, 18, 3, 6, 0)
101#define I2C1_SCL_ULP0 SIWX91X_GPIO(5, 6, 22, 4, 0, 0)
102#define I2C1_SCL_ULP2 SIWX91X_GPIO(5, 6, 24, 4, 2, 2)
103#define I2C1_SCL_ULP6 SIWX91X_GPIO(5, 6, 28, 4, 6, 6)
104#define I2C1_SDA_PA7 SIWX91X_GPIO(5, 0xFF, 2, 0, 7, 0)
105#define I2C1_SDA_PB14 SIWX91X_GPIO(5, 0xFF, 0, 1, 14, 0)
106#define I2C1_SDA_PC2 SIWX91X_GPIO(11, 0xFF, 9, 2, 2, 0)
107#define I2C1_SDA_PD3 SIWX91X_GPIO(5, 0xFF, 15, 3, 3, 0)
108#define I2C1_SDA_PD7 SIWX91X_GPIO(5, 0xFF, 19, 3, 7, 0)
109#define I2C1_SDA_ULP1 SIWX91X_GPIO(5, 6, 23, 4, 1, 1)
110#define I2C1_SDA_ULP3 SIWX91X_GPIO(5, 6, 25, 4, 3, 3)
111#define I2C1_SDA_ULP7 SIWX91X_GPIO(5, 6, 29, 4, 7, 7)
112
113#define I2S0_CLK_PA8 SIWX91X_GPIO(7, 0xFF, 3, 0, 8, 0)
114#define I2S0_CLK_PB9 SIWX91X_GPIO(7, 0xFF, 0, 1, 9, 0)
115#define I2S0_CLK_PC14 SIWX91X_GPIO(7, 0xFF, 10, 2, 14, 0)
116#define I2S0_CLK_PD4 SIWX91X_GPIO(7, 0xFF, 16, 3, 4, 0)
117#define I2S0_DIN0_PA10 SIWX91X_GPIO(7, 0xFF, 5, 0, 10, 0)
118#define I2S0_DIN0_PB11 SIWX91X_GPIO(7, 0xFF, 0, 1, 11, 0)
119#define I2S0_DIN0_PD0 SIWX91X_GPIO(7, 0xFF, 12, 3, 0, 0)
120#define I2S0_DIN0_PD8 SIWX91X_GPIO(7, 0xFF, 20, 3, 8, 0)
121#define I2S0_DIN1_PA6 SIWX91X_GPIO(7, 0xFF, 1, 0, 6, 0)
122#define I2S0_DIN1_PB13 SIWX91X_GPIO(7, 0xFF, 0, 1, 13, 0)
123#define I2S0_DIN1_PD2 SIWX91X_GPIO(7, 0xFF, 14, 3, 2, 0)
124#define I2S0_DIN1_PD6 SIWX91X_GPIO(7, 0xFF, 18, 3, 6, 0)
125#define I2S0_DOUT0_PA11 SIWX91X_GPIO(7, 0xFF, 6, 0, 11, 0)
126#define I2S0_DOUT0_PB12 SIWX91X_GPIO(7, 0xFF, 0, 1, 12, 0)
127#define I2S0_DOUT0_PD1 SIWX91X_GPIO(7, 0xFF, 13, 3, 1, 0)
128#define I2S0_DOUT0_PD9 SIWX91X_GPIO(7, 0xFF, 21, 3, 9, 0)
129#define I2S0_DOUT1_PA7 SIWX91X_GPIO(7, 0xFF, 2, 0, 7, 0)
130#define I2S0_DOUT1_PB13 SIWX91X_GPIO(7, 0xFF, 0, 1, 14, 0)
131#define I2S0_DOUT1_PD3 SIWX91X_GPIO(7, 0xFF, 15, 3, 3, 0)
132#define I2S0_DOUT1_PD7 SIWX91X_GPIO(7, 0xFF, 19, 3, 7, 0)
133#define I2S0_WS_PA9 SIWX91X_GPIO(7, 0xFF, 4, 0, 9, 0)
134#define I2S0_WS_PB10 SIWX91X_GPIO(7, 0xFF, 0, 1, 10, 0)
135#define I2S0_WS_PC15 SIWX91X_GPIO(7, 0xFF, 11, 2, 15, 0)
136#define I2S0_WS_PD5 SIWX91X_GPIO(7, 0xFF, 17, 3, 5, 0)
137
138#define IR_INPUT_PA15 SIWX91X_GPIO(9, 1, 8, 0, 15, 7)
139#define IR_INPUT_PB10 SIWX91X_GPIO(11, 1, 0, 1, 10, 7)
140#define IR_INPUT_PB13 SIWX91X_GPIO(11, 4, 0, 1, 13, 10)
141#define IR_INPUT_PD0 SIWX91X_GPIO(9, 4, 12, 3, 0, 10)
142#define IR_INPUT_ULP4 SIWX91X_GPIO(0xFF, 10, 0xFF, 4, 0, 4)
143#define IR_INPUT_ULP7 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 7)
144#define IR_INPUT_ULP10 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 10)
145#define IR_OUTPUT_PA11 SIWX91X_GPIO(9, 1, 6, 0, 11, 5)
146#define IR_OUTPUT_ULP5 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 5)
147
148#define PMU_TEST1_PA6 SIWX91X_GPIO(8, 0xFF, 1, 0, 6, 0)
149#define PMU_TEST1_PB13 SIWX91X_GPIO(8, 0xFF, 0, 1, 13, 0)
150#define PMU_TEST1_PB14 SIWX91X_GPIO(12, 0xFF, 0, 1, 14, 0)
151#define PMU_TEST1_ULP0 SIWX91X_GPIO(13, 6, 22, 4, 0, 0)
152#define PMU_TEST1_ULP2 SIWX91X_GPIO(10, 6, 24, 4, 2, 2)
153#define PMU_TEST1_ULP6 SIWX91X_GPIO(12, 6, 28, 4, 6, 6)
154#define PMU_TEST1_ULP10 SIWX91X_GPIO(10, 6, 32, 4, 10, 10)
155#define PMU_TEST2_PA7 SIWX91X_GPIO(8, 0xFF, 2, 0, 7, 0)
156#define PMU_TEST2_PB14 SIWX91X_GPIO(8, 0xFF, 0, 1, 14, 0)
157#define PMU_TEST2_ULP1 SIWX91X_GPIO(13, 6, 23, 4, 1, 1)
158#define PMU_TEST2_ULP3 SIWX91X_GPIO(10, 6, 25, 4, 3, 3)
159#define PMU_TEST2_ULP7 SIWX91X_GPIO(12, 6, 29, 4, 7, 7)
160#define PMU_TEST2_ULP11 SIWX91X_GPIO(10, 6, 33, 4, 11, 11)
161
162#define PSRAM_CLK_PC14 SIWX91X_GPIO(11, 0xFF, 10, 2, 14, 0)
163#define PSRAM_CLK_PD4 SIWX91X_GPIO(12, 0xFF, 16, 3, 4, 0)
164#define PSRAM_CSN0_PD1 SIWX91X_GPIO(11, 0xFF, 13, 3, 1, 0)
165#define PSRAM_CSN0_PD7 SIWX91X_GPIO(12, 0xFF, 19, 3, 7, 0)
166#define PSRAM_CSN1_PD5 SIWX91X_GPIO(11, 0xFF, 17, 3, 5, 0)
167#define PSRAM_D0_PC15 SIWX91X_GPIO(11, 0xFF, 11, 2, 15, 0)
168#define PSRAM_D0_PD5 SIWX91X_GPIO(12, 0xFF, 17, 3, 5, 0)
169#define PSRAM_D1_PD0 SIWX91X_GPIO(11, 0xFF, 12, 3, 0, 0)
170#define PSRAM_D1_PD6 SIWX91X_GPIO(12, 0xFF, 18, 3, 6, 0)
171#define PSRAM_D2_PD2 SIWX91X_GPIO(11, 0xFF, 14, 3, 2, 0)
172#define PSRAM_D2_PD8 SIWX91X_GPIO(12, 0xFF, 20, 3, 8, 0)
173#define PSRAM_D3_PD3 SIWX91X_GPIO(11, 0xFF, 15, 3, 3, 0)
174#define PSRAM_D3_PD9 SIWX91X_GPIO(12, 0xFF, 21, 3, 9, 0)
175#define PSRAM_D4_PD6 SIWX91X_GPIO(11, 0xFF, 18, 3, 6, 0)
176#define PSRAM_D5_PD7 SIWX91X_GPIO(11, 0xFF, 19, 3, 7, 0)
177#define PSRAM_D6_PD8 SIWX91X_GPIO(11, 0xFF, 20, 3, 8, 0)
178#define PSRAM_D7_PD9 SIWX91X_GPIO(11, 0xFF, 21, 3, 9, 0)
179
180#define PWM_0H_PA7 SIWX91X_GPIO(10, 0xFF, 2, 0, 7, 0)
181#define PWM_0H_ULP1 SIWX91X_GPIO(12, 6, 23, 4, 1, 1)
182#define PWM_0L_PA6 SIWX91X_GPIO(10, 0xFF, 1, 0, 6, 0)
183#define PWM_0L_ULP0 SIWX91X_GPIO(12, 6, 22, 4, 0, 0)
184#define PWM_1H_PA9 SIWX91X_GPIO(10, 0xFF, 4, 0, 9, 0)
185#define PWM_1H_ULP3 SIWX91X_GPIO(8, 6, 25, 4, 3, 3)
186#define PWM_1H_ULP5 SIWX91X_GPIO(12, 6, 27, 4, 5, 5)
187#define PWM_1L_PA8 SIWX91X_GPIO(10, 0xFF, 3, 0, 8, 0)
188#define PWM_1L_ULP2 SIWX91X_GPIO(8, 6, 24, 4, 2, 2)
189#define PWM_1L_ULP4 SIWX91X_GPIO(12, 6, 26, 4, 4, 4)
190#define PWM_2H_PA11 SIWX91X_GPIO(10, 0xFF, 6, 0, 11, 0)
191#define PWM_2H_ULP5 SIWX91X_GPIO(8, 6, 27, 4, 5, 5)
192#define PWM_2L_PA10 SIWX91X_GPIO(10, 0xFF, 5, 0, 10, 0)
193#define PWM_2L_ULP4 SIWX91X_GPIO(8, 6, 26, 4, 4, 4)
194#define PWM_3H_PA15 SIWX91X_GPIO(10, 0xFF, 8, 0, 15, 0)
195#define PWM_3H_ULP7 SIWX91X_GPIO(8, 6, 29, 4, 7, 7)
196#define PWM_3L_PA12 SIWX91X_GPIO(10, 0xFF, 7, 0, 12, 0)
197#define PWM_3L_ULP6 SIWX91X_GPIO(8, 6, 28, 4, 6, 6)
198#define PWM_EXTTRIG0_PB11 SIWX91X_GPIO(10, 0xFF, 0, 1, 11, 0)
199#define PWM_EXTTRIG0_PD3 SIWX91X_GPIO(8, 0xFF, 15, 3, 3, 0)
200#define PWM_EXTTRIG0_ULP6 SIWX91X_GPIO(10, 6, 28, 4, 6, 6)
201#define PWM_EXTTRIG0_ULP11 SIWX91X_GPIO(8, 6, 33, 4, 11, 11)
202#define PWM_EXTTRIG1_PB12 SIWX91X_GPIO(10, 0xFF, 0, 1, 12, 0)
203#define PWM_EXTTRIG1_PD6 SIWX91X_GPIO(8, 0xFF, 18, 3, 6, 0)
204#define PWM_EXTTRIG1_ULP7 SIWX91X_GPIO(10, 6, 29, 4, 7, 7)
205#define PWM_EXTTRIG2_PB13 SIWX91X_GPIO(10, 0xFF, 0, 1, 13, 0)
206#define PWM_EXTTRIG2_PD7 SIWX91X_GPIO(8, 0xFF, 19, 3, 7, 0)
207#define PWM_EXTTRIG2_ULP8 SIWX91X_GPIO(10, 6, 30, 4, 8, 8)
208#define PWM_EXTTRIG3_PB14 SIWX91X_GPIO(10, 0xFF, 0, 1, 14, 0)
209#define PWM_EXTTRIG3_PD2 SIWX91X_GPIO(8, 0xFF, 14, 3, 2, 0)
210#define PWM_EXTTRIG3_ULP9 SIWX91X_GPIO(10, 6, 31, 4, 9, 9)
211#define PWM_FAULTA_PB9 SIWX91X_GPIO(10, 0xFF, 0, 1, 9, 0)
212#define PWM_FAULTA_ULP4 SIWX91X_GPIO(10, 6, 26, 4, 4, 4)
213#define PWM_FAULTA_ULP9 SIWX91X_GPIO(8, 6, 31, 4, 9, 9)
214#define PWM_FAULTB_PB10 SIWX91X_GPIO(10, 0xFF, 0, 1, 10, 0)
215#define PWM_FAULTB_ULP5 SIWX91X_GPIO(10, 6, 27, 4, 5, 5)
216#define PWM_FAULTB_ULP10 SIWX91X_GPIO(8, 6, 32, 4, 10, 10)
217#define PWM_SLEEPEVENT_ULP8 SIWX91X_GPIO(8, 6, 30, 4, 8, 8)
218
219#define QEI_DIR_PA11 SIWX91X_GPIO(5, 0xFF, 6, 0, 11, 0)
220#define QEI_DIR_PB12 SIWX91X_GPIO(5, 0xFF, 0, 1, 12, 0)
221#define QEI_DIR_PC2 SIWX91X_GPIO(13, 0xFF, 9, 2, 2, 0)
222#define QEI_DIR_PD1 SIWX91X_GPIO(3, 0xFF, 13, 3, 1, 0)
223#define QEI_DIR_PD9 SIWX91X_GPIO(5, 0xFF, 21, 3, 9, 0)
224#define QEI_DIR_ULP3 SIWX91X_GPIO(3, 6, 25, 4, 3, 3)
225#define QEI_DIR_ULP7 SIWX91X_GPIO(3, 6, 29, 4, 7, 7)
226#define QEI_DIR_ULP11 SIWX91X_GPIO(3, 6, 33, 4, 11, 11)
227#define QEI_IDX_PA8 SIWX91X_GPIO(5, 0xFF, 3, 0, 8, 0)
228#define QEI_IDX_PB15 SIWX91X_GPIO(13, 0xFF, 9, 1, 15, 0)
229#define QEI_IDX_PB9 SIWX91X_GPIO(5, 0xFF, 0, 1, 9, 0)
230#define QEI_IDX_PC14 SIWX91X_GPIO(3, 0xFF, 10, 2, 14, 0)
231#define QEI_IDX_PD4 SIWX91X_GPIO(5, 0xFF, 16, 3, 4, 0)
232#define QEI_IDX_ULP0 SIWX91X_GPIO(3, 6, 22, 4, 0, 0)
233#define QEI_IDX_ULP4 SIWX91X_GPIO(3, 6, 26, 4, 4, 4)
234#define QEI_IDX_ULP8 SIWX91X_GPIO(3, 6, 30, 4, 8, 8)
235#define QEI_PHA_PA9 SIWX91X_GPIO(5, 0xFF, 4, 0, 9, 0)
236#define QEI_PHA_PB10 SIWX91X_GPIO(5, 0xFF, 0, 1, 10, 0)
237#define QEI_PHA_PC0 SIWX91X_GPIO(13, 0xFF, 9, 2, 0, 0)
238#define QEI_PHA_PC15 SIWX91X_GPIO(3, 0xFF, 11, 2, 15, 0)
239#define QEI_PHA_PD5 SIWX91X_GPIO(5, 0xFF, 17, 3, 5, 0)
240#define QEI_PHA_ULP1 SIWX91X_GPIO(3, 6, 23, 4, 1, 1)
241#define QEI_PHA_ULP5 SIWX91X_GPIO(3, 6, 27, 4, 5, 5)
242#define QEI_PHA_ULP9 SIWX91X_GPIO(3, 6, 31, 4, 9, 9)
243#define QEI_PHB_PA10 SIWX91X_GPIO(5, 0xFF, 5, 0, 10, 0)
244#define QEI_PHB_PB11 SIWX91X_GPIO(5, 0xFF, 0, 1, 11, 0)
245#define QEI_PHB_PC1 SIWX91X_GPIO(13, 0xFF, 9, 2, 1, 0)
246#define QEI_PHB_PD0 SIWX91X_GPIO(3, 0xFF, 12, 3, 0, 0)
247#define QEI_PHB_PD8 SIWX91X_GPIO(5, 0xFF, 20, 3, 8, 0)
248#define QEI_PHB_ULP2 SIWX91X_GPIO(3, 6, 24, 4, 2, 2)
249#define QEI_PHB_ULP6 SIWX91X_GPIO(3, 6, 28, 4, 6, 6)
250#define QEI_PHB_ULP10 SIWX91X_GPIO(3, 6, 32, 4, 10, 10)
251
252#define QSPI_CLK_PA8 SIWX91X_GPIO(11, 0xFF, 3, 0, 8, 0)
253#define QSPI_CLK_PC14 SIWX91X_GPIO(1, 0xFF, 10, 2, 14, 0)
254#define QSPI_CLK_PD4 SIWX91X_GPIO(9, 0xFF, 16, 3, 4, 0)
255#define QSPI_CSN0_PA7 SIWX91X_GPIO(11, 0xFF, 2, 0, 7, 0)
256#define QSPI_CSN0_PD1 SIWX91X_GPIO(1, 0xFF, 13, 3, 1, 0)
257#define QSPI_CSN0_PD7 SIWX91X_GPIO(9, 0xFF, 19, 3, 7, 0)
258#define QSPI_CSN1_PA7 SIWX91X_GPIO(12, 0xFF, 2, 0, 7, 0)
259#define QSPI_CSN1_PD5 SIWX91X_GPIO(1, 0xFF, 17, 3, 5, 0)
260#define QSPI_CSN9_PD1 SIWX91X_GPIO(10, 0xFF, 13, 3, 1, 0)
261#define QSPI_D0_PA6 SIWX91X_GPIO(11, 0xFF, 1, 0, 6, 0)
262#define QSPI_D0_PC15 SIWX91X_GPIO(1, 0xFF, 11, 2, 15, 0)
263#define QSPI_D0_PD5 SIWX91X_GPIO(9, 0xFF, 17, 3, 5, 0)
264#define QSPI_D1_PA9 SIWX91X_GPIO(11, 0xFF, 4, 0, 9, 0)
265#define QSPI_D1_PD0 SIWX91X_GPIO(1, 0xFF, 12, 3, 0, 0)
266#define QSPI_D1_PD6 SIWX91X_GPIO(9, 0xFF, 18, 3, 6, 0)
267#define QSPI_D2_PA10 SIWX91X_GPIO(11, 0xFF, 5, 0, 10, 0)
268#define QSPI_D2_PD2 SIWX91X_GPIO(1, 0xFF, 14, 3, 2, 0)
269#define QSPI_D2_PD8 SIWX91X_GPIO(9, 0xFF, 20, 3, 8, 0)
270#define QSPI_D3_PA11 SIWX91X_GPIO(11, 0xFF, 6, 0, 11, 0)
271#define QSPI_D3_PD3 SIWX91X_GPIO(1, 0xFF, 15, 3, 3, 0)
272#define QSPI_D3_PD9 SIWX91X_GPIO(9, 0xFF, 21, 3, 9, 0)
273#define QSPI_D4_PD6 SIWX91X_GPIO(1, 0xFF, 18, 3, 6, 0)
274#define QSPI_D5_PD7 SIWX91X_GPIO(1, 0xFF, 19, 3, 7, 0)
275#define QSPI_D6_PD8 SIWX91X_GPIO(1, 0xFF, 20, 3, 8, 0)
276#define QSPI_D7_PD9 SIWX91X_GPIO(1, 0xFF, 21, 3, 9, 0)
277
278#define SCT_IN0_PB9 SIWX91X_GPIO(9, 0xFF, 0, 1, 9, 0)
279#define SCT_IN0_ULP0 SIWX91X_GPIO(7, 6, 22, 4, 0, 0)
280#define SCT_IN0_ULP4 SIWX91X_GPIO(9, 6, 26, 4, 4, 4)
281#define SCT_IN1_PB10 SIWX91X_GPIO(9, 0xFF, 0, 1, 10, 0)
282#define SCT_IN1_ULP1 SIWX91X_GPIO(7, 6, 23, 4, 1, 1)
283#define SCT_IN1_ULP5 SIWX91X_GPIO(9, 6, 27, 4, 5, 5)
284#define SCT_IN2_PB11 SIWX91X_GPIO(9, 0xFF, 0, 1, 11, 0)
285#define SCT_IN2_ULP2 SIWX91X_GPIO(7, 6, 24, 4, 2, 2)
286#define SCT_IN2_ULP6 SIWX91X_GPIO(9, 6, 28, 4, 6, 6)
287#define SCT_IN3_PB12 SIWX91X_GPIO(9, 0xFF, 0, 1, 12, 0)
288#define SCT_IN3_ULP3 SIWX91X_GPIO(7, 6, 25, 4, 3, 3)
289#define SCT_IN3_ULP7 SIWX91X_GPIO(9, 6, 29, 4, 7, 7)
290#define SCT_OUT0_PB13 SIWX91X_GPIO(9, 0xFF, 0, 1, 13, 0)
291#define SCT_OUT0_ULP4 SIWX91X_GPIO(7, 6, 26, 4, 4, 4)
292#define SCT_OUT1_PB14 SIWX91X_GPIO(9, 0xFF, 0, 1, 14, 0)
293#define SCT_OUT1_ULP5 SIWX91X_GPIO(7, 6, 27, 4, 5, 5)
294#define SCT_OUT2_PA8 SIWX91X_GPIO(12, 0xFF, 3, 0, 8, 0)
295#define SCT_OUT2_ULP6 SIWX91X_GPIO(7, 6, 28, 4, 6, 6)
296#define SCT_OUT3_PA9 SIWX91X_GPIO(12, 0xFF, 4, 0, 9, 0)
297#define SCT_OUT3_ULP7 SIWX91X_GPIO(7, 6, 29, 4, 7, 7)
298#define SCT_OUT4_ULP4 SIWX91X_GPIO(13, 6, 26, 4, 4, 4)
299#define SCT_OUT4_ULP8 SIWX91X_GPIO(7, 6, 30, 4, 8, 8)
300#define SCT_OUT5_ULP5 SIWX91X_GPIO(13, 6, 27, 4, 5, 5)
301#define SCT_OUT5_ULP9 SIWX91X_GPIO(7, 6, 31, 4, 9, 9)
302#define SCT_OUT6_ULP6 SIWX91X_GPIO(13, 6, 28, 4, 6, 6)
303#define SCT_OUT6_ULP10 SIWX91X_GPIO(7, 6, 32, 4, 10, 10)
304#define SCT_OUT7_ULP7 SIWX91X_GPIO(13, 6, 29, 4, 7, 7)
305#define SCT_OUT7_ULP11 SIWX91X_GPIO(7, 6, 33, 4, 11, 11)
306
307#define SIO_0_PA6 SIWX91X_GPIO(1, 0xFF, 1, 0, 6, 0)
308#define SIO_0_PB9 SIWX91X_GPIO(1, 0xFF, 0, 1, 9, 0)
309#define SIO_0_ULP0 SIWX91X_GPIO(1, 6, 22, 4, 0, 0)
310#define SIO_0_ULP8 SIWX91X_GPIO(1, 6, 30, 4, 8, 8)
311#define SIO_1_PA7 SIWX91X_GPIO(1, 0xFF, 2, 0, 7, 0)
312#define SIO_1_PB10 SIWX91X_GPIO(1, 0xFF, 0, 1, 10, 0)
313#define SIO_1_ULP1 SIWX91X_GPIO(1, 6, 23, 4, 1, 1)
314#define SIO_1_ULP9 SIWX91X_GPIO(1, 6, 31, 4, 9, 9)
315#define SIO_2_PA8 SIWX91X_GPIO(1, 0xFF, 3, 0, 8, 0)
316#define SIO_2_PB11 SIWX91X_GPIO(1, 0xFF, 0, 1, 11, 0)
317#define SIO_2_ULP2 SIWX91X_GPIO(1, 6, 24, 4, 2, 2)
318#define SIO_2_ULP10 SIWX91X_GPIO(1, 6, 32, 4, 10, 10)
319#define SIO_3_PA9 SIWX91X_GPIO(1, 0xFF, 4, 0, 9, 0)
320#define SIO_3_PB12 SIWX91X_GPIO(1, 0xFF, 0, 1, 12, 0)
321#define SIO_3_ULP3 SIWX91X_GPIO(1, 6, 25, 4, 3, 3)
322#define SIO_3_ULP11 SIWX91X_GPIO(1, 6, 33, 4, 11, 11)
323#define SIO_4_PA10 SIWX91X_GPIO(1, 0xFF, 5, 0, 10, 0)
324#define SIO_4_PB13 SIWX91X_GPIO(1, 0xFF, 0, 1, 13, 0)
325#define SIO_4_ULP4 SIWX91X_GPIO(1, 6, 26, 4, 4, 4)
326#define SIO_5_PA11 SIWX91X_GPIO(1, 0xFF, 6, 0, 11, 0)
327#define SIO_5_PB14 SIWX91X_GPIO(1, 0xFF, 0, 1, 14, 0)
328#define SIO_5_ULP5 SIWX91X_GPIO(1, 6, 27, 4, 5, 5)
329#define SIO_6_ULP6 SIWX91X_GPIO(1, 6, 28, 4, 6, 6)
330#define SIO_7_PA15 SIWX91X_GPIO(1, 0xFF, 8, 0, 15, 0)
331#define SIO_7_ULP7 SIWX91X_GPIO(1, 6, 29, 4, 7, 7)
332
333#define SSI_CLK_PA8 SIWX91X_GPIO(3, 0xFF, 3, 0, 8, 0)
334#define SSI_CLK_PB9 SIWX91X_GPIO(3, 0xFF, 0, 1, 9, 0)
335#define SSI_CLK_PD4 SIWX91X_GPIO(3, 0xFF, 16, 3, 4, 0)
336#define SSI_CS0_PA9 SIWX91X_GPIO(3, 0xFF, 4, 0, 9, 0)
337#define SSI_CS0_PB12 SIWX91X_GPIO(3, 0xFF, 0, 1, 12, 0)
338#define SSI_CS0_PD5 SIWX91X_GPIO(3, 0xFF, 17, 3, 5, 0)
339#define SSI_CS1_PA10 SIWX91X_GPIO(3, 0xFF, 5, 0, 10, 0)
340#define SSI_CS2_PA15 SIWX91X_GPIO(3, 0xFF, 8, 0, 15, 0)
341#define SSI_CS2_PD2 SIWX91X_GPIO(3, 0xFF, 14, 3, 2, 0)
342#define SSI_CS3_PD3 SIWX91X_GPIO(3, 0xFF, 15, 3, 3, 0)
343#define SSI_DATA0_PA11 SIWX91X_GPIO(3, 0xFF, 6, 0, 11, 0)
344#define SSI_DATA0_PB10 SIWX91X_GPIO(3, 0xFF, 0, 1, 10, 0)
345#define SSI_DATA0_PD8 SIWX91X_GPIO(3, 0xFF, 20, 3, 8, 0)
346#define SSI_DATA1_PA10 SIWX91X_GPIO(12, 0xFF, 5, 0, 10, 0)
347#define SSI_DATA1_PA12 SIWX91X_GPIO(3, 0xFF, 7, 0, 12, 0)
348#define SSI_DATA1_PB11 SIWX91X_GPIO(3, 0xFF, 0, 1, 11, 0)
349#define SSI_DATA1_PD9 SIWX91X_GPIO(3, 0xFF, 21, 3, 9, 0)
350#define SSI_DATA2_PA6 SIWX91X_GPIO(3, 0xFF, 1, 0, 6, 0)
351#define SSI_DATA2_PB13 SIWX91X_GPIO(3, 0xFF, 0, 1, 13, 0)
352#define SSI_DATA2_PD6 SIWX91X_GPIO(3, 0xFF, 18, 3, 6, 0)
353#define SSI_DATA3_PA7 SIWX91X_GPIO(3, 0xFF, 2, 0, 7, 0)
354#define SSI_DATA3_PB14 SIWX91X_GPIO(3, 0xFF, 0, 1, 14, 0)
355#define SSI_DATA3_PD7 SIWX91X_GPIO(3, 0xFF, 19, 3, 7, 0)
356
357#define SSIS_CLK_PA8 SIWX91X_GPIO(8, 0xFF, 3, 0, 8, 0)
358#define SSIS_CLK_PB10 SIWX91X_GPIO(8, 0xFF, 0, 1, 10, 0)
359#define SSIS_CLK_PC15 SIWX91X_GPIO(8, 0xFF, 11, 2, 15, 0)
360#define SSIS_CLK_PD4 SIWX91X_GPIO(8, 0xFF, 16, 3, 4, 0)
361#define SSIS_CS_PA9 SIWX91X_GPIO(8, 0xFF, 4, 0, 9, 0)
362#define SSIS_CS_PB9 SIWX91X_GPIO(8, 0xFF, 0, 1, 9, 0)
363#define SSIS_CS_PC14 SIWX91X_GPIO(8, 0xFF, 10, 2, 14, 0)
364#define SSIS_CS_PD5 SIWX91X_GPIO(8, 0xFF, 17, 3, 5, 0)
365#define SSIS_MISO_PA11 SIWX91X_GPIO(8, 0xFF, 6, 0, 11, 0)
366#define SSIS_MISO_PB12 SIWX91X_GPIO(8, 0xFF, 0, 1, 12, 0)
367#define SSIS_MISO_PD1 SIWX91X_GPIO(8, 0xFF, 13, 3, 1, 0)
368#define SSIS_MISO_PD9 SIWX91X_GPIO(8, 0xFF, 21, 3, 9, 0)
369#define SSIS_MOSI_PA10 SIWX91X_GPIO(8, 0xFF, 5, 0, 10, 0)
370#define SSIS_MOSI_PB11 SIWX91X_GPIO(8, 0xFF, 0, 1, 11, 0)
371#define SSIS_MOSI_PD0 SIWX91X_GPIO(8, 0xFF, 12, 3, 0, 0)
372#define SSIS_MOSI_PD8 SIWX91X_GPIO(8, 0xFF, 20, 3, 8, 0)
373
374#define TIMER0_PA7 SIWX91X_GPIO(9, 5, 2, 0, 7, 1)
375#define TIMER0_PB11 SIWX91X_GPIO(11, 5, 0, 1, 11, 8)
376#define TIMER0_PC14 SIWX91X_GPIO(9, 5, 10, 2, 14, 8)
377#define TIMER0_ULP4 SIWX91X_GPIO(0xFF, 9, 0xFF, 4, 0, 4)
378#define TIMER0_ULP8 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 8)
379
380#define TIMER1_PA15 SIWX91X_GPIO(9, 5, 8, 0, 15, 7)
381#define TIMER1_PB10 SIWX91X_GPIO(11, 5, 0, 1, 10, 7)
382#define TIMER1_ULP5 SIWX91X_GPIO(0xFF, 9, 0xFF, 4, 0, 5)
383#define TIMER1_ULP7 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 7)
384
385#define TIMER2_ULP1 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 1)
386
387#define TRACE_CLK_PA7 SIWX91X_GPIO(13, 0xFF, 2, 0, 7, 0)
388#define TRACE_CLK_PC15 SIWX91X_GPIO(6, 0xFF, 11, 2, 15, 0)
389#define TRACE_CLK_PD5 SIWX91X_GPIO(6, 0xFF, 17, 3, 5, 0)
390#define TRACE_CLKIN_PA6 SIWX91X_GPIO(13, 0xFF, 1, 0, 6, 0)
391#define TRACE_CLKIN_PA15 SIWX91X_GPIO(6, 0xFF, 8, 0, 15, 0)
392#define TRACE_CLKIN_PC14 SIWX91X_GPIO(6, 0xFF, 10, 2, 14, 0)
393#define TRACE_CLKIN_PD4 SIWX91X_GPIO(6, 0xFF, 16, 3, 4, 0)
394#define TRACE_D0_PA8 SIWX91X_GPIO(13, 0xFF, 3, 0, 8, 0)
395#define TRACE_D0_PD0 SIWX91X_GPIO(6, 0xFF, 12, 3, 0, 0)
396#define TRACE_D0_PD6 SIWX91X_GPIO(6, 0xFF, 18, 3, 6, 0)
397#define TRACE_D1_PA9 SIWX91X_GPIO(13, 0xFF, 4, 0, 9, 0)
398#define TRACE_D1_PD1 SIWX91X_GPIO(6, 0xFF, 13, 3, 1, 0)
399#define TRACE_D1_PD7 SIWX91X_GPIO(6, 0xFF, 19, 3, 7, 0)
400#define TRACE_D2_PA10 SIWX91X_GPIO(13, 0xFF, 5, 0, 10, 0)
401#define TRACE_D2_PD2 SIWX91X_GPIO(6, 0xFF, 14, 3, 2, 0)
402#define TRACE_D2_PD8 SIWX91X_GPIO(6, 0xFF, 20, 3, 8, 0)
403#define TRACE_D3_PA11 SIWX91X_GPIO(13, 0xFF, 6, 0, 11, 0)
404#define TRACE_D3_PD3 SIWX91X_GPIO(6, 0xFF, 15, 3, 3, 0)
405#define TRACE_D3_PD9 SIWX91X_GPIO(6, 0xFF, 21, 3, 9, 0)
406
407#define UART1_CLK_PA8 SIWX91X_GPIO(2, 0xFF, 3, 0, 8, 0)
408#define UART1_CLK_PB9 SIWX91X_GPIO(2, 0xFF, 0, 1, 9, 0)
409#define UART1_CLK_PD4 SIWX91X_GPIO(2, 0xFF, 16, 3, 4, 0)
410#define UART1_CLK_ULP0 SIWX91X_GPIO(2, 6, 22, 4, 0, 0)
411#define UART1_CTS_PA6 SIWX91X_GPIO(2, 0xFF, 1, 0, 6, 0)
412#define UART1_CTS_PB10 SIWX91X_GPIO(2, 0xFF, 0, 1, 10, 0)
413#define UART1_CTS_PD8 SIWX91X_GPIO(2, 0xFF, 20, 3, 8, 0)
414#define UART1_CTS_ULP6 SIWX91X_GPIO(2, 6, 28, 4, 6, 6)
415#define UART1_DCD_PA12 SIWX91X_GPIO(2, 0xFF, 7, 0, 12, 0)
416#define UART1_DCD_PB13 SIWX91X_GPIO(12, 0xFF, 0, 1, 13, 0)
417#define UART1_DSR_PA11 SIWX91X_GPIO(2, 0xFF, 6, 0, 11, 0)
418#define UART1_DSR_PD9 SIWX91X_GPIO(2, 0xFF, 21, 3, 9, 0)
419#define UART1_DTR_PA7 SIWX91X_GPIO(2, 0xFF, 2, 0, 7, 0)
420#define UART1_IRRX_PB9 SIWX91X_GPIO(13, 0xFF, 0, 1, 9, 0)
421#define UART1_IRRX_PC15 SIWX91X_GPIO(2, 0xFF, 11, 2, 15, 0)
422#define UART1_IRRX_ULP0 SIWX91X_GPIO(11, 6, 22, 4, 0, 0)
423#define UART1_IRRX_ULP7 SIWX91X_GPIO(2, 6, 29, 4, 7, 7)
424#define UART1_IRTX_PB10 SIWX91X_GPIO(13, 0xFF, 0, 1, 10, 0)
425#define UART1_IRTX_PD0 SIWX91X_GPIO(2, 0xFF, 12, 3, 0, 0)
426#define UART1_IRTX_ULP1 SIWX91X_GPIO(11, 6, 23, 4, 1, 1)
427#define UART1_IRTX_ULP8 SIWX91X_GPIO(2, 6, 30, 4, 8, 8)
428#define UART1_RI_PB11 SIWX91X_GPIO(2, 0xFF, 0, 1, 11, 0)
429#define UART1_RI_PC14 SIWX91X_GPIO(2, 0xFF, 10, 2, 14, 0)
430#define UART1_RI_ULP4 SIWX91X_GPIO(11, 6, 26, 4, 4, 4)
431#define UART1_RS485DE_PB13 SIWX91X_GPIO(13, 0xFF, 0, 1, 13, 0)
432#define UART1_RS485DE_PD3 SIWX91X_GPIO(2, 0xFF, 15, 3, 3, 0)
433#define UART1_RS485DE_ULP7 SIWX91X_GPIO(11, 6, 29, 4, 7, 7)
434#define UART1_RS485DE_ULP11 SIWX91X_GPIO(2, 6, 33, 4, 11, 11)
435#define UART1_RS485EN_PB11 SIWX91X_GPIO(13, 0xFF, 0, 1, 11, 0)
436#define UART1_RS485EN_PD1 SIWX91X_GPIO(2, 0xFF, 13, 3, 1, 0)
437#define UART1_RS485EN_ULP5 SIWX91X_GPIO(11, 6, 27, 4, 5, 5)
438#define UART1_RS485EN_ULP9 SIWX91X_GPIO(2, 6, 31, 4, 9, 9)
439#define UART1_RS485RE_PB12 SIWX91X_GPIO(13, 0xFF, 0, 1, 12, 0)
440#define UART1_RS485RE_PD2 SIWX91X_GPIO(2, 0xFF, 14, 3, 2, 0)
441#define UART1_RS485RE_ULP6 SIWX91X_GPIO(11, 6, 28, 4, 6, 6)
442#define UART1_RS485RE_ULP10 SIWX91X_GPIO(2, 6, 32, 4, 10, 10)
443#define UART1_RTS_PA9 SIWX91X_GPIO(2, 0xFF, 4, 0, 9, 0)
444#define UART1_RTS_PB12 SIWX91X_GPIO(2, 0xFF, 0, 1, 12, 0)
445#define UART1_RTS_PD5 SIWX91X_GPIO(2, 0xFF, 17, 3, 5, 0)
446#define UART1_RTS_ULP5 SIWX91X_GPIO(2, 6, 27, 4, 5, 5)
447#define UART1_RX_PA10 SIWX91X_GPIO(2, 0xFF, 5, 0, 10, 0)
448#define UART1_RX_PB13 SIWX91X_GPIO(2, 0xFF, 0, 1, 13, 0)
449#define UART1_RX_PD7 SIWX91X_GPIO(2, 0xFF, 19, 3, 7, 0)
450#define UART1_RX_ULP1 SIWX91X_GPIO(2, 6, 23, 4, 1, 1)
451#define UART1_RX_ULP6 SIWX91X_GPIO(4, 6, 28, 4, 6, 6)
452#define UART1_TX_PB14 SIWX91X_GPIO(2, 0xFF, 0, 1, 14, 0)
453#define UART1_TX_PD6 SIWX91X_GPIO(2, 0xFF, 18, 3, 6, 0)
454#define UART1_TX_ULP4 SIWX91X_GPIO(2, 6, 26, 4, 4, 4)
455#define UART1_TX_ULP7 SIWX91X_GPIO(4, 6, 29, 4, 7, 7)
456
457#define UART2_CTS_PA11 SIWX91X_GPIO(6, 0xFF, 6, 0, 11, 0)
458#define UART2_CTS_PC0 SIWX91X_GPIO(12, 0xFF, 9, 2, 0, 0)
459#define UART2_CTS_PD3 SIWX91X_GPIO(9, 0xFF, 15, 3, 3, 0)
460#define UART2_CTS_ULP1 SIWX91X_GPIO(9, 6, 23, 4, 1, 1)
461#define UART2_CTS_ULP7 SIWX91X_GPIO(6, 6, 29, 4, 7, 7)
462#define UART2_CTS_ULP9 SIWX91X_GPIO(9, 6, 31, 4, 9, 9)
463#define UART2_RS485DE_PA9 SIWX91X_GPIO(6, 0xFF, 4, 0, 9, 0)
464#define UART2_RS485DE_ULP2 SIWX91X_GPIO(6, 6, 24, 4, 2, 2)
465#define UART2_RS485DE_ULP11 SIWX91X_GPIO(6, 6, 33, 4, 11, 11)
466#define UART2_RS485EN_PA12 SIWX91X_GPIO(6, 0xFF, 7, 0, 12, 0)
467#define UART2_RS485EN_PB10 SIWX91X_GPIO(6, 0xFF, 0, 1, 10, 0)
468#define UART2_RS485EN_ULP0 SIWX91X_GPIO(6, 6, 22, 4, 0, 0)
469#define UART2_RS485RE_PA8 SIWX91X_GPIO(6, 0xFF, 3, 0, 8, 0)
470#define UART2_RS485RE_ULP1 SIWX91X_GPIO(6, 6, 23, 4, 1, 1)
471#define UART2_RS485RE_ULP10 SIWX91X_GPIO(6, 6, 32, 4, 10, 10)
472#define UART2_RTS_PA10 SIWX91X_GPIO(6, 0xFF, 5, 0, 10, 0)
473#define UART2_RTS_PB11 SIWX91X_GPIO(6, 0xFF, 0, 1, 11, 0)
474#define UART2_RTS_PB12 SIWX91X_GPIO(6, 0xFF, 0, 1, 12, 0)
475#define UART2_RTS_PB15 SIWX91X_GPIO(12, 0xFF, 9, 1, 15, 0)
476#define UART2_RTS_PD2 SIWX91X_GPIO(9, 0xFF, 14, 3, 2, 0)
477#define UART2_RTS_ULP0 SIWX91X_GPIO(9, 6, 22, 4, 0, 0)
478#define UART2_RTS_ULP6 SIWX91X_GPIO(6, 6, 28, 4, 6, 6)
479#define UART2_RTS_ULP8 SIWX91X_GPIO(9, 6, 30, 4, 8, 8)
480#define UART2_RX_PA6 SIWX91X_GPIO(6, 0xFF, 1, 0, 6, 0)
481#define UART2_RX_PB13 SIWX91X_GPIO(6, 0xFF, 0, 1, 13, 0)
482#define UART2_RX_PC1 SIWX91X_GPIO(12, 0xFF, 9, 2, 1, 0)
483#define UART2_RX_ULP2 SIWX91X_GPIO(9, 6, 24, 4, 1, 1)
484#define UART2_RX_ULP4 SIWX91X_GPIO(6, 6, 26, 4, 4, 4)
485#define UART2_RX_ULP8 SIWX91X_GPIO(6, 6, 30, 4, 8, 8)
486#define UART2_RX_ULP10 SIWX91X_GPIO(9, 6, 32, 4, 10, 10)
487#define UART2_TX_PA15 SIWX91X_GPIO(2, 0xFF, 8, 0, 15, 0)
488#define UART2_TX_PA7 SIWX91X_GPIO(6, 0xFF, 2, 0, 7, 0)
489#define UART2_TX_PB14 SIWX91X_GPIO(6, 0xFF, 0, 1, 14, 0)
490#define UART2_TX_PC2 SIWX91X_GPIO(12, 0xFF, 9, 2, 2, 0)
491#define UART2_TX_ULP3 SIWX91X_GPIO(9, 6, 25, 4, 1, 1)
492#define UART2_TX_ULP5 SIWX91X_GPIO(6, 6, 27, 4, 5, 5)
493#define UART2_TX_ULP9 SIWX91X_GPIO(6, 6, 31, 4, 9, 9)
494#define UART2_TX_ULP11 SIWX91X_GPIO(9, 6, 33, 4, 11, 11)
495
496#define ULPI2C_SCL_PA11 SIWX91X_GPIO(9, 4, 6, 0, 11, 5)
497#define ULPI2C_SCL_PA15 SIWX91X_GPIO(9, 4, 8, 0, 15, 7)
498#define ULPI2C_SCL_PA7 SIWX91X_GPIO(9, 4, 2, 0, 7, 1)
499#define ULPI2C_SCL_PB10 SIWX91X_GPIO(11, 4, 0, 1, 10, 7)
500#define ULPI2C_SCL_PB11 SIWX91X_GPIO(11, 4, 0, 1, 11, 8)
501#define ULPI2C_SCL_PC14 SIWX91X_GPIO(9, 4, 10, 2, 14, 8)
502#define ULPI2C_SCL_ULP1 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 1)
503#define ULPI2C_SCL_ULP5 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 5)
504#define ULPI2C_SCL_ULP7 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 7)
505#define ULPI2C_SCL_ULP8 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 8)
506#define ULPI2C_SDA_PA6 SIWX91X_GPIO(9, 4, 1, 0, 6, 0)
507#define ULPI2C_SDA_PA10 SIWX91X_GPIO(9, 4, 5, 0, 10, 4)
508#define ULPI2C_SDA_PA12 SIWX91X_GPIO(9, 4, 7, 0, 12, 6)
509#define ULPI2C_SDA_PB9 SIWX91X_GPIO(11, 4, 0, 1, 9, 6)
510#define ULPI2C_SDA_PB12 SIWX91X_GPIO(11, 4, 0, 1, 12, 9)
511#define ULPI2C_SDA_PB14 SIWX91X_GPIO(11, 4, 0, 1, 14, 11)
512#define ULPI2C_SDA_PC15 SIWX91X_GPIO(9, 4, 11, 2, 15, 9)
513#define ULPI2C_SDA_PD1 SIWX91X_GPIO(9, 4, 13, 3, 1, 11)
514#define ULPI2C_SDA_ULP0 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 0)
515#define ULPI2C_SDA_ULP4 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 4)
516#define ULPI2C_SDA_ULP6 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 6)
517#define ULPI2C_SDA_ULP9 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 9)
518#define ULPI2C_SDA_ULP11 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 11)
519
520#define ULPI2S_CLK_PA15 SIWX91X_GPIO(9, 2, 8, 0, 15, 7)
521#define ULPI2S_CLK_PB10 SIWX91X_GPIO(11, 2, 0, 1, 10, 7)
522#define ULPI2S_CLK_PB11 SIWX91X_GPIO(11, 2, 0, 1, 11, 8)
523#define ULPI2S_CLK_PC14 SIWX91X_GPIO(9, 2, 10, 2, 14, 8)
524#define ULPI2S_CLK_ULP7 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 7)
525#define ULPI2S_CLK_ULP8 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 8)
526#define ULPI2S_DIN_PA12 SIWX91X_GPIO(9, 2, 7, 0, 12, 6)
527#define ULPI2S_DIN_PA6 SIWX91X_GPIO(9, 2, 1, 0, 6, 0)
528#define ULPI2S_DIN_PB9 SIWX91X_GPIO(11, 2, 0, 1, 9, 6)
529#define ULPI2S_DIN_PB12 SIWX91X_GPIO(11, 2, 0, 1, 12, 9)
530#define ULPI2S_DIN_PC15 SIWX91X_GPIO(9, 2, 11, 2, 15, 9)
531#define ULPI2S_DIN_ULP0 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 0)
532#define ULPI2S_DIN_ULP6 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 6)
533#define ULPI2S_DIN_ULP9 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 9)
534#define ULPI2S_DOUT_PA7 SIWX91X_GPIO(9, 2, 2, 0, 7, 1)
535#define ULPI2S_DOUT_PA11 SIWX91X_GPIO(9, 2, 6, 0, 11, 5)
536#define ULPI2S_DOUT_PB14 SIWX91X_GPIO(11, 2, 0, 1, 14, 11)
537#define ULPI2S_DOUT_PD1 SIWX91X_GPIO(9, 2, 13, 3, 1, 11)
538#define ULPI2S_DOUT_ULP1 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 1)
539#define ULPI2S_DOUT_ULP5 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 5)
540#define ULPI2S_DOUT_ULP11 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 11)
541#define ULPI2S_WS_PA8 SIWX91X_GPIO(9, 2, 3, 0, 8, 2)
542#define ULPI2S_WS_PA10 SIWX91X_GPIO(9, 2, 5, 0, 10, 4)
543#define ULPI2S_WS_PB13 SIWX91X_GPIO(11, 2, 0, 1, 13, 10)
544#define ULPI2S_WS_PD0 SIWX91X_GPIO(9, 2, 12, 3, 0, 10)
545#define ULPI2S_WS_ULP2 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 2)
546#define ULPI2S_WS_ULP4 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 4)
547#define ULPI2S_WS_ULP10 SIWX91X_GPIO(0xFF, 2, 0xFF, 4, 0, 10)
548
549#define ULPSSI_CLK_PA6 SIWX91X_GPIO(9, 1, 1, 0, 6, 0)
550#define ULPSSI_CLK_PB11 SIWX91X_GPIO(11, 1, 0, 1, 11, 8)
551#define ULPSSI_CLK_PC14 SIWX91X_GPIO(9, 1, 10, 2, 14, 8)
552#define ULPSSI_CLK_ULP0 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 0)
553#define ULPSSI_CLK_ULP4 SIWX91X_GPIO(0xFF, 8, 0xFF, 4, 0, 4)
554#define ULPSSI_CLK_ULP8 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 8)
555#define ULPSSI_CS0_PB13 SIWX91X_GPIO(11, 1, 0, 1, 13, 10)
556#define ULPSSI_CS0_PD0 SIWX91X_GPIO(9, 1, 12, 3, 0, 10)
557#define ULPSSI_CS0_ULP7 SIWX91X_GPIO(0xFF, 8, 0xFF, 4, 0, 7)
558#define ULPSSI_CS0_ULP10 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 10)
559#define ULPSSI_CS1_PA10 SIWX91X_GPIO(9, 1, 5, 0, 10, 4)
560#define ULPSSI_CS1_ULP4 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 4)
561#define ULPSSI_CS2_PA12 SIWX91X_GPIO(9, 1, 7, 0, 12, 6)
562#define ULPSSI_CS2_PB9 SIWX91X_GPIO(11, 1, 0, 1, 9, 6)
563#define ULPSSI_CS2_ULP6 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 6)
564#define ULPSSI_DIN_PA8 SIWX91X_GPIO(9, 1, 3, 0, 8, 2)
565#define ULPSSI_DIN_PB12 SIWX91X_GPIO(11, 1, 0, 1, 12, 9)
566#define ULPSSI_DIN_PC15 SIWX91X_GPIO(9, 1, 11, 2, 15, 9)
567#define ULPSSI_DIN_ULP2 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 2)
568#define ULPSSI_DIN_ULP6 SIWX91X_GPIO(0xFF, 8, 0xFF, 4, 0, 6)
569#define ULPSSI_DIN_ULP9 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 9)
570#define ULPSSI_DOUT_PA7 SIWX91X_GPIO(9, 1, 2, 0, 7, 1)
571#define ULPSSI_DOUT_PB14 SIWX91X_GPIO(11, 1, 0, 1, 14, 11)
572#define ULPSSI_DOUT_PD1 SIWX91X_GPIO(9, 1, 13, 3, 1, 11)
573#define ULPSSI_DOUT_ULP1 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 1)
574#define ULPSSI_DOUT_ULP5 SIWX91X_GPIO(0xFF, 8, 0xFF, 4, 0, 5)
575#define ULPSSI_DOUT_ULP11 SIWX91X_GPIO(0xFF, 1, 0xFF, 4, 0, 11)
576
577#define ULPUART_CTS_PA7 SIWX91X_GPIO(9, 3, 2, 0, 7, 1)
578#define ULPUART_CTS_PA11 SIWX91X_GPIO(9, 3, 6, 0, 11, 5)
579#define ULPUART_CTS_PB11 SIWX91X_GPIO(11, 3, 0, 1, 11, 8)
580#define ULPUART_CTS_PC14 SIWX91X_GPIO(9, 3, 10, 2, 14, 8)
581#define ULPUART_CTS_ULP1 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 1)
582#define ULPUART_CTS_ULP5 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 5)
583#define ULPUART_CTS_ULP8 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 8)
584#define ULPUART_RTS_PA6 SIWX91X_GPIO(9, 3, 1, 0, 6, 0)
585#define ULPUART_RTS_PA10 SIWX91X_GPIO(9, 3, 5, 0, 10, 4)
586#define ULPUART_RTS_PB13 SIWX91X_GPIO(11, 3, 0, 1, 13, 10)
587#define ULPUART_RTS_PD0 SIWX91X_GPIO(9, 3, 12, 3, 0, 10)
588#define ULPUART_RTS_ULP0 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 0)
589#define ULPUART_RTS_ULP4 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 4)
590#define ULPUART_RTS_ULP10 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 10)
591#define ULPUART_RX_PA8 SIWX91X_GPIO(9, 3, 3, 0, 8, 2)
592#define ULPUART_RX_PA12 SIWX91X_GPIO(9, 3, 7, 0, 12, 6)
593#define ULPUART_RX_PB9 SIWX91X_GPIO(11, 3, 0, 1, 9, 6)
594#define ULPUART_RX_PB12 SIWX91X_GPIO(11, 3, 0, 1, 12, 9)
595#define ULPUART_RX_PC15 SIWX91X_GPIO(9, 3, 11, 2, 15, 9)
596#define ULPUART_RX_ULP2 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 2)
597#define ULPUART_RX_ULP6 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 6)
598#define ULPUART_RX_ULP9 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 9)
599#define ULPUART_TX_PA15 SIWX91X_GPIO(9, 3, 8, 0, 15, 7)
600#define ULPUART_TX_PB10 SIWX91X_GPIO(11, 3, 0, 1, 10, 7)
601#define ULPUART_TX_PB14 SIWX91X_GPIO(11, 3, 0, 1, 14, 11)
602#define ULPUART_TX_PD1 SIWX91X_GPIO(9, 3, 13, 3, 1, 11)
603#define ULPUART_TX_ULP7 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 7)
604#define ULPUART_TX_ULP11 SIWX91X_GPIO(0xFF, 3, 0xFF, 4, 0, 11)
605
606#define UULP_GPIO4_ULP2 SIWX91X_GPIO(0xFF, 4, 0xFF, 4, 0, 2)
607#define UULP_TESTMODE0_ULP7 SIWX91X_GPIO(0xFF, 11, 0xFF, 4, 0, 7)
608#define UULP_TESTMODE0_ULP9 SIWX91X_GPIO(0xFF, 5, 0xFF, 4, 0, 9)
609
610/* clang-format on */
611
612/* The following definitions are duplicates of signals that are also
613 * available on the same pins using other GPIO modes.
614 * #define IR_OUTPUT_ULP5 SIWX91X_GPIO(0xFF, 10, 0xFF, 4, 0, 5)
615 * #define PMU_TEST2_PB14 SIWX91X_GPIO(13, 0xFF, 0, 1, 14, 0)
616 * #define PWM_1H_ULP1 SIWX91X_GPIO(8, 6, 23, 4, 1, 1)
617 * #define PWM_1L_ULP0 SIWX91X_GPIO(8, 6, 22, 4, 0, 0)
618 */
619
620#endif /* INCLUDE_ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_SIWX91X_PINCTRL_H_ */