Zephyr API Documentation
4.1.99
A Scalable Open Source RTOS
4.1.99
Toggle main menu visibility
Main Page
Related Pages
Topics
Data Structures
Data Structures
Data Structure Index
Data Fields
All
a
b
c
d
e
f
g
h
i
j
k
l
m
n
o
p
q
r
s
t
u
v
w
x
y
z
Functions
Variables
a
b
c
d
e
f
g
h
i
j
k
l
m
n
o
p
q
r
s
t
u
v
w
x
y
z
Enumerations
Enumerator
Files
File List
Globals
All
$
a
b
c
d
e
f
g
h
i
j
k
l
m
n
o
p
q
r
s
t
u
v
w
x
z
Functions
a
b
c
d
e
f
g
h
i
j
k
l
m
n
o
p
q
r
s
t
u
v
w
x
z
Variables
$
a
b
c
d
f
g
h
i
k
l
m
n
o
p
q
r
s
t
u
x
z
Typedefs
a
b
c
d
e
f
g
h
i
j
k
l
m
n
o
p
q
r
s
t
u
v
w
x
z
Enumerations
a
b
c
d
e
f
g
h
i
j
k
l
m
n
o
p
r
s
t
u
v
w
x
z
Enumerator
a
b
c
d
e
f
g
h
i
j
k
l
m
n
o
p
r
s
t
u
v
w
x
z
Macros
a
b
c
d
e
f
g
h
i
j
k
l
m
n
o
p
q
r
s
t
u
v
w
x
z
▼
Zephyr API Documentation
►
Introduction
Deprecated List
►
Topics
►
Data Structures
▼
Files
▼
File List
►
doc
►
kernel
►
lib
▼
subsys
►
fs
►
secure_storage
▼
testsuite
▼
include
▼
zephyr
►
test_toolchain
►
busy_sim.h
►
fff.h
►
fff_extensions.h
►
interrupt_util.h
►
tc_util.h
test_asm_inline_gcc.h
►
test_toolchain.h
►
test_utils.h
►
timestamp.h
►
ztest
►
zephyr
►
Globals
•
All
Data Structures
Files
Functions
Variables
Typedefs
Enumerations
Enumerator
Macros
Modules
Pages
Loading...
Searching...
No Matches
test_asm_inline_gcc.h
Go to the documentation of this file.
1
/* GCC specific test inline assembler functions and macros */
2
3
/*
4
* Copyright (c) 2015, Wind River Systems, Inc.
5
*
6
* SPDX-License-Identifier: Apache-2.0
7
*/
8
9
#ifndef _TEST_ASM_INLINE_GCC_H
10
#define _TEST_ASM_INLINE_GCC_H
11
12
#include <
zephyr/sys/barrier.h
>
13
14
#if !defined(__GNUC__)
15
#error test_asm_inline_gcc.h goes only with GCC
16
#endif
17
18
#if defined(CONFIG_X86)
19
static
inline
void
timestamp_serialize(
void
)
20
{
21
__asm__ __volatile__ (
/* serialize */
22
"xorl %%eax,%%eax;\n\t"
23
"cpuid;\n\t"
24
:
25
:
26
:
"%eax"
,
"%ebx"
,
"%ecx"
,
"%edx"
);
27
}
28
#elif defined(CONFIG_CPU_CORTEX_M) || \
29
defined(CONFIG_CPU_AARCH32_CORTEX_R) || \
30
defined(CONFIG_CPU_AARCH32_CORTEX_A) || \
31
defined(CONFIG_CPU_CORTEX_A) || \
32
defined(CONFIG_CPU_AARCH64_CORTEX_R)
33
static
inline
void
timestamp_serialize(
void
)
34
{
35
barrier_isync_fence_full
();
36
}
37
#elif defined(CONFIG_ARC)
38
#define timestamp_serialize()
39
#elif defined(CONFIG_ARCH_POSIX)
40
#define timestamp_serialize()
41
#elif defined(CONFIG_XTENSA)
42
#define timestamp_serialize()
43
#elif defined(CONFIG_NIOS2)
44
#define timestamp_serialize()
45
#elif defined(CONFIG_RISCV)
46
#define timestamp_serialize()
47
#elif defined(CONFIG_SPARC)
48
#define timestamp_serialize()
49
#elif defined(CONFIG_MIPS)
50
#define timestamp_serialize()
51
#else
52
#error implementation of timestamp_serialize() not provided for your CPU target
53
#endif
54
55
#endif
/* _TEST_ASM_INLINE_GCC_H */
barrier_isync_fence_full
static ALWAYS_INLINE void barrier_isync_fence_full(void)
Full/sequentially-consistent instruction synchronization barrier.
Definition
barrier.h:78
barrier.h
subsys
testsuite
include
zephyr
test_asm_inline_gcc.h
Generated on Tue Mar 18 2025 00:07:11 for Zephyr API Documentation by
1.12.0