MAX32666EVKIT
Overview
The MAX32666EVKIT provides a platform for evaluating the capabilities of the MAX32665 and MAX32666 high-efficiency Arm® microcontrollers and audio DSP for wearable and hearable device applications.
The Zephyr port is running on the MAX32666 MCU.
Hardware
MAX32666 MCU:
High-Efficiency Microcontroller and Audio DSP for Wearable and Hearable Devices
Arm Cortex-M4 with FPU Up to 96MHz
Optional Second Arm Cortex-M4 with FPU Optimized for Data Processing
Low-Power 7.3728MHz System Clock Option
1MB Flash, Organized into Dual Banks 2 x 512KB
560KB (448KB ECC) SRAM; 3 x 16KB Cache
Optional Error Correction Code (ECC-SEC-DED)for Cache, SRAM, and Internal Flash
Bluetooth 5 Low Energy Radio
1Mbps and 2Mbps Data Throughput
Long Range (125kbps and 500kbps)
Advertising Extension
Rx Sensitivity: -95dbm; Tx Power Up to +4.5dbm
On-Chip Matching with Single-Ended Antenna Port
Power Management Maximizes Operating Time for Battery Applications
Integrated SIMO SMPS for Coin-Cell Operation
Dynamic Voltage Scaling Minimizes Active Core Power Consumption
27.3μA/MHz at 3.3V Executing from Cache
Selectable SRAM Retention in Low Power Modes with RTC Enabled
Multiple Peripherals for System Control
Three QSPI Master/Slave with Three Chip Selects Each
Three 4-Wire UARTs
Three I2C Master/Slave
Up to 50 GPIO
QSPI (SPIXF) with Real-Time Flash Decryption
QSPI (SPIXR) RAM Interface Provides SRAMExpansion
8-Input 10-Bit Delta-Sigma ADC 7.8ksps
USB 2.0 HS Engine with Internal Transceiver
PDM Interface Supports Two Digital Microphones
I2S with TDM
Six 32-Bit Timers
Two High-Speed Timers
1-Wire Master
Sixteen Pulse Trains (PWM)
Secure Digital Interface Supports SD3.0/SDIO3.0/eMMC4.51
Secure Valuable IP/Data with Hardware Security
Trust Protection Unit (TPU) with MAA SupportsFast ECDSA and Modular Arithmetic
AES128/192/256, DES, 3DES, Hardware Accelerator
TRNG Seed Generator
SHA-2 Accelerator•Secure Bootloader
Benefits and Features of MAX32666EVKIT:
Bluetooth SMA connector with a 2.4GHz Hinged Whip Antenna
1.28in 128 x 128 Monochrome TFT Display
64MB XIP Flash
1MB XIP RAM
Stereo Audio Codec with Line-In and Line-Out 3.5mm Jacks
Digital Audio Microphone
USB 2.0 Micro B Interface
USB 2.0 Micro B to Serial UARTs
Micro SD Card Interface
Select GPIOs Accessed Through a 0.1in Header
Access to the 8 Analog Inputs Through a 0.1in Header
Arm® or SWD JTAG 20-Pin Header
1-Wire RJ11 Port
Can Be Solely Sourced by a Coin Cell Battery
Board Power Provided by Either USB Port
Individual Power Measurement on All IC Rails Through Jumpers
On-Board 1.8V and 3.3V Regulators
Two General-Purpose LEDs and Two General-Purpose Pushbutton Switches
Supported Features
The max32666evkit board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M4F CPU1 |
|
ADC |
on-chip |
ADI MAX32 ADC 10-Bits1 |
|
Clock control |
on-chip |
MAX32 Global Control1 |
|
on-chip |
|||
Counter |
on-chip |
ADI MAX32 counter4 |
|
on-chip |
ADI MAX32 compatible Counter RTC1 |
||
DMA |
on-chip |
||
Flash controller |
on-chip |
MAX32XXX flash controller2 |
|
GPIO & Headers |
on-chip |
MAX32 GPIO2 |
|
I2C |
on-chip |
||
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv7-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-chip |
Flash node2 |
|
Pin control |
on-chip |
MAX32 Pin Controller1 |
|
PWM |
on-chip |
ADI MAX32 PWM4 |
|
RNG |
on-chip |
ADI MAX32XXX TRNG1 |
|
SDHC |
on-chip |
ADI MAX32 SDHC1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
ADI MAX32 SPI3 |
|
SRAM |
on-chip |
Generic on-chip SRAM description12 |
|
Timer |
on-chip |
ARMv7-M System Tick1 |
|
on-chip |
ADI MAX32 timer6 |
||
1-Wire |
on-chip |
ADI MAX32xxx MCUs 1-Wire Master1 |
|
Watchdog |
on-chip |
MAX32XXX watchdog1 |
Connections and IOs
Name |
Name |
Settings |
Description |
||||||
|---|---|---|---|---|---|---|---|---|---|
JP1 |
I2C0_SCL/SDA |
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JP2 |
I2C1_SCL/SDA |
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JP3 |
I2C2_SCL/SDA |
|
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JP4 |
P1_14 |
|
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JP5 |
P1_15 |
|
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JP6 |
VBUS |
|
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JP7 |
N/A |
N/A |
N/A |
||||||
JP8 |
N/A |
N/A |
N/A |
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JP9 |
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JP10 |
|
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JP11 |
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JP12 |
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JP13 |
VREGI |
|
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JP14 |
VDDIOH |
|
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JP15 |
VDDIOH |
|
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JP16 |
VDDB |
|
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JP17 |
VDDIO |
|
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JP18 |
VDDIO |
|
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JP19 |
VDDA |
|
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JP20 |
VCORE_A |
|
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JP21 |
VCORE_B |
|
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JP22 |
VTXIN |
|
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JP23 |
VRXIN |
|
|
Programming and Debugging
Flashing
The MAX32666 MCU can be flashed by connecting an external debug probe to the SWD port. SWD debug can be accessed through the Cortex 10-pin connector, J6. Logic levels are fixed to VDDIOH (1.8V or 3.3V).
Once the debug probe is connected to your host computer, then you can simply run the
west flash command to write a firmware image into flash. To perform a full erase,
pass the --erase option when executing west flash.
Note
This board uses OpenOCD as the default debug interface. You can also use
a Segger J-Link with Segger’s native tooling by overriding the runner,
appending --runner jlink to your west command(s). The J-Link should
be connected to the standard 20-pin connector (J7) or a Cortex® 10-pin connector (J6).
Debugging
Please refer to the Flashing section and run the west debug command
instead of west flash.