STM32 Minimum Development Board
Overview
The STM32 Minimum Development Board, is a popular and inexpensive breadboard-friendly breakout board for the STM32F103x8 CPU. There are two variants of the board:
Blue Pill Board
Black Pill Board
Zephyr applications can use the stm32_min_dev@blue or stm32_min_dev@black board configuration to use these boards.
As the name suggests, these boards have the bare minimum components required to power on the CPU. For practical use, you’ll need to add additional components and circuits using a breadboard, for example.
Pin Mapping
This port is a starting point for your own customizations and not a complete port for a specific board. Most of the GPIOs on the STM32 SoC has been exposed in the external header with silk screen labels that match the SoC’s pin names.
Each board vendor has their own variations in pin mapping on their boards’ external connectors and placement of components. Many vendors use port PC13/PB12 for connecting an LED, so only this device is supported by our Zephyr port. Additional device support is left for the user to implement.
More information on hooking up peripherals and lengthy how to articles can be found at EmbedJournal.
The pinout diagram of STM32 Minimum Development Blue Pill board can be seen below. The Black Pill’s one is similar:

Pinout for STM32 Minimum Development Blue Pill Board
STLinkV2 connection:
The board can be flashed by using STLinkV2 with the following connections.
Pin |
STLINKv2 |
---|---|
G |
GND |
CLK |
Clock |
IO |
SW IO |
V3 |
VCC |
Boot Configuration
The boot configuration for this board is configured through jumpers on B0 (Boot 0) and B1 (Boot 1). The pins B0 and B1 are present in between logic 0 and 1 lines. The silk screen on the PCB reads BX- or BX+ to indicate 0 and 1 logic lines for B0 and B1 respectively.
Boot 1 |
Boot 0 |
Boot Mode |
Aliasing |
---|---|---|---|
X |
0 |
Main Flash Memory |
Main flash memory is selected as boot space |
0 |
1 |
System Memory |
System memory is selected as boot space |
1 |
1 |
Embedded SRAM |
Embedded SRAM is selected as boot space |
Supported Features
The stm32_min_dev
board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo
-
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
Type |
Location |
Description |
Compatible |
---|---|---|---|
CPU |
on-chip |
ARM Cortex-M3 CPU1 |
|
ADC |
on-chip |
STM32F1 ADC1 |
|
CAN |
on-chip |
STM32 CAN controller1 |
|
Clock control |
on-chip |
STM32F1/F3/7x RCC (Reset and Clock controller)1 |
|
on-chip |
STM32 HSE Clock1 |
||
on-chip |
Generic fixed-rate clock provider3 |
||
on-chip |
STM32F1 Main PLL for low-, medium-, high- and XL-density devices1 |
||
on-chip |
STM32F1 Microcontroller Clock Output (MCO)1 |
||
Counter |
on-chip |
STM32 counters3 |
|
DMA |
on-chip |
STM32 DMA controller (V2bis) for the stm32F0, stm32F1 and stm32L1 soc families1 |
|
Flash controller |
on-chip |
STM32 Family flash controller1 |
|
GPIO & Headers |
on-chip |
STM32 GPIO Controller5 |
|
I2C |
on-chip |
STM32 I2C V1 controller2 |
|
Interrupt controller |
on-chip |
ARMv7-M NVIC (Nested Vectored Interrupt Controller)1 |
|
on-chip |
STM32 External Interrupt Controller1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-chip |
STM32 flash memory1 |
|
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
Pin control |
on-chip |
STM32F1 Pin controller1 |
|
PWM |
on-chip |
||
Reset controller |
on-chip |
STM32 Reset and Clock Control (RCC) Controller1 |
|
RTC |
on-chip |
STM32 RTC1 |
|
Sensors |
on-chip |
STM32 Internal Temperature Sensor1 |
|
Serial controller |
on-chip |
STM32 USART3 |
|
SMbus |
on-chip |
STM32 SMBus controller2 |
|
SPI |
on-chip |
STM32 SPI controller2 |
|
SRAM |
on-chip |
Generic on-chip SRAM description1 |
|
Timer |
on-chip |
ARMv7-M System Tick1 |
|
on-chip |
|||
USB |
on-chip |
STM32 USB controller1 |
|
Watchdog |
on-chip |
STM32 watchdog1 |
|
on-chip |
STM32 system window watchdog1 |
Connections and IOs
Default Zephyr Peripheral Mapping:
UART_1 TX/RX: PA9/PA10
UART_2 TX/RX: PA2/PA3
UART_3 TX/RX: PB10/PB11
I2C_1 SCL/SDA : PB6/PB7
I2C_2 SCL/SDA : PB10/PB11
PWM_1_CH1: PA8
SPI_1 NSS_OE/SCK/MISO/MOSI: PA4/PA5/PA6/PA7
SPI_2 NSS_OE/SCK/MISO/MOSI: PB12/PB13/PB14/PB15
USB_DC DM/DP: PA11/PA12
ADC_1: PA0
System Clock
The on-board 8Mhz crystal is used to produce a 72Mhz system clock with PLL.
Serial Port
STM32 Minimum Development Board has 3 U(S)ARTs. The Zephyr console output is assigned to UART_1. Default settings are 115200 8N1.
On-Board LEDs
The board has one on-board LED that is connected to PB12/PC13 on the black/blue variants respectively.
Programming and Debugging
Applications for the stm32_min_dev@(blue|black)
board configuration can be
built and flashed in the usual way (see Building an Application and
Run an Application for more details).
Flashing
Here is an example for the Blinky application.
# From the root of the zephyr repository
west build -b stm32_min_dev samples/basic/blinky
west flash
Debugging
You can debug an application in the usual way. Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b stm32_min_dev samples/hello_world
west debug