Longan Nano
Overview
The Sipeed Longan Nano and Longan Nano Lite is an simple and tiny development board with an GigaDevice GD32VF103 SoC that based on N200 RISC-V IP core by Nuclei system technology. More information can be found on:
Hardware
4 x universal 16-bit timer
2 x basic 16-bit timer
1 x advanced 16-bit timer
Watchdog timer
RTC
Systick
3 x USART
2 x I2C
3 x SPI
2 x I2S
2 x CAN
1 x USBFS(OTG)
2 x ADC(10 channel)
2 x DAC
Supported Features
The longan_nano board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
Nuclei Bumblebee RISC-V Core1 |
|
ADC |
on-chip |
||
Clock control |
on-chip |
Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1 |
|
Counter |
on-chip |
||
DAC |
on-chip |
GigaDevice GD32 series DAC module1 |
|
Display |
on-board |
ST7735R/ST7735S 160x128 (max) display controller1 |
|
DMA |
on-chip |
GD32 DMA controller2 |
|
Flash controller |
on-chip |
There are three types GD32 FMC1 |
|
GPIO & Headers |
on-chip |
||
I2C |
on-chip |
GigiDevice GD32 I2C1 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
Nuclei ECLIC interrupt controller1 |
|
on-chip |
GigaDevice External Interrupt Controller1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
on-board |
Group of PWM-controlled LEDs1 |
||
Multi-Function Device |
on-chip |
Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1 |
|
MTD |
on-chip |
Flash memory binding of GD32 FMC v11 |
|
Pin control |
on-chip |
The AFIO peripheral is used to configure pin remapping, EXTI sources and, when available, enable the I/O compensation cell1 |
|
on-chip |
The GD32 pin controller (AFIO model) is a singleton node responsible for controlling pin function selection and pin properties1 |
||
PWM |
on-chip |
||
Reset controller |
on-chip |
Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
GigaDevice GD32 SPI2 |
|
SRAM |
on-chip |
Generic on-chip SRAM description1 |
|
Timer |
on-chip |
Nuclei System Timer1 |
|
Watchdog |
on-chip |
GD32 free watchdog timer1 |
|
on-chip |
GD32 window watchdog timer1 |
The microSD card reader in Longan Nano board is connected to SPI1.
Serial Port
USART0 is on the opposite end of the USB. Connect to TX0 (PA9) and RX0 (PA10).
Programming and debugging
Building & Flashing
Here is an example for building the Blinky application.
# From the root of the zephyr repository
west build -b longan_nano samples/basic/blinky
west flash
When using a custom toolchain it should be enough to have the downloaded
version of the binary in your PATH.
The default runner tries to flash the board via an external programmer using openocd. To flash via the USB port, select the DFU runner when flashing:
west flash --runner dfu-util
Debugging
You can debug an application in the usual way. Here is an example for the Blinky application.
# From the root of the zephyr repository
west build -b longan_nano samples/basic/blinky
west debug