Black Pill V2.0
Overview
The WeAct Black Pill V2.0 Board is an extremely low cost and bare-bones development board featuring the STM32F411CE, see STM32F411CE website [6]. This is the 48-pin variant of the STM32F411x series, see STM32F411x reference manual [7]. More info about the board available here [4] and on WeAct Github [3].
Hardware
The STM32F411CE based Black Pill V2.0+ Board provides the following hardware components:
STM32F411CEU6 in UFQFPN48 package
ARM® 32-bit Cortex® -M4 CPU with FPU
100 MHz max CPU frequency
VDD from 1.7 V to 3.6 V
512 KB Flash
128 KB SRAM
GPIO with external interrupt capability
1x12-bit, 2.4 MSPS ADC with 16 channels
DMA Controller
Up to 11 Timers (six 16-bit, two 32-bit, two watchdog timers and a SysTick timer)
USART/UART (3)
I2C (3)
SPI/I2S (5)
SDIO
USB 2.0 full-speed device/host/OTG controller with on-chip PHY
CRC calculation unit
96-bit unique ID
RTC
Supported Features
The blackpill_f411ce board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
blackpill_f411ce/stm32f411xe target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M4F CPU1 |
|
ADC |
on-chip |
STM32F4 ADC1 |
|
Clock control |
on-chip |
STM32 RCC (Reset and Clock controller)1 |
|
on-chip |
STM32 HSE Clock1 |
||
on-chip |
|||
on-chip |
STM32F4 Main PLL1 |
||
on-chip |
STM32F411 PLL I2S1 |
||
on-chip |
STM32 Microcontroller Clock Output (MCO)2 |
||
Counter |
on-chip |
STM32 counters7 |
|
DMA |
on-chip |
STM32 DMA controller (V1)2 |
|
Flash controller |
on-chip |
STM32 Family flash controller1 |
|
GPIO & Headers |
on-chip |
STM32 GPIO Controller8 |
|
I2C |
on-chip |
||
I2S |
on-chip |
STM32 I2S controller5 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv7-M NVIC (Nested Vectored Interrupt Controller)1 |
|
on-chip |
STM32 External Interrupt Controller1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Memory controller |
on-chip |
STM32 Battery Backed RAM1 |
|
MMC |
on-chip |
STM32 SDMMC Disk Access1 |
|
MTD |
on-chip |
STM32F4 flash memory1 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
Pin control |
on-chip |
STM32 Pin controller1 |
|
PWM |
on-chip |
||
Reset controller |
on-chip |
STM32 Reset and Clock Control (RCC) Controller1 |
|
RTC |
on-chip |
STM32 RTC1 |
|
Sensors |
on-chip |
STM32 quadrature decoder5 |
|
on-chip |
STM32 family TEMP node for production calibrated sensors with two calibration temperatures1 |
||
on-chip |
STM32 VREF+1 |
||
on-chip |
STM32 VBAT1 |
||
Serial controller |
on-chip |
||
SMbus |
on-chip |
STM32 SMBus controller3 |
|
SPI |
on-chip |
||
SRAM |
on-chip |
Generic on-chip SRAM description1 |
|
Timer |
on-chip |
ARMv7-M System Tick1 |
|
on-chip |
|||
USB |
on-chip |
STM32 OTGFS controller1 |
|
Watchdog |
on-chip |
STM32 watchdog1 |
|
on-chip |
STM32 system window watchdog1 |
Pin Mapping
Available pins:
Default Zephyr Peripheral Mapping:
UART_1 TX/RX : PA9/PA10
I2C1 SCL/SDA : PB8/PB9
SPI1 CS/SCK/MISO/MOSI : PA4/PA5/PA6/PA7 (Routed to footprint for external flash)
PWM_4_CH1 : PB6
PWM_4_CH2 : PB7
ADC_1 : PA1
USER_PB : PA0
USER_LED : PC13
Note on SPI pin mapping: According to the board release notes [1], there was a brief change for V2.0 specifically where MISO was routed to PB4 for the flash footprint. This was reverted for V2.1+ so that the flash DO pin was routed back to PA6. If using V2.0 and en external flash, the pinmux will need to be modified accordingly.
Clock Sources
The board has two external oscillators. The frequency of the slow clock (LSE) is 32.768 kHz. The frequency of the main clock (HSE) is 25 MHz.
The default configuration sources the system clock from the PLL, which is derived from HSE, and is set at 96MHz, which is the maximum possible frequency to achieve a stable USB clock (48MHz).
Programming and Debugging
There are 2 main entry points for flashing STM32F4X SoCs, one using the ROM bootloader, and another by using the SWD debug port (which requires additional hardware). Flashing using the ROM bootloader requires a special activation pattern, which can be triggered by using the BOOT0 pin.
Flashing
Installing dfu-util
It is recommended to use at least v0.8 of dfu-util [5]. The package available in debian/ubuntu can be quite old, so you might have to build dfu-util from source.
There is also a Windows version which works, but you may have to install the right USB drivers with a tool like Zadig [2].
Flashing an Application
Connect a USB-C cable and the board should power ON. Force the board into DFU mode by keeping the BOOT0 switch pressed while pressing and releasing the NRST switch.
The dfu-util runner is supported on this board and so a sample can be built and tested easily.
# From the root of the zephyr repository
west build -b blackpill_f411ce samples/basic/blinky
west flash
Debugging
The board can be debugged by installing the included 100 mil (0.1 inch) header, and attaching an SWD debugger to the 3V3 (3.3V), GND, SCK, and DIO pins on that header.