7#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_SYS_IO_H_
8#define ZEPHYR_INCLUDE_ARCH_ARC_V2_SYS_IO_H_
28 z_arc_v2_aux_reg_write(port, data);
34 return (
uint8_t)(z_arc_v2_aux_reg_read(port) & 0x000000ff);
40 z_arc_v2_aux_reg_write(port, data);
46 return (
uint16_t)(z_arc_v2_aux_reg_read(port) & 0x0000ffff);
52 z_arc_v2_aux_reg_write(port, data);
58 return z_arc_v2_aux_reg_read(port);
66 __asm__
volatile(
"lr %1, [%0]\n"
80 __asm__
volatile(
"lr %1, [%0]\n"
96 __asm__
volatile(
"lr %2, [%1]\n"
101 "r" (reg),
"ir" (bit),
"i" (status)
104 return !(ret & _ARC_V2_STATUS32_Z);
static ALWAYS_INLINE int sys_io_test_and_set_bit(io_port_t port, unsigned int bit)
Definition sys_io.h:108
static ALWAYS_INLINE int sys_io_test_bit(io_port_t port, unsigned int bit)
Definition sys_io.h:90
static ALWAYS_INLINE uint8_t sys_in8(io_port_t port)
Definition sys_io.h:32
static ALWAYS_INLINE int sys_io_test_and_clear_bit(io_port_t port, unsigned int bit)
Definition sys_io.h:119
static ALWAYS_INLINE void sys_out8(uint8_t data, io_port_t port)
Definition sys_io.h:26
static ALWAYS_INLINE void sys_io_clear_bit(io_port_t port, unsigned int bit)
Definition sys_io.h:76
static ALWAYS_INLINE void sys_out16(uint16_t data, io_port_t port)
Definition sys_io.h:38
static ALWAYS_INLINE void sys_io_set_bit(io_port_t port, unsigned int bit)
Definition sys_io.h:62
static ALWAYS_INLINE uint16_t sys_in16(io_port_t port)
Definition sys_io.h:44
static ALWAYS_INLINE void sys_out32(uint32_t data, io_port_t port)
Definition sys_io.h:50
static ALWAYS_INLINE uint32_t sys_in32(io_port_t port)
Definition sys_io.h:56
ARCv2 auxiliary registers definitions.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
__UINT16_TYPE__ uint16_t
Definition stdint.h:89
uint32_t io_port_t
Definition sys_io.h:19