Zephyr API Documentation
4.0.0-rc2
A Scalable Open Source RTOS
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mpu.h
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/* SPDX-License-Identifier: Apache-2.0
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*
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* Copyright (c) 2019 Lexmark International, Inc.
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*/
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#ifndef ARCH_ARM_CORTEX_R_MPU_H
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#define ARCH_ARM_CORTEX_R_MPU_H 1
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#define MPU_RBAR_ADDR_Msk (~0x1f)
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#define MPU_RASR_ENABLE_Msk (1)
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#define MPU_RASR_SIZE_Pos 1U
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#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos)
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#define MPU_TYPE_DREGION_Pos 8U
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#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos)
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#define MPU_RASR_XN_Pos 12
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#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos)
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#define MPU_RASR_AP_Pos 8
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#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos)
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#define MPU_RASR_TEX_Pos 3
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#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos)
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#define MPU_RASR_S_Pos 2
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#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos)
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#define MPU_RASR_C_Pos 1
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#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos)
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#define MPU_RASR_B_Pos 0
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#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos)
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#if defined(CONFIG_CPU_CORTEX_R4) || defined(CONFIG_CPU_CORTEX_R5) || defined(CONFIG_CPU_CORTEX_R8)
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#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U)
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#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U)
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#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U)
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#endif
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#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U)
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#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U)
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#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U)
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#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0aU)
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#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0bU)
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#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0cU)
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#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0dU)
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#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0eU)
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#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0fU)
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#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U)
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#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U)
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#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U)
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#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U)
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#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U)
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#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U)
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#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U)
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#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U)
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#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U)
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#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U)
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#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1aU)
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#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1bU)
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#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1cU)
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#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1dU)
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#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1eU)
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#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1fU)
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#endif
zephyr
arch
arm
cortex_a_r
mpu.h
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