Zephyr API Documentation
4.3.99
A Scalable Open Source RTOS
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bcm2711-pinctrl.h
Go to the documentation of this file.
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/*
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* Copyright (c) 2025 Muhammad Waleed Badar
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_BCM2711_PINCTRL_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_BCM2711_PINCTRL_H_
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/* BCM2711 number of GPIO (GPIOs 0–57) */
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#define BCM2711_NUM_GPIO 58
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/* BCM2711 Pin Functions */
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#define BCM2711_FSEL_GPIO_IN 0
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#define BCM2711_FSEL_GPIO_OUT 1
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#define BCM2711_FSEL_ALT0 4
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#define BCM2711_FSEL_ALT1 5
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#define BCM2711_FSEL_ALT2 6
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#define BCM2711_FSEL_ALT3 7
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#define BCM2711_FSEL_ALT4 3
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#define BCM2711_FSEL_ALT5 2
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/* BCM2711 Pull Configuration */
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#define BCM2711_PULL_NONE 0
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#define BCM2711_PULL_UP 1
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#define BCM2711_PULL_DOWN 2
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/* BCM2711 pinmux configuration macro */
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#define BCM2711_PINMUX(pin, func) \
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(((pin) & 0xFF) | (((func) & 0x7) << 8))
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/* Extract pin number from BCM2711 pinmux value */
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#define BCM2711_GET_PIN(pinmux) \
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((pinmux) & 0xFF)
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/* Extract function from BCM2711 pinmux value */
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#define BCM2711_GET_FUNC(pinmux) \
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(((pinmux) >> 8) & 0x7)
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/* UART0 pinmux definitions */
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#define UART0_TX_GPIO14 BCM2711_PINMUX(14, BCM2711_FSEL_ALT0)
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#define UART0_RX_GPIO15 BCM2711_PINMUX(15, BCM2711_FSEL_ALT0)
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#define UART0_TX_GPIO32 BCM2711_PINMUX(32, BCM2711_FSEL_ALT3)
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#define UART0_RX_GPIO33 BCM2711_PINMUX(33, BCM2711_FSEL_ALT3)
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#define UART0_TX_GPIO36 BCM2711_PINMUX(36, BCM2711_FSEL_ALT2)
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#define UART0_RX_GPIO37 BCM2711_PINMUX(37, BCM2711_FSEL_ALT2)
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#define UART0_CTS_GPIO16 BCM2711_PINMUX(16, BCM2711_FSEL_ALT3)
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#define UART0_RTS_GPIO17 BCM2711_PINMUX(17, BCM2711_FSEL_ALT3)
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#define UART0_CTS_GPIO30 BCM2711_PINMUX(30, BCM2711_FSEL_ALT3)
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#define UART0_RTS_GPIO31 BCM2711_PINMUX(31, BCM2711_FSEL_ALT3)
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#define UART0_CTS_GPIO38 BCM2711_PINMUX(38, BCM2711_FSEL_ALT2)
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#define UART0_RTS_GPIO39 BCM2711_PINMUX(39, BCM2711_FSEL_ALT2)
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/* UART1 pinmux definitions */
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#define UART1_TX_GPIO14 BCM2711_PINMUX(14, BCM2711_FSEL_ALT5)
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#define UART1_RX_GPIO15 BCM2711_PINMUX(15, BCM2711_FSEL_ALT5)
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#define UART1_TX_GPIO32 BCM2711_PINMUX(32, BCM2711_FSEL_ALT5)
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#define UART1_RX_GPIO33 BCM2711_PINMUX(33, BCM2711_FSEL_ALT5)
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#define UART1_TX_GPIO40 BCM2711_PINMUX(40, BCM2711_FSEL_ALT5)
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#define UART1_RX_GPIO41 BCM2711_PINMUX(41, BCM2711_FSEL_ALT5)
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#define UART1_CTS_GPIO16 BCM2711_PINMUX(16, BCM2711_FSEL_ALT5)
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#define UART1_RTS_GPIO17 BCM2711_PINMUX(17, BCM2711_FSEL_ALT5)
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#define UART1_CTS_GPIO30 BCM2711_PINMUX(30, BCM2711_FSEL_ALT5)
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#define UART1_RTS_GPIO31 BCM2711_PINMUX(31, BCM2711_FSEL_ALT5)
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#define UART1_CTS_GPIO42 BCM2711_PINMUX(42, BCM2711_FSEL_ALT5)
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#define UART1_RTS_GPIO43 BCM2711_PINMUX(43, BCM2711_FSEL_ALT5)
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/* UART2 pinmux definitions */
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#define UART2_TX_GPIO0 BCM2711_PINMUX(0, BCM2711_FSEL_ALT4)
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#define UART2_RX_GPIO1 BCM2711_PINMUX(1, BCM2711_FSEL_ALT4)
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#define UART2_CTS_GPIO2 BCM2711_PINMUX(2, BCM2711_FSEL_ALT4)
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#define UART2_RTS_GPIO3 BCM2711_PINMUX(3, BCM2711_FSEL_ALT4)
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/* UART3 pinmux definitions */
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#define UART3_TX_GPIO4 BCM2711_PINMUX(4, BCM2711_FSEL_ALT4)
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#define UART3_RX_GPIO5 BCM2711_PINMUX(5, BCM2711_FSEL_ALT4)
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#define UART3_CTS_GPIO6 BCM2711_PINMUX(6, BCM2711_FSEL_ALT4)
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#define UART3_RTS_GPIO7 BCM2711_PINMUX(7, BCM2711_FSEL_ALT4)
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/* UART4 pinmux definitions */
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#define UART4_TX_GPIO8 BCM2711_PINMUX(8, BCM2711_FSEL_ALT4)
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#define UART4_RX_GPIO9 BCM2711_PINMUX(9, BCM2711_FSEL_ALT4)
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#define UART4_CTS_GPIO10 BCM2711_PINMUX(10, BCM2711_FSEL_ALT4)
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#define UART4_RTS_GPIO11 BCM2711_PINMUX(11, BCM2711_FSEL_ALT4)
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/* UART5 pinmux definitions */
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#define UART5_TX_GPIO12 BCM2711_PINMUX(12, BCM2711_FSEL_ALT4)
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#define UART5_RX_GPIO13 BCM2711_PINMUX(13, BCM2711_FSEL_ALT4)
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#define UART5_CTS_GPIO14 BCM2711_PINMUX(14, BCM2711_FSEL_ALT4)
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#define UART5_RTS_GPIO15 BCM2711_PINMUX(15, BCM2711_FSEL_ALT4)
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/* I2C0 pinmux definitions */
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#define I2C0_SDA_GPIO0 BCM2711_PINMUX(0, BCM2711_FSEL_ALT0)
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#define I2C0_SCL_GPIO1 BCM2711_PINMUX(1, BCM2711_FSEL_ALT0)
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#define I2C0_SDA_GPIO28 BCM2711_PINMUX(28, BCM2711_FSEL_ALT0)
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#define I2C0_SCL_GPIO29 BCM2711_PINMUX(29, BCM2711_FSEL_ALT0)
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#define I2C0_SDA_GPIO44 BCM2711_PINMUX(44, BCM2711_FSEL_ALT1)
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#define I2C0_SCL_GPIO45 BCM2711_PINMUX(45, BCM2711_FSEL_ALT1)
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/* I2C1 pinmux definitions */
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#define I2C1_SDA_GPIO2 BCM2711_PINMUX(2, BCM2711_FSEL_ALT0)
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#define I2C1_SCL_GPIO3 BCM2711_PINMUX(3, BCM2711_FSEL_ALT0)
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#define I2C1_SDA_GPIO44 BCM2711_PINMUX(44, BCM2711_FSEL_ALT2)
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#define I2C1_SCL_GPIO45 BCM2711_PINMUX(45, BCM2711_FSEL_ALT2)
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/* I2C3 pinmux definitions */
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#define I2C3_SDA_GPIO2 BCM2711_PINMUX(2, BCM2711_FSEL_ALT5)
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#define I2C3_SCL_GPIO3 BCM2711_PINMUX(3, BCM2711_FSEL_ALT5)
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#define I2C3_SDA_GPIO4 BCM2711_PINMUX(4, BCM2711_FSEL_ALT5)
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#define I2C3_SCL_GPIO5 BCM2711_PINMUX(5, BCM2711_FSEL_ALT5)
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/* I2C4 pinmux definitions */
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#define I2C4_SDA_GPIO6 BCM2711_PINMUX(6, BCM2711_FSEL_ALT5)
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#define I2C4_SCL_GPIO7 BCM2711_PINMUX(7, BCM2711_FSEL_ALT5)
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#define I2C4_SDA_GPIO8 BCM2711_PINMUX(8, BCM2711_FSEL_ALT5)
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#define I2C4_SCL_GPIO9 BCM2711_PINMUX(9, BCM2711_FSEL_ALT5)
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/* I2C5 pinmux definitions */
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#define I2C5_SDA_GPIO10 BCM2711_PINMUX(10, BCM2711_FSEL_ALT5)
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#define I2C5_SCL_GPIO11 BCM2711_PINMUX(11, BCM2711_FSEL_ALT5)
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#define I2C5_SDA_GPIO12 BCM2711_PINMUX(12, BCM2711_FSEL_ALT5)
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#define I2C5_SCL_GPIO13 BCM2711_PINMUX(13, BCM2711_FSEL_ALT5)
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/* I2C6 pinmux definitions */
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#define I2C6_SDA_GPIO0 BCM2711_PINMUX(0, BCM2711_FSEL_ALT5)
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#define I2C6_SCL_GPIO1 BCM2711_PINMUX(1, BCM2711_FSEL_ALT5)
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#define I2C6_SDA_GPIO22 BCM2711_PINMUX(22, BCM2711_FSEL_ALT5)
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#define I2C6_SCL_GPIO23 BCM2711_PINMUX(23, BCM2711_FSEL_ALT5)
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#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_BCM2711_PINCTRL_H_ */
zephyr
dt-bindings
pinctrl
bcm2711-pinctrl.h
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