Zephyr API Documentation 4.3.99
A Scalable Open Source RTOS
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device_mmio.h
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1/*
2 * Copyright (c) 2020 Intel Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6#ifndef ZEPHYR_INCLUDE_SYS_DEVICE_MMIO_H
7#define ZEPHYR_INCLUDE_SYS_DEVICE_MMIO_H
8
9#include <zephyr/toolchain.h>
11
27
28/* Storing MMIO addresses in RAM is a system-wide decision based on
29 * configuration. This is just used to simplify some other definitions.
30 *
31 * If we have an MMU enabled, all physical MMIO regions must be mapped into
32 * the kernel's virtual address space at runtime, this is a hard requirement.
33 *
34 * If we have PCIE enabled, this does mean that non-PCIE drivers may waste
35 * a bit of RAM, but systems with PCI express are not RAM constrained.
36 */
37#if defined(CONFIG_MMU) || defined(CONFIG_PCIE) || defined(CONFIG_EXTERNAL_ADDRESS_TRANSLATION)
38#define DEVICE_MMIO_IS_IN_RAM
39#endif
40
41#if defined(CONFIG_EXTERNAL_ADDRESS_TRANSLATION)
43#endif
44
45#ifndef _ASMLANGUAGE
46#include <stdint.h>
47#include <stddef.h>
48#include <zephyr/kernel/mm.h>
49#include <zephyr/sys/sys_io.h>
50
51#ifdef DEVICE_MMIO_IS_IN_RAM
52/* Store the physical address and size from DTS, we'll memory
53 * map into the virtual address space at runtime. This is not applicable
54 * to PCIe devices, which must query the bus for BAR information.
55 */
56struct z_device_mmio_rom {
58 uintptr_t phys_addr;
59
61 size_t size;
62};
63
64#define Z_DEVICE_MMIO_ROM_INITIALIZER(node_id) \
65 { \
66 .phys_addr = DT_REG_ADDR(node_id), \
67 .size = DT_REG_SIZE(node_id) \
68 }
69
70#define Z_DEVICE_MMIO_NAMED_ROM_INITIALIZER(name, node_id) \
71 { \
72 .phys_addr = DT_REG_ADDR_BY_NAME(node_id, name), \
73 .size = DT_REG_SIZE_BY_NAME(node_id, name) \
74 }
75
96__boot_func
97static inline void device_map(mm_reg_t *virt_addr, uintptr_t phys_addr,
98 size_t size, uint32_t flags)
99{
100#ifdef CONFIG_MMU
101 /* Pass along flags and add that we want supervisor mode
102 * read-write access.
103 */
104 k_mem_map_phys_bare((uint8_t **)virt_addr, phys_addr, size,
106#else
107 ARG_UNUSED(size);
108 ARG_UNUSED(flags);
109#ifdef CONFIG_EXTERNAL_ADDRESS_TRANSLATION
110 sys_mm_drv_page_phys_get((void *) phys_addr, virt_addr);
111#else
112 *virt_addr = phys_addr;
113#endif /* CONFIG_EXTERNAL_ADDRESS_TRANSLATION */
114#endif /* CONFIG_MMU */
115}
116
125__boot_func
126static inline void device_unmap(mm_reg_t virt_addr, size_t size)
127{
128#ifdef CONFIG_MMU
129 k_mem_unmap_phys_bare((uint8_t *)virt_addr, size);
130#else
131 ARG_UNUSED(virt_addr);
132 ARG_UNUSED(size);
133#endif /* CONFIG_MMU */
134}
135#else
136/* No MMU or PCIe. Just store the address from DTS and treat as a linear
137 * address
138 */
139struct z_device_mmio_rom {
141 mm_reg_t addr;
142};
143
144#define Z_DEVICE_MMIO_ROM_INITIALIZER(node_id) \
145 { \
146 .addr = (mm_reg_t)DT_REG_ADDR_U64(node_id) \
147 }
148
149#define Z_DEVICE_MMIO_NAMED_ROM_INITIALIZER(name, node_id) \
150 { \
151 .addr = (mm_reg_t)DT_REG_ADDR_BY_NAME_U64(node_id, name) \
152 }
153
154__boot_func
155static inline void device_map(mm_reg_t *virt_addr, uintptr_t phys_addr,
156 size_t size, uint32_t flags)
157{
158 ARG_UNUSED(size);
159 ARG_UNUSED(flags);
160 *virt_addr = phys_addr;
161}
162
163__boot_func
164static inline void device_unmap(mm_reg_t virt_addr, size_t size)
165{
166 ARG_UNUSED(virt_addr);
167 ARG_UNUSED(size);
168}
169
170#endif /* DEVICE_MMIO_IS_IN_RAM */
171#endif /* !_ASMLANGUAGE */
173
183
215#ifdef DEVICE_MMIO_IS_IN_RAM
216#define DEVICE_MMIO_RAM mm_reg_t _mmio
217#else
218#define DEVICE_MMIO_RAM
219#endif
220
221#ifdef DEVICE_MMIO_IS_IN_RAM
232#define DEVICE_MMIO_RAM_PTR(device) (mm_reg_t *)((device)->data)
233#endif /* DEVICE_MMIO_IS_IN_RAM */
234
265#define DEVICE_MMIO_ROM struct z_device_mmio_rom _mmio
266
276#define DEVICE_MMIO_ROM_PTR(dev) \
277 ((struct z_device_mmio_rom *)((dev)->config))
278
301#define DEVICE_MMIO_ROM_INIT(node_id) \
302 ._mmio = Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
303
320#ifdef DEVICE_MMIO_IS_IN_RAM
321#define DEVICE_MMIO_MAP(dev, flags) \
322 device_map(DEVICE_MMIO_RAM_PTR(dev), \
323 DEVICE_MMIO_ROM_PTR(dev)->phys_addr, \
324 DEVICE_MMIO_ROM_PTR(dev)->size, \
325 (flags))
326#else
327#define DEVICE_MMIO_MAP(dev, flags) do { } while (false)
328#endif
329
349#ifdef DEVICE_MMIO_IS_IN_RAM
350#define DEVICE_MMIO_GET(dev) (*DEVICE_MMIO_RAM_PTR(dev))
351#else
352#define DEVICE_MMIO_GET(dev) (DEVICE_MMIO_ROM_PTR(dev)->addr)
353#endif
355
365
400#ifdef DEVICE_MMIO_IS_IN_RAM
401#define DEVICE_MMIO_NAMED_RAM(name) mm_reg_t name
402#else
403#define DEVICE_MMIO_NAMED_RAM(name)
404#endif /* DEVICE_MMIO_IS_IN_RAM */
405
406#ifdef DEVICE_MMIO_IS_IN_RAM
417#define DEVICE_MMIO_NAMED_RAM_PTR(dev, name) \
418 (&(DEV_DATA(dev)->name))
419#endif /* DEVICE_MMIO_IS_IN_RAM */
420
456#define DEVICE_MMIO_NAMED_ROM(name) struct z_device_mmio_rom name
457
470#define DEVICE_MMIO_NAMED_ROM_PTR(dev, name) (&(DEV_CFG(dev)->name))
471
498#define DEVICE_MMIO_NAMED_ROM_INIT(name, node_id) \
499 .name = Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
500
539#define DEVICE_MMIO_NAMED_ROM_INIT_BY_NAME(name, node_id) \
540 .name = Z_DEVICE_MMIO_NAMED_ROM_INITIALIZER(name, node_id)
541
568#ifdef DEVICE_MMIO_IS_IN_RAM
569#define DEVICE_MMIO_NAMED_MAP(dev, name, flags) \
570 device_map(DEVICE_MMIO_NAMED_RAM_PTR((dev), name), \
571 (DEVICE_MMIO_NAMED_ROM_PTR((dev), name)->phys_addr), \
572 (DEVICE_MMIO_NAMED_ROM_PTR((dev), name)->size), \
573 (flags))
574#else
575#define DEVICE_MMIO_NAMED_MAP(dev, name, flags) do { } while (false)
576#endif
577
599#ifdef DEVICE_MMIO_IS_IN_RAM
600#define DEVICE_MMIO_NAMED_GET(dev, name) \
601 (*DEVICE_MMIO_NAMED_RAM_PTR((dev), name))
602#else
603#define DEVICE_MMIO_NAMED_GET(dev, name) \
604 ((DEVICE_MMIO_NAMED_ROM_PTR((dev), name))->addr)
605#endif /* DEVICE_MMIO_IS_IN_RAM */
606
608
625
626 #define Z_TOPLEVEL_ROM_NAME(name) _CONCAT(z_mmio_rom__, name)
627 #define Z_TOPLEVEL_RAM_NAME(name) _CONCAT(z_mmio_ram__, name)
628
644#ifdef DEVICE_MMIO_IS_IN_RAM
645#define DEVICE_MMIO_TOPLEVEL(name, node_id) \
646 __pinned_bss \
647 mm_reg_t Z_TOPLEVEL_RAM_NAME(name); \
648 __pinned_rodata \
649 const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name) = \
650 Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
651#else
652#define DEVICE_MMIO_TOPLEVEL(name, node_id) \
653 __pinned_rodata \
654 const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name) = \
655 Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
656#endif /* DEVICE_MMIO_IS_IN_RAM */
657
671
672#ifdef DEVICE_MMIO_IS_IN_RAM
673#define DEVICE_MMIO_TOPLEVEL_DECLARE(name) \
674 extern mm_reg_t Z_TOPLEVEL_RAM_NAME(name); \
675 extern const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name)
676#else
677#define DEVICE_MMIO_TOPLEVEL_DECLARE(name) \
678 extern const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name)
679#endif /* DEVICE_MMIO_IS_IN_RAM */
680
695#ifdef DEVICE_MMIO_IS_IN_RAM
696#define DEVICE_MMIO_TOPLEVEL_STATIC(name, node_id) \
697 __pinned_bss \
698 static mm_reg_t Z_TOPLEVEL_RAM_NAME(name); \
699 __pinned_rodata \
700 static const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name) = \
701 Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
702#else
703#define DEVICE_MMIO_TOPLEVEL_STATIC(name, node_id) \
704 __pinned_rodata \
705 static const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name) = \
706 Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
707#endif /* DEVICE_MMIO_IS_IN_RAM */
708
709#ifdef DEVICE_MMIO_IS_IN_RAM
717#define DEVICE_MMIO_TOPLEVEL_RAM_PTR(name) &Z_TOPLEVEL_RAM_NAME(name)
718#endif /* DEVICE_MMIO_IS_IN_RAM */
719
726#define DEVICE_MMIO_TOPLEVEL_ROM_PTR(name) &Z_TOPLEVEL_ROM_NAME(name)
727
749#ifdef DEVICE_MMIO_IS_IN_RAM
750#define DEVICE_MMIO_TOPLEVEL_MAP(name, flags) \
751 device_map(&Z_TOPLEVEL_RAM_NAME(name), \
752 Z_TOPLEVEL_ROM_NAME(name).phys_addr, \
753 Z_TOPLEVEL_ROM_NAME(name).size, (flags))
754#else
755#define DEVICE_MMIO_TOPLEVEL_MAP(name, flags) do { } while (false)
756#endif
757
768#ifdef DEVICE_MMIO_IS_IN_RAM
769#define DEVICE_MMIO_TOPLEVEL_GET(name) \
770 ((mm_reg_t)Z_TOPLEVEL_RAM_NAME(name))
771#else
772#define DEVICE_MMIO_TOPLEVEL_GET(name) \
773 ((mm_reg_t)Z_TOPLEVEL_ROM_NAME(name).addr)
774#endif
776
777#endif /* ZEPHYR_INCLUDE_SYS_DEVICE_MMIO_H */
static __boot_func void device_unmap(mm_reg_t virt_addr, size_t size)
Un-set linear address for device MMIO access.
Definition device_mmio.h:126
static __boot_func void device_map(mm_reg_t *virt_addr, uintptr_t phys_addr, size_t size, uint32_t flags)
Set linear address for device MMIO access.
Definition device_mmio.h:97
#define K_MEM_PERM_RW
Region will have read/write access (and not read-only).
Definition mm.h:63
void k_mem_map_phys_bare(uint8_t **virt_ptr, uintptr_t phys, size_t size, uint32_t flags)
Map a physical memory region into the kernel's virtual address space.
void k_mem_unmap_phys_bare(uint8_t *virt, size_t size)
Unmap a virtual memory region from kernel's virtual address space.
int sys_mm_drv_page_phys_get(void *virt, uintptr_t *phys)
Get the mapped physical memory address from virtual address.
flags
Definition parser.h:97
Definitions of various linker Sections.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
__UINTPTR_TYPE__ uintptr_t
Definition stdint.h:105
uintptr_t mm_reg_t
Definition sys_io.h:20
Memory Management Driver APIs.
Macros to abstract toolchain specific capabilities.