Zephyr API Documentation 4.0.99
A Scalable Open Source RTOS
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mipi_dbi.h
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1/*
2 * Copyright 2023 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
21#ifndef ZEPHYR_INCLUDE_DRIVERS_MIPI_DBI_H_
22#define ZEPHYR_INCLUDE_DRIVERS_MIPI_DBI_H_
23
33#include <zephyr/device.h>
36#include <zephyr/drivers/spi.h>
38
39#ifdef __cplusplus
40extern "C" {
41#endif
42
54#define MIPI_DBI_SPI_CONFIG_DT(node_id, operation_, delay_) \
55 { \
56 .frequency = DT_PROP(node_id, mipi_max_frequency), \
57 .operation = (operation_) | \
58 DT_PROP_OR(node_id, duplex, 0) | \
59 COND_CODE_1(DT_PROP(node_id, mipi_cpol), SPI_MODE_CPOL, (0)) | \
60 COND_CODE_1(DT_PROP(node_id, mipi_cpha), SPI_MODE_CPHA, (0)) | \
61 COND_CODE_1(DT_PROP(node_id, mipi_hold_cs), SPI_HOLD_ON_CS, (0)), \
62 .slave = DT_REG_ADDR(node_id), \
63 .cs = { \
64 .gpio = GPIO_DT_SPEC_GET_BY_IDX_OR(DT_PHANDLE(DT_PARENT(node_id), \
65 spi_dev), cs_gpios, \
66 DT_REG_ADDR_RAW(node_id), \
67 {}), \
68 .delay = (delay_), \
69 }, \
70 }
71
82#define MIPI_DBI_SPI_CONFIG_DT_INST(inst, operation_, delay_) \
83 MIPI_DBI_SPI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)
84
97#define MIPI_DBI_CONFIG_DT(node_id, operation_, delay_) \
98 { \
99 .mode = DT_STRING_UPPER_TOKEN(node_id, mipi_mode), \
100 .config = MIPI_DBI_SPI_CONFIG_DT(node_id, operation_, delay_), \
101 }
102
112#define MIPI_DBI_CONFIG_DT_INST(inst, operation_, delay_) \
113 MIPI_DBI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)
114
124#define MIPI_DBI_TE_MODE_DT(node_id, edge_prop) \
125 DT_STRING_UPPER_TOKEN(node_id, edge_prop)
126
136#define MIPI_DBI_TE_MODE_DT_INST(inst, edge_prop) \
137 DT_STRING_UPPER_TOKEN(DT_DRV_INST(inst), edge_prop)
138
150
151
153__subsystem struct mipi_dbi_driver_api {
154 int (*command_write)(const struct device *dev,
155 const struct mipi_dbi_config *config, uint8_t cmd,
156 const uint8_t *data, size_t len);
157 int (*command_read)(const struct device *dev,
158 const struct mipi_dbi_config *config, uint8_t *cmds,
159 size_t num_cmds, uint8_t *response, size_t len);
160 int (*write_display)(const struct device *dev,
161 const struct mipi_dbi_config *config,
162 const uint8_t *framebuf,
163 struct display_buffer_descriptor *desc,
164 enum display_pixel_format pixfmt);
165 int (*reset)(const struct device *dev, k_timeout_t delay);
166 int (*release)(const struct device *dev,
167 const struct mipi_dbi_config *config);
168 int (*configure_te)(const struct device *dev,
169 uint8_t edge,
170 k_timeout_t delay);
171};
172
193static inline int mipi_dbi_command_write(const struct device *dev,
194 const struct mipi_dbi_config *config,
195 uint8_t cmd, const uint8_t *data,
196 size_t len)
197{
198 const struct mipi_dbi_driver_api *api =
199 (const struct mipi_dbi_driver_api *)dev->api;
200
201 if (api->command_write == NULL) {
202 return -ENOSYS;
203 }
204 return api->command_write(dev, config, cmd, data, len);
205}
206
224static inline int mipi_dbi_command_read(const struct device *dev,
225 const struct mipi_dbi_config *config,
226 uint8_t *cmds, size_t num_cmd,
227 uint8_t *response, size_t len)
228{
229 const struct mipi_dbi_driver_api *api =
230 (const struct mipi_dbi_driver_api *)dev->api;
231
232 if (api->command_read == NULL) {
233 return -ENOSYS;
234 }
235 return api->command_read(dev, config, cmds, num_cmd, response, len);
236}
237
257static inline int mipi_dbi_write_display(const struct device *dev,
258 const struct mipi_dbi_config *config,
259 const uint8_t *framebuf,
260 struct display_buffer_descriptor *desc,
261 enum display_pixel_format pixfmt)
262{
263 const struct mipi_dbi_driver_api *api =
264 (const struct mipi_dbi_driver_api *)dev->api;
265
266 if (api->write_display == NULL) {
267 return -ENOSYS;
268 }
269 return api->write_display(dev, config, framebuf, desc, pixfmt);
270}
271
283static inline int mipi_dbi_reset(const struct device *dev, uint32_t delay_ms)
284{
285 const struct mipi_dbi_driver_api *api =
286 (const struct mipi_dbi_driver_api *)dev->api;
287
288 if (api->reset == NULL) {
289 return -ENOSYS;
290 }
291 return api->reset(dev, K_MSEC(delay_ms));
292}
293
311static inline int mipi_dbi_release(const struct device *dev,
312 const struct mipi_dbi_config *config)
313{
314 const struct mipi_dbi_driver_api *api =
315 (const struct mipi_dbi_driver_api *)dev->api;
316
317 if (api->release == NULL) {
318 return -ENOSYS;
319 }
320 return api->release(dev, config);
321}
322
349static inline int mipi_dbi_configure_te(const struct device *dev,
350 uint8_t edge,
351 uint32_t delay_us)
352{
353 const struct mipi_dbi_driver_api *api =
354 (const struct mipi_dbi_driver_api *)dev->api;
355
356 if (api->configure_te == NULL) {
357 return -ENOSYS;
358 }
359 return api->configure_te(dev, edge, K_USEC(delay_us));
360}
361
362#ifdef __cplusplus
363}
364#endif
365
370#endif /* ZEPHYR_INCLUDE_DRIVERS_MIPI_DBI_H_ */
Public API for display drivers and applications.
Public API for SPI drivers and applications.
#define K_MSEC(ms)
Generate timeout delay from milliseconds.
Definition kernel.h:1400
#define K_USEC(t)
Generate timeout delay from microseconds.
Definition kernel.h:1364
display_pixel_format
Display pixel formats.
Definition display.h:42
static void cmd(uint32_t command)
Execute a display list command by co-processor engine.
Definition ft8xx_reference_api.h:153
static int mipi_dbi_reset(const struct device *dev, uint32_t delay_ms)
Resets attached display controller.
Definition mipi_dbi.h:283
static int mipi_dbi_write_display(const struct device *dev, const struct mipi_dbi_config *config, const uint8_t *framebuf, struct display_buffer_descriptor *desc, enum display_pixel_format pixfmt)
Write a display buffer to the display controller.
Definition mipi_dbi.h:257
static int mipi_dbi_configure_te(const struct device *dev, uint8_t edge, uint32_t delay_us)
Configures MIPI DBI tearing effect signal.
Definition mipi_dbi.h:349
static int mipi_dbi_command_write(const struct device *dev, const struct mipi_dbi_config *config, uint8_t cmd, const uint8_t *data, size_t len)
Write a command to the display controller.
Definition mipi_dbi.h:193
static int mipi_dbi_release(const struct device *dev, const struct mipi_dbi_config *config)
Releases a locked MIPI DBI device.
Definition mipi_dbi.h:311
static int mipi_dbi_command_read(const struct device *dev, const struct mipi_dbi_config *config, uint8_t *cmds, size_t num_cmd, uint8_t *response, size_t len)
Read a command response from the display controller.
Definition mipi_dbi.h:224
#define ENOSYS
Function not implemented.
Definition errno.h:82
Display definitions for MIPI devices.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
Runtime device structure (in ROM) per driver instance.
Definition device.h:411
void * data
Address of the device instance private data.
Definition device.h:421
const void * api
Address of the API structure exposed by the device instance.
Definition device.h:417
const void * config
Address of device instance config information.
Definition device.h:415
Structure to describe display data buffer layout.
Definition display.h:121
Kernel timeout type.
Definition sys_clock.h:65
MIPI DBI controller configuration.
Definition mipi_dbi.h:144
uint8_t mode
MIPI DBI mode.
Definition mipi_dbi.h:146
struct spi_config config
SPI configuration.
Definition mipi_dbi.h:148
MIPI-DBI host driver API.
Definition mipi_dbi.h:153
int(* reset)(const struct device *dev, k_timeout_t delay)
Definition mipi_dbi.h:165
int(* release)(const struct device *dev, const struct mipi_dbi_config *config)
Definition mipi_dbi.h:166
int(* command_read)(const struct device *dev, const struct mipi_dbi_config *config, uint8_t *cmds, size_t num_cmds, uint8_t *response, size_t len)
Definition mipi_dbi.h:157
int(* command_write)(const struct device *dev, const struct mipi_dbi_config *config, uint8_t cmd, const uint8_t *data, size_t len)
Definition mipi_dbi.h:154
int(* write_display)(const struct device *dev, const struct mipi_dbi_config *config, const uint8_t *framebuf, struct display_buffer_descriptor *desc, enum display_pixel_format pixfmt)
Definition mipi_dbi.h:160
int(* configure_te)(const struct device *dev, uint8_t edge, k_timeout_t delay)
Definition mipi_dbi.h:168
SPI controller configuration structure.
Definition spi.h:301