em32_clock.h

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/*
 * Copyright (c) 2025 Elan Microelectronics Corp.
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef __ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ELAN_EM32_CLOCK_H__
#define __ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ELAN_EM32_CLOCK_H__
 
/* Clock Source */
#define EM32_CLK_SRC_IRCLOW    0x00
#define EM32_CLK_SRC_IRCHIGH   0x01
#define EM32_CLK_SRC_EXTERNAL1 0x20
 
/* Clock Frequency Source */
#define EM32_CLK_FREQ_IRCLOW12   0x00
#define EM32_CLK_FREQ_IRCLOW16   0x01
#define EM32_CLK_FREQ_IRCLOW20   0x02
#define EM32_CLK_FREQ_IRCLOW24   0x03
#define EM32_CLK_FREQ_IRCLOW28   0x04
#define EM32_CLK_FREQ_IRCLOW32   0x05
#define EM32_CLK_FREQ_IRCHIGH64  0x11
#define EM32_CLK_FREQ_IRCHIGH80  0x12
#define EM32_CLK_FREQ_IRCHIGH96  0x13
#define EM32_CLK_FREQ_IRCHIGH112 0x14
#define EM32_CLK_FREQ_IRCHIGH128 0x15
#define EM32_CLK_FREQ_IRCHIGH96Q 0x16
 
/* AHB PreScaler */
#define EM32_AHB_CLK_DIV1   0x00
#define EM32_AHB_CLK_DIV2   0x01
#define EM32_AHB_CLK_DIV4   0x02
#define EM32_AHB_CLK_DIV8   0x03
#define EM32_AHB_CLK_DIV16  0x04
#define EM32_AHB_CLK_DIV32  0x05
#define EM32_AHB_CLK_DIV64  0x06
#define EM32_AHB_CLK_DIV128 0x07
 
#endif /* __ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ELAN_EM32_CLOCK_H__ */