7#ifndef ZEPHYR_INCLUDE_DRIVERS_ETH_NXP_ENET_QOS_H__
8#define ZEPHYR_INCLUDE_DRIVERS_ETH_NXP_ENET_QOS_H__
10#include <fsl_device_registers.h>
14#ifdef CONFIG_SOC_SERIES_MCXN
16#define ENET_QOS_NAME ENET
17#define ENET_QOS_ALIGNMENT 4
18typedef ENET_Type enet_qos_t;
20#error "ENET_QOS not enabled on this SOC series"
23#define _PREFIX_UNDERLINE(x) _##x
24#define _ENET_QOS_REG_FIELD(reg, field) MACRO_MAP_CAT(_PREFIX_UNDERLINE, reg, field, MASK)
25#define _ENET_QOS_REG_MASK(reg, field) CONCAT(ENET_QOS_NAME, _ENET_QOS_REG_FIELD(reg, field))
33#define ENET_QOS_REG_GET(reg, field, val) FIELD_GET(_ENET_QOS_REG_MASK(reg, field), val)
41#define ENET_QOS_REG_PREP(reg, field, val) FIELD_PREP(_ENET_QOS_REG_MASK(reg, field), val)
44#define ENET_QOS_ALIGN_ADDR_SHIFT(x) (x >> (ENET_QOS_ALIGNMENT >> 1))
52#define ENET_QOS_MODULE_CFG(module_dev) ((struct nxp_enet_qos_config *) module_dev->config)
Public Clock Control APIs.
void * clock_control_subsys_t
clock_control_subsys_t is a type to identify a clock controller sub-system.
Definition clock_control.h:58
Runtime device structure (in ROM) per driver instance.
Definition device.h:411
Definition eth_nxp_enet_qos.h:46
enet_qos_t * base
Definition eth_nxp_enet_qos.h:50
clock_control_subsys_t clock_subsys
Definition eth_nxp_enet_qos.h:49
const struct device * clock_dev
Definition eth_nxp_enet_qos.h:48
const struct pinctrl_dev_config * pincfg
Definition eth_nxp_enet_qos.h:47
Pin controller configuration for a given device.
Definition pinctrl.h:62