Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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Files

file  clock_control_bflb_common.h
 Timing and clock helpers common to all Bouffalo Lab platforms.

Functions

static void clock_bflb_settle (void)
 Busy-wait for a few CPU cycles to let a clock change settle.
static void clock_bflb_set_root_clock (uint32_t clock)
 Select the root (main) clock source.
static uint32_t clock_bflb_get_root_clock (void)
 Get the currently selected root (main) clock source.

Main clock mux selections (see clock_bflb_set_root_clock())

#define BFLB_MAIN_CLOCK_RC32M   0
 XCLK is RC32M, main clock is XCLK.
#define BFLB_MAIN_CLOCK_XTAL   1
 XCLK is the crystal, main clock is XCLK.
#define BFLB_MAIN_CLOCK_PLL_RC32M   2
 XCLK is RC32M, main clock is the PLL.
#define BFLB_MAIN_CLOCK_PLL_XTAL   3
 XCLK is the crystal, main clock is the PLL.

Detailed Description

Macro Definition Documentation

◆ BFLB_MAIN_CLOCK_PLL_RC32M

#define BFLB_MAIN_CLOCK_PLL_RC32M   2

#include <zephyr/drivers/clock_control/clock_control_bflb_common.h>

XCLK is RC32M, main clock is the PLL.

◆ BFLB_MAIN_CLOCK_PLL_XTAL

#define BFLB_MAIN_CLOCK_PLL_XTAL   3

#include <zephyr/drivers/clock_control/clock_control_bflb_common.h>

XCLK is the crystal, main clock is the PLL.

◆ BFLB_MAIN_CLOCK_RC32M

#define BFLB_MAIN_CLOCK_RC32M   0

#include <zephyr/drivers/clock_control/clock_control_bflb_common.h>

XCLK is RC32M, main clock is XCLK.

◆ BFLB_MAIN_CLOCK_XTAL

#define BFLB_MAIN_CLOCK_XTAL   1

#include <zephyr/drivers/clock_control/clock_control_bflb_common.h>

XCLK is the crystal, main clock is XCLK.

Function Documentation

◆ clock_bflb_get_root_clock()

uint32_t clock_bflb_get_root_clock ( void )
inlinestatic

#include <zephyr/drivers/clock_control/clock_control_bflb_common.h>

Get the currently selected root (main) clock source.

Returns
One of the BFLB_MAIN_CLOCK_* selections.

◆ clock_bflb_set_root_clock()

void clock_bflb_set_root_clock ( uint32_t clock)
inlinestatic

#include <zephyr/drivers/clock_control/clock_control_bflb_common.h>

Select the root (main) clock source.

Parameters
clockOne of the BFLB_MAIN_CLOCK_* selections. Out-of-range values fall back to BFLB_MAIN_CLOCK_RC32M.

◆ clock_bflb_settle()

void clock_bflb_settle ( void )
inlinestatic

#include <zephyr/drivers/clock_control/clock_control_bflb_common.h>

Busy-wait for a few CPU cycles to let a clock change settle.