Infineon CAT1

Files
file	clock_control_ifx_cat1.h
	Clock control definitions for Infineon CAT1 (PSoC 6 family) devices.

Data Structures
struct	ifx_cat1_clock
	CAT1 clock descriptor. More...
struct	ifx_cat1_resource_inst
	CAT1 resource instance descriptor. More...

Enumerations
enum	ifx_cat1_clock_block
	CAT1 clock block (source or domain) selector. More...

Functions
int	ifx_cat1_clock_control_get_frequency (uint32_t dt_ord, uint32_t *frequency)
	Get the frequency of a clock identified by its Devicetree ordinal.
static uint32_t	ifx_cat1_utils_peri_pclk_get_frequency (en_clk_dst_t clk_dest, const struct ifx_cat1_clock *_clock)
	Get the frequency of a peripheral clock divider.
static cy_rslt_t	ifx_cat1_utils_peri_pclk_enable_divider (en_clk_dst_t clk_dest, const struct ifx_cat1_clock *_clock)
	Enable the divider associated with a peripheral clock.
static cy_rslt_t	ifx_cat1_utils_peri_pclk_set_divider (en_clk_dst_t clk_dest, const struct ifx_cat1_clock *_clock, uint32_t div)
	Set the integer divider for a peripheral clock.
static cy_rslt_t	ifx_cat1_utils_peri_pclk_set_frac_divider (en_clk_dst_t clk_dest, const struct ifx_cat1_clock *_clock, uint32_t div_int, uint32_t div_frac)
	Set the fractional divider for a peripheral clock.
static cy_rslt_t	ifx_cat1_utils_peri_pclk_assign_divider (en_clk_dst_t clk_dest, const struct ifx_cat1_clock *_clock)
	Assign a divider to a peripheral clock destination.
static uint8_t	ifx_cat1_utils_peri_pclk_get_hfclk (uint8_t peri_group)
	Map a peripheral group index to the HF clock that sources it.

High frequency (HF) clock indices
#define	CLK_HF0   (0U)
	HF clock 0.
#define	CLK_HF1   (1U)
	HF clock 1.
#define	CLK_HF2   (2U)
	HF clock 2.
#define	CLK_HF3   (3U)
	HF clock 3.
#define	CLK_HF4   (4U)
	HF clock 4.
#define	CLK_HF5   (5U)
	HF clock 5.
#define	CLK_HF6   (6U)
	HF clock 6.
#define	CLK_HF7   (7U)
	HF clock 7.
#define	CLK_HF8   (8U)
	HF clock 8.
#define	CLK_HF9   (9U)
	HF clock 9.
#define	CLK_HF10   (10U)
	HF clock 10.
#define	CLK_HF11   (11U)
	HF clock 11.
#define	CLK_HF12   (12U)
	HF clock 12.
#define	CLK_HF13   (13U)
	HF clock 13.

Detailed Description

Macro Definition Documentation

CLK_HF0

#define CLK_HF0   (0U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 0.

CLK_HF1

#define CLK_HF1   (1U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 1.

CLK_HF10

#define CLK_HF10   (10U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 10.

CLK_HF11

#define CLK_HF11   (11U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 11.

CLK_HF12

#define CLK_HF12   (12U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 12.

CLK_HF13

#define CLK_HF13   (13U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 13.

CLK_HF2

#define CLK_HF2   (2U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 2.

CLK_HF3

#define CLK_HF3   (3U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 3.

CLK_HF4

#define CLK_HF4   (4U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 4.

CLK_HF5

#define CLK_HF5   (5U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 5.

CLK_HF6

#define CLK_HF6   (6U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 6.

CLK_HF7

#define CLK_HF7   (7U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 7.

CLK_HF8

#define CLK_HF8   (8U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 8.

CLK_HF9

#define CLK_HF9   (9U)

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

HF clock 9.

Enumeration Type Documentation

ifx_cat1_clock_block

enum ifx_cat1_clock_block

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

CAT1 clock block (source or domain) selector.

Function Documentation

ifx_cat1_clock_control_get_frequency()

int ifx_cat1_clock_control_get_frequency	(	uint32_t	dt_ord,
		uint32_t *	frequency )

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

Get the frequency of a clock identified by its Devicetree ordinal.

Parameters

	dt_ord	Devicetree ordinal (dependency ordinal) of the clock node.
[out]	frequency	Resulting clock frequency, in Hz.

Return values

0	on success.
-errno	Negative error code on failure.

ifx_cat1_utils_peri_pclk_assign_divider()

cy_rslt_t ifx_cat1_utils_peri_pclk_assign_divider ( en_clk_dst_t clk_dest, const struct ifx_cat1_clock * _clock )

inlinestatic

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

Assign a divider to a peripheral clock destination.

Parameters

clk_dest	Peripheral clock destination.
_clock	Clock descriptor.

Returns

Result code from the underlying PDL call.

ifx_cat1_utils_peri_pclk_enable_divider()

cy_rslt_t ifx_cat1_utils_peri_pclk_enable_divider ( en_clk_dst_t clk_dest, const struct ifx_cat1_clock * _clock )

inlinestatic

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

Enable the divider associated with a peripheral clock.

Parameters

clk_dest	Peripheral clock destination.
_clock	Clock descriptor.

Returns

Result code from the underlying PDL call.

ifx_cat1_utils_peri_pclk_get_frequency()

uint32_t ifx_cat1_utils_peri_pclk_get_frequency ( en_clk_dst_t clk_dest, const struct ifx_cat1_clock * _clock )

inlinestatic

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

Get the frequency of a peripheral clock divider.

Parameters

clk_dest	Peripheral clock destination.
_clock	Clock descriptor.

Returns

Clock frequency, in Hz.

ifx_cat1_utils_peri_pclk_get_hfclk()

uint8_t ifx_cat1_utils_peri_pclk_get_hfclk ( uint8_t peri_group )

inlinestatic

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

Map a peripheral group index to the HF clock that sources it.

Fallback for SoC families that do not yet implement this mapping. Always returns -EINVAL.

Parameters

peri_group

Peripheral group index (unused).

Returns

-EINVAL always.

ifx_cat1_utils_peri_pclk_set_divider()

cy_rslt_t ifx_cat1_utils_peri_pclk_set_divider ( en_clk_dst_t clk_dest, const struct ifx_cat1_clock * _clock, uint32_t div )

inlinestatic

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

Set the integer divider for a peripheral clock.

Parameters

clk_dest	Peripheral clock destination.
_clock	Clock descriptor.
div	Integer divider value.

Returns

Result code from the underlying PDL call.

ifx_cat1_utils_peri_pclk_set_frac_divider()

cy_rslt_t ifx_cat1_utils_peri_pclk_set_frac_divider ( en_clk_dst_t clk_dest, const struct ifx_cat1_clock * _clock, uint32_t div_int, uint32_t div_frac )

inlinestatic

#include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>

Set the fractional divider for a peripheral clock.

Parameters

clk_dest	Peripheral clock destination.
_clock	Clock descriptor.
div_int	Integer part of the divider.
div_frac	Fractional part of the divider.

Returns

Result code from the underlying PDL call.