Renesas RZ CGC

Files
file	renesas_rz_cgc.h
	Clock source divider and multiplier helpers for Renesas RZ devices.

Macros
#define	RZ_CGC_SUBCLK_DIV(subclk)
	Resolve the divider constant for a sub-clock from its Devicetree div property.
#define	RZ_CGC_SUBCLK_MUL(subclk)
	Resolve the multiplier constant for a sub-clock from its Devicetree mul property.
#define	RZ_CGC_DIV_CKIO(n)
	CKIO clock divider helper.
#define	RZ_CGC_MUL_CPU0CLK(n)
	CPU0 clock multiplier helper.
#define	RZ_CGC_MUL_CPU1CLK(n)
	CPU1 clock multiplier helper.

Detailed Description

Macro Definition Documentation

RZ_CGC_DIV_CKIO

#define RZ_CGC_DIV_CKIO

(

n

)

#include <zephyr/drivers/clock_control/renesas_rz_cgc.h>

Value:

UTIL_CAT(BSP_CLOCKS_CKIO_ICLK_DIV, n)

CKIO clock divider helper.

RZ_CGC_MUL_CPU0CLK

#define RZ_CGC_MUL_CPU0CLK

(

n

)

#include <zephyr/drivers/clock_control/renesas_rz_cgc.h>

Value:

UTIL_CAT(BSP_CLOCKS_FSELCPU0_ICLK_MUL, n)

CPU0 clock multiplier helper.

RZ_CGC_MUL_CPU1CLK

#define RZ_CGC_MUL_CPU1CLK

(

n

)

#include <zephyr/drivers/clock_control/renesas_rz_cgc.h>

Value:

UTIL_CAT(BSP_CLOCKS_FSELCPU1_ICLK_MUL, n)

CPU1 clock multiplier helper.

RZ_CGC_SUBCLK_DIV

#define RZ_CGC_SUBCLK_DIV

(

subclk

)

#include <zephyr/drivers/clock_control/renesas_rz_cgc.h>

Value:

UTIL_CAT(RZ_CGC_DIV_, DT_NODE_FULL_NAME_UPPER_TOKEN(subclk))                               \
(DT_PROP(subclk, div))

Resolve the divider constant for a sub-clock from its Devicetree div property.

Parameters

subclk

Devicetree node identifier of the sub-clock.

RZ_CGC_SUBCLK_MUL

#define RZ_CGC_SUBCLK_MUL

(

subclk

)

#include <zephyr/drivers/clock_control/renesas_rz_cgc.h>

Value:

UTIL_CAT(RZ_CGC_MUL_, DT_NODE_FULL_NAME_UPPER_TOKEN(subclk))                               \
(DT_PROP(subclk, mul))

Resolve the multiplier constant for a sub-clock from its Devicetree mul property.

Parameters

subclk

Devicetree node identifier of the sub-clock.