Arm GIC interrupt controller

Devicetree macros for the Arm Generic Interrupt Controller (GIC). More...

Files
file	arm-gic.h
	Arm GIC interrupt controller devicetree macros.

Macros
#define	IRQ_TYPE_LEVEL   BIT(1)
	Level-triggered interrupt.
#define	IRQ_TYPE_EDGE   BIT(2)
	Edge-triggered interrupt.
#define	GIC_SPI   0x0
	Shared Peripheral Interrupt group.
#define	GIC_PPI   0x1
	Private Peripheral Interrupt group.
#define	IRQ_DEFAULT_PRIORITY   0xa0
	Default interrupt priority.

CPU interrupt numbers
Private peripheral interrupt (PPI) numbers for the Arm CPU interface.
#define	GIC_INT_VIRT_MAINT   25
	Virtual maintenance interrupt.
#define	GIC_INT_HYP_TIMER   26
	Hypervisor timer interrupt.
#define	GIC_INT_VIRT_TIMER   27
	Virtual timer interrupt.
#define	GIC_INT_LEGACY_FIQ   28
	Legacy nFIQ signal.
#define	GIC_INT_PHYS_TIMER   29
	Secure physical timer interrupt.
#define	GIC_INT_NS_PHYS_TIMER   30
	Non-secure physical timer interrupt (alias).
#define	GIC_INT_LEGACY_IRQ   31
	Legacy nIRQ signal.

Detailed Description

Devicetree macros for the Arm Generic Interrupt Controller (GIC).

Macros for encoding interrupt cells for the arm,gic and arm,gic-v3 compatible interrupt controllers. An interrupt is described by three cells: the interrupt group (GIC_SPI or GIC_PPI), the interrupt number within that group, and the trigger type (IRQ_TYPE_LEVEL or IRQ_TYPE_EDGE).

&i2c0 {
        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL>;
};

Macro Definition Documentation

GIC_INT_HYP_TIMER

#define GIC_INT_HYP_TIMER   26

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Hypervisor timer interrupt.

GIC_INT_LEGACY_FIQ

#define GIC_INT_LEGACY_FIQ   28

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Legacy nFIQ signal.

GIC_INT_LEGACY_IRQ

#define GIC_INT_LEGACY_IRQ   31

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Legacy nIRQ signal.

GIC_INT_NS_PHYS_TIMER

#define GIC_INT_NS_PHYS_TIMER   30

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Non-secure physical timer interrupt (alias).

GIC_INT_PHYS_TIMER

#define GIC_INT_PHYS_TIMER   29

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Secure physical timer interrupt.

GIC_INT_VIRT_MAINT

#define GIC_INT_VIRT_MAINT   25

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Virtual maintenance interrupt.

GIC_INT_VIRT_TIMER

#define GIC_INT_VIRT_TIMER   27

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Virtual timer interrupt.

GIC_PPI

#define GIC_PPI   0x1

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Private Peripheral Interrupt group.

GIC_SPI

#define GIC_SPI   0x0

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Shared Peripheral Interrupt group.

IRQ_DEFAULT_PRIORITY

#define IRQ_DEFAULT_PRIORITY   0xa0

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Default interrupt priority.

IRQ_TYPE_EDGE

#define IRQ_TYPE_EDGE   BIT(2)

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Edge-triggered interrupt.

IRQ_TYPE_LEVEL

#define IRQ_TYPE_LEVEL   BIT(1)

#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>

Level-triggered interrupt.