Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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Microchip XEC ECIA interrupt controller

Devicetree macros for the Microchip XEC ECIA interrupt aggregator. More...

Files

file  mchp-xec-ecia.h
 Microchip XEC ECIA interrupt controller devicetree macros.

Macros

#define MCHP_XEC_ECIA_GIRQ_ENC(g, b)
 Encode a peripheral's GIRQ and GIRQ bit position only.
#define MCHP_XEC_ECIA(g, gb, na, nd)
 Encode peripheral interrupt information into a 32-bit value.
#define MCHP_XEC_ECIA_GIRQ(e)
 Extract the GIRQ number from an encoded MCHP_XEC_ECIA() value.
#define MCHP_XEC_ECIA_GIRQ_POS(e)
 Extract the source bit position from an encoded MCHP_XEC_ECIA() value.
#define MCHP_XEC_ECIA_NVIC_AGGR(e)
 Extract the aggregated GIRQ NVIC number from an encoded MCHP_XEC_ECIA() value.
#define MCHP_XEC_ECIA_NVIC_DIRECT(e)
 Extract the direct NVIC number from an encoded MCHP_XEC_ECIA() value.

Detailed Description

Devicetree macros for the Microchip XEC ECIA interrupt aggregator.

Macros for encoding peripheral interrupt information for the microchip,xec-ecia compatible Embedded Controller Interrupt Aggregator (ECIA). MCHP_XEC_ECIA() packs the GIRQ number, the source bit position within that GIRQ and the aggregated/direct NVIC inputs into a single 32-bit value; MCHP_XEC_ECIA_GIRQ_ENC() encodes the GIRQ and bit position only. The matching MCHP_XEC_ECIA_* accessors extract each field.

&some_device {
girqs = <MCHP_XEC_ECIA(21, 8, 13, 119)>;
};

Macro Definition Documentation

◆ MCHP_XEC_ECIA

#define MCHP_XEC_ECIA ( g,
gb,
na,
nd )

#include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>

Value:
(((g) & 0x1f) + (((gb) & 0x1f) << 8) + (((na) & 0xff) << 16) + \
(((nd) & 0xff) << 24))

Encode peripheral interrupt information into a 32-bit value.

Bits [4:0] hold the GIRQ number (in [8, 26]); bits [12:8] hold the peripheral source bit position (in [0, 31]) within the GIRQ; bits [23:16] hold the aggregated GIRQ NVIC number; bits [31:24] hold the direct NVIC number (for sources without a direct connection, set nd equal to na).

Note
GIRQ22 is a peripheral clock wake only. GIRQ22 and its sources are not connected to the NVIC; use 255 for na and nd.
Parameters
gGIRQ number, in the range [8, 26].
gbPeripheral source bit position within the GIRQ, in the range [0, 31].
naAggregated GIRQ NVIC number.
ndDirect NVIC number.

◆ MCHP_XEC_ECIA_GIRQ

#define MCHP_XEC_ECIA_GIRQ ( e)

#include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>

Value:
((e) & 0x1f)

Extract the GIRQ number from an encoded MCHP_XEC_ECIA() value.

◆ MCHP_XEC_ECIA_GIRQ_ENC

#define MCHP_XEC_ECIA_GIRQ_ENC ( g,
b )

#include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>

Value:
(((g) & 0x1f) + (((b) & 0x1f) << 8))

Encode a peripheral's GIRQ and GIRQ bit position only.

Parameters
gGIRQ number, in the range [8, 26].
bSource bit position within the GIRQ, in the range [0, 31].

◆ MCHP_XEC_ECIA_GIRQ_POS

#define MCHP_XEC_ECIA_GIRQ_POS ( e)

#include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>

Value:
(((e) >> 8) & 0x1f)

Extract the source bit position from an encoded MCHP_XEC_ECIA() value.

◆ MCHP_XEC_ECIA_NVIC_AGGR

#define MCHP_XEC_ECIA_NVIC_AGGR ( e)

#include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>

Value:
(((e) >> 16) & 0xff)

Extract the aggregated GIRQ NVIC number from an encoded MCHP_XEC_ECIA() value.

◆ MCHP_XEC_ECIA_NVIC_DIRECT

#define MCHP_XEC_ECIA_NVIC_DIRECT ( e)

#include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>

Value:
(((e) >> 24) & 0xff)

Extract the direct NVIC number from an encoded MCHP_XEC_ECIA() value.