Devicetree macros for the OpenISA RV32M1 interrupt multiplexer (INTMUX). More...

Files
file	openisa-intmux.h
	OpenISA RV32M1 INTMUX devicetree macros.

Macros
#define	INTMUX_CH0_IRQ 24
	Level 1 IRQ for INTMUX channel 0.
#define	INTMUX_CH1_IRQ 25
	Level 1 IRQ for INTMUX channel 1.
#define	INTMUX_CH2_IRQ 26
	Level 1 IRQ for INTMUX channel 2.
#define	INTMUX_CH3_IRQ 27
	Level 1 IRQ for INTMUX channel 3.
#define	INTMUX_CH4_IRQ 28
	Level 1 IRQ for INTMUX channel 4.
#define	INTMUX_CH5_IRQ 29
	Level 1 IRQ for INTMUX channel 5.
#define	INTMUX_CH6_IRQ 30
	Level 1 IRQ for INTMUX channel 6.
#define	INTMUX_CH7_IRQ 31
	Level 1 IRQ for INTMUX channel 7.

Detailed Description

Devicetree macros for the OpenISA RV32M1 interrupt multiplexer (INTMUX).

Level 1 IRQ offsets for each INTMUX channel of the openisa,rv32m1-intmux compatible interrupt controller. Each channel aggregates a set of level 2 interrupts onto a single level 1 line; the INTMUX_CHx_IRQ values give the level 1 line number for channel x and are set on the corresponding openisa,rv32m1-intmux-ch interrupt-controller node.

intmux0_ch0: interrupt-controller@0 {
        compatible = "openisa,rv32m1-intmux-ch";
        #address-cells = <0>;
        #interrupt-cells = <1>;
        interrupt-controller;
        interrupts = <INTMUX_CH0_IRQ>;
        reg = <0x0 0x40>;
};