I3C Common Command Codes. More...

Data Structures
struct	i3c_ccc_target_payload
	Payload structure for Direct CCC to one target. More...

struct	i3c_ccc_payload
	Payload structure for one CCC transaction. More...

struct	i3c_ccc_events
	Payload for ENEC/DISEC CCC (Target Events Command). More...

struct	i3c_ccc_mwl
	Payload for SETMWL/GETMWL CCC (Set/Get Maximum Write Length). More...

struct	i3c_ccc_mrl
	Payload for SETMRL/GETMRL CCC (Set/Get Maximum Read Length). More...

struct	i3c_ccc_deftgts_active_controller
	The active controller part of payload for DEFTGTS CCC. More...

struct	i3c_ccc_deftgts_target
	The target device part of payload for DEFTGTS CCC. More...

struct	i3c_ccc_deftgts
	Payload for DEFTGTS CCC (Define List of Targets). More...

struct	i3c_ccc_address
	Payload for a single device address. More...

struct	i3c_ccc_getpid
	Payload for GETPID CCC (Get Provisioned ID). More...

struct	i3c_ccc_getbcr
	Payload for GETBCR CCC (Get Bus Characteristics Register). More...

struct	i3c_ccc_getdcr
	Payload for GETDCR CCC (Get Device Characteristics Register). More...

union	i3c_ccc_getstatus
	Payload for GETSTATUS CCC (Get Device Status). More...

struct	i3c_ccc_setbrgtgt_tgt
	One Bridged Target for SETBRGTGT payload. More...

struct	i3c_ccc_setbrgtgt
	Payload for SETBRGTGT CCC (Set Bridge Targets). More...

union	i3c_ccc_getmxds
	Payload for GETMXDS CCC (Get Max Data Speed). More...

struct	i3c_ccc_getcaps
	Payload for GETCAPS CCC (Get Optional Feature Capabilities). More...

Macros
#define	I3C_CCC_BROADCAST_MAX_ID 0x7FU
	Maximum CCC ID for broadcast.

#define	I3C_CCC_ENEC(broadcast) ((broadcast) ? 0x00U : 0x80U)
	Enable Events Command.

#define	I3C_CCC_DISEC(broadcast) ((broadcast) ? 0x01U : 0x81U)
	Disable Events Command.

#define	I3C_CCC_ENTAS(as, broadcast) (((broadcast) ? 0x02U : 0x82U) + (as))
	Enter Activity State.

#define	I3C_CCC_ENTAS0(broadcast) I3C_CCC_ENTAS(0, broadcast)
	Enter Activity State 0.

#define	I3C_CCC_ENTAS1(broadcast) I3C_CCC_ENTAS(1, broadcast)
	Enter Activity State 1.

#define	I3C_CCC_ENTAS2(broadcast) I3C_CCC_ENTAS(2, broadcast)
	Enter Activity State 2.

#define	I3C_CCC_ENTAS3(broadcast) I3C_CCC_ENTAS(3, broadcast)
	Enter Activity State 3.

#define	I3C_CCC_RSTDAA 0x06U
	Reset Dynamic Address Assignment (Broadcast)

#define	I3C_CCC_ENTDAA 0x07U
	Enter Dynamic Address Assignment (Broadcast)

#define	I3C_CCC_DEFTGTS 0x08U
	Define List of Targets (Broadcast)

#define	I3C_CCC_SETMWL(broadcast) ((broadcast) ? 0x09U : 0x89U)
	Set Max Write Length (Broadcast or Direct)

#define	I3C_CCC_SETMRL(broadcast) ((broadcast) ? 0x0AU : 0x8AU)
	Set Max Read Length (Broadcast or Direct)

#define	I3C_CCC_ENTTM 0x0BU
	Enter Test Mode (Broadcast)

#define	I3C_CCC_SETBUSCON 0x0CU
	Set Bus Context (Broadcast)

#define	I3C_CCC_ENDXFER(broadcast) ((broadcast) ? 0x12U : 0x92U)
	Data Transfer Ending Procedure Control.

#define	I3C_CCC_ENTHDR(x) (0x20U + (x))
	Enter HDR Mode (HDR-DDR) (Broadcast)

#define	I3C_CCC_ENTHDR0 0x20U
	Enter HDR Mode 0 (HDR-DDR) (Broadcast)

#define	I3C_CCC_ENTHDR1 0x21U
	Enter HDR Mode 1 (HDR-TSP) (Broadcast)

#define	I3C_CCC_ENTHDR2 0x22U
	Enter HDR Mode 2 (HDR-TSL) (Broadcast)

#define	I3C_CCC_ENTHDR3 0x23U
	Enter HDR Mode 3 (HDR-BT) (Broadcast)

#define	I3C_CCC_ENTHDR4 0x24U
	Enter HDR Mode 4 (Broadcast)

#define	I3C_CCC_ENTHDR5 0x25U
	Enter HDR Mode 5 (Broadcast)

#define	I3C_CCC_ENTHDR6 0x26U
	Enter HDR Mode 6 (Broadcast)

#define	I3C_CCC_ENTHDR7 0x27U
	Enter HDR Mode 7 (Broadcast)

#define	I3C_CCC_SETXTIME(broadcast) ((broadcast) ? 0x28U : 0x98U)
	Exchange Timing Information (Broadcast or Direct)

#define	I3C_CCC_SETAASA 0x29U
	Set All Addresses to Static Addresses (Broadcast)

#define	I3C_CCC_RSTACT(broadcast) ((broadcast) ? 0x2AU : 0x9AU)
	Target Reset Action.

#define	I3C_CCC_DEFGRPA 0x2BU
	Define List of Group Address (Broadcast)

#define	I3C_CCC_RSTGRPA(broadcast) ((broadcast) ? 0x2CU : 0x9CU)
	Reset Group Address.

#define	I3C_CCC_MLANE(broadcast) ((broadcast) ? 0x2DU : 0x9DU)
	Multi-Lane Data Transfer Control (Broadcast)

#define	I3C_CCC_VENDOR(broadcast, id) ((id) + ((broadcast) ? 0x61U : 0xE0U))
	Vendor/Standard Extension.

#define	I3C_CCC_SETDASA 0x87U
	Set Dynamic Address from Static Address (Direct)

#define	I3C_CCC_SETNEWDA 0x88U
	Set New Dynamic Address (Direct)

#define	I3C_CCC_GETMWL 0x8BU
	Get Max Write Length (Direct)

#define	I3C_CCC_GETMRL 0x8CU
	Get Max Read Length (Direct)

#define	I3C_CCC_GETPID 0x8DU
	Get Provisioned ID (Direct)

#define	I3C_CCC_GETBCR 0x8EU
	Get Bus Characteristics Register (Direct)

#define	I3C_CCC_GETDCR 0x8FU
	Get Device Characteristics Register (Direct)

#define	I3C_CCC_GETSTATUS 0x90U
	Get Device Status (Direct)

#define	I3C_CCC_GETACCCR 0x91U
	Get Accept Controller Role (Direct)

#define	I3C_CCC_SETBRGTGT 0x93U
	Set Bridge Targets (Direct)

#define	I3C_CCC_GETMXDS 0x94U
	Get Max Data Speed (Direct)

#define	I3C_CCC_GETCAPS 0x95U
	Get Optional Feature Capabilities (Direct)

#define	I3C_CCC_SETROUTE 0x96U
	Set Route (Direct)

#define	I3C_CCC_D2DXFER 0x97U
	Device to Device(s) Tunneling Control (Direct)

#define	I3C_CCC_GETXTIME 0x99U
	Get Exchange Timing Information (Direct)

#define	I3C_CCC_SETGRPA 0x9BU
	Set Group Address (Direct)

#define	I3C_CCC_ENEC_EVT_ENINTR BIT(0)
	Enable Events (ENEC) - Target Interrupt Requests.

#define	I3C_CCC_ENEC_EVT_ENCR BIT(1)
	Enable Events (ENEC) - Controller Role Requests.

#define	I3C_CCC_ENEC_EVT_ENHJ BIT(3)
	Enable Events (ENEC) - Hot-Join Event.

#define	I3C_CCC_ENEC_EVT_ALL (I3C_CCC_ENEC_EVT_ENINTR \| I3C_CCC_ENEC_EVT_ENCR \| I3C_CCC_ENEC_EVT_ENHJ)

#define	I3C_CCC_DISEC_EVT_DISINTR BIT(0)
	Disable Events (DISEC) - Target Interrupt Requests.

#define	I3C_CCC_DISEC_EVT_DISCR BIT(1)
	Disable Events (DISEC) - Controller Role Requests.

#define	I3C_CCC_DISEC_EVT_DISHJ BIT(3)
	Disable Events (DISEC) - Hot-Join Event.

#define	I3C_CCC_DISEC_EVT_ALL (I3C_CCC_DISEC_EVT_DISINTR \| I3C_CCC_DISEC_EVT_DISCR \| I3C_CCC_DISEC_EVT_DISHJ)

#define	I3C_CCC_EVT_INTR BIT(0)
	Events - Target Interrupt Requests.

#define	I3C_CCC_EVT_CR BIT(1)
	Events - Controller Role Requests.

#define	I3C_CCC_EVT_HJ BIT(3)
	Events - Hot-Join Event.

#define	I3C_CCC_EVT_ALL (I3C_CCC_EVT_INTR \| I3C_CCC_EVT_CR \| I3C_CCC_EVT_HJ)
	Bitmask for all events.

#define	I3C_CCC_GETSTATUS_PROTOCOL_ERR BIT(5)
	GETSTATUS Format 1 - Protocol Error bit.

#define	I3C_CCC_GETSTATUS_ACTIVITY_MODE_SHIFT 6
	GETSTATUS Format 1 - Activity Mode bit shift value.

#define	I3C_CCC_GETSTATUS_ACTIVITY_MODE_MASK (0x03U << I3C_CCC_GETSTATUS_ACTIVITY_MODE_SHIFT)
	GETSTATUS Format 1 - Activity Mode bitmask.

#define	I3C_CCC_GETSTATUS_ACTIVITY_MODE(status)
	GETSTATUS Format 1 - Activity Mode.

#define	I3C_CCC_GETSTATUS_NUM_INT_SHIFT 0
	GETSTATUS Format 1 - Number of Pending Interrupts bit shift value.

#define	I3C_CCC_GETSTATUS_NUM_INT_MASK (0x0FU << I3C_CCC_GETSTATUS_NUM_INT_SHIFT)
	GETSTATUS Format 1 - Number of Pending Interrupts bitmask.

#define	I3C_CCC_GETSTATUS_NUM_INT(status)
	GETSTATUS Format 1 - Number of Pending Interrupts.

#define	I3C_CCC_GETSTATUS_PRECR_DEEP_SLEEP_DETECTED BIT(0)
	GETSTATUS Format 2 - PERCR - Deep Sleep Detected bit.

#define	I3C_CCC_GETSTATUS_PRECR_HANDOFF_DELAY_NACK BIT(1)
	GETSTATUS Format 2 - PERCR - Handoff Delay NACK.

#define	I3C_CCC_GETMXDS_MAX_SDR_FSCL_MAX 0
	Get Max Data Speed (GETMXDS) - Default Max Sustained Data Rate.

#define	I3C_CCC_GETMXDS_MAX_SDR_FSCL_8MHZ 1
	Get Max Data Speed (GETMXDS) - 8MHz Max Sustained Data Rate.

#define	I3C_CCC_GETMXDS_MAX_SDR_FSCL_6MHZ 2
	Get Max Data Speed (GETMXDS) - 6MHz Max Sustained Data Rate.

#define	I3C_CCC_GETMXDS_MAX_SDR_FSCL_4MHZ 3
	Get Max Data Speed (GETMXDS) - 4MHz Max Sustained Data Rate.

#define	I3C_CCC_GETMXDS_MAX_SDR_FSCL_2MHZ 4
	Get Max Data Speed (GETMXDS) - 2MHz Max Sustained Data Rate.

#define	I3C_CCC_GETMXDS_TSCO_8NS 0
	Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 8ns.

#define	I3C_CCC_GETMXDS_TSCO_9NS 1
	Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 9ns.

#define	I3C_CCC_GETMXDS_TSCO_10NS 2
	Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 10ns.

#define	I3C_CCC_GETMXDS_TSCO_11NS 3
	Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 11ns.

#define	I3C_CCC_GETMXDS_TSCO_12NS 4
	Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 12ns.

#define	I3C_CCC_GETMXDS_TSCO_GT_12NS 7
	Get Max Data Speed (GETMXDS) - Clock to Data Turnaround > 12ns.

#define	I3C_CCC_GETMXDS_MAXWR_DEFINING_BYTE_SUPPORT BIT(3)
	Get Max Data Speed (GETMXDS) - maxWr - Optional Defining Byte Support.

#define	I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL_SHIFT 0
	Get Max Data Speed (GETMXDS) - Max Sustained Data Rate bit shift value.

#define	I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL_MASK (0x07U << I3C_CCC_GET_MXDS_MAXWR_MAX_SDR_FSCL_SHIFT)
	Get Max Data Speed (GETMXDS) - Max Sustained Data Rate bitmask.

#define	I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL(maxwr)
	Get Max Data Speed (GETMXDS) - maxWr - Max Sustained Data Rate.

#define	I3C_CCC_GETMXDS_MAXRD_W2R_PERMITS_STOP_BETWEEN BIT(6)
	Get Max Data Speed (GETMXDS) - maxRd - Write-to-Read Permits Stop Between.

#define	I3C_CCC_GETMXDS_MAXRD_TSCO_SHIFT 3
	Get Max Data Speed (GETMXDS) - maxRd - Clock to Data Turnaround bit shift value.

#define	I3C_CCC_GETMXDS_MAXRD_TSCO_MASK (0x07U << I3C_CCC_GETMXDS_MAXRD_TSCO_SHIFT)
	Get Max Data Speed (GETMXDS) - maxRd - Clock to Data Turnaround bitmask.

#define	I3C_CCC_GETMXDS_MAXRD_TSCO(maxrd)
	Get Max Data Speed (GETMXDS) - maxRd - Clock to Data Turnaround.

#define	I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL_SHIFT 0
	Get Max Data Speed (GETMXDS) - maxRd - Max Sustained Data Rate bit shift value.

#define	I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL_MASK (0x07U << I3C_CCC_GET_MXDS_MAXRD_MAX_SDR_FSCL_SHIFT)
	Get Max Data Speed (GETMXDS) - maxRd - Max Sustained Data Rate bitmask.

#define	I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL(maxrd)
	Get Max Data Speed (GETMXDS) - maxRd - Max Sustained Data Rate.

#define	I3C_CCC_GETMXDS_CRDHLY1_SET_BUS_ACT_STATE BIT(2)
	Get Max Data Speed (GETMXDS) - CRDHLY1 - Set Bus Activity State bit shift value.

#define	I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE_SHIFT 0
	Get Max Data Speed (GETMXDS) - CRDHLY1 - Controller Handoff Activity State bit shift value.

#define	I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE_MASK (0x03U << I3C_CCC_GETMXDS_CRDHLY1_SET_BUS_ACT_STATE_SHIFT)
	Get Max Data Speed (GETMXDS) - CRDHLY1 - Controller Handoff Activity State bitmask.

#define	I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE(crhdly1)
	Get Max Data Speed (GETMXDS) - CRDHLY1 - Controller Handoff Activity State.

#define	I3C_CCC_GETCAPS1_HDR_DDR BIT(0)
	Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR-DDR mode bit.

#define	I3C_CCC_GETCAPS1_HDR_BT BIT(3)
	Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR-BT mode bit.

#define	I3C_CCC_GETCAPS1_HDR_MODE(x) BIT(x)
	Get Optional Feature Capabilities (GETCAPS) - HDR Mode.

#define	I3C_CCC_GETCAPS1_HDR_MODE0 BIT(0)
	Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 0.

#define	I3C_CCC_GETCAPS1_HDR_MODE1 BIT(1)
	Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 1.

#define	I3C_CCC_GETCAPS1_HDR_MODE2 BIT(2)
	Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 2.

#define	I3C_CCC_GETCAPS1_HDR_MODE3 BIT(3)
	Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 3.

#define	I3C_CCC_GETCAPS1_HDR_MODE4 BIT(4)
	Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 4.

#define	I3C_CCC_GETCAPS1_HDR_MODE5 BIT(5)
	Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 5.

#define	I3C_CCC_GETCAPS1_HDR_MODE6 BIT(6)
	Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 6.

#define	I3C_CCC_GETCAPS1_HDR_MODE7 BIT(7)
	Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 7.

#define	I3C_CCC_GETCAPS2_HDRDDR_WRITE_ABORT BIT(6)
	Get Optional Feature Capabilities (GETCAPS) Format 2 - HDR-DDR Write Abort bit.

#define	I3C_CCC_GETCAPS2_HDRDDR_ABORT_CRC BIT(7)
	Get Optional Feature Capabilities (GETCAPS) Format 2 - HDR-DDR Abort CRC bit.

#define	I3C_CCC_GETCAPS2_GRPADDR_CAP_SHIFT 4
	Get Optional Feature Capabilities (GETCAPS) Format 2 - Group Address Capabilities bit shift value.

#define	I3C_CCC_GETCAPS2_GRPADDR_CAP_MASK (0x03U << I3C_CCC_GETCAPS2_GRPADDR_CAP_SHIFT)
	Get Optional Feature Capabilities (GETCAPS) Format 2 - Group Address Capabilities bitmask.

#define	I3C_CCC_GETCAPS2_GRPADDR_CAP(getcaps2)
	Get Optional Feature Capabilities (GETCAPS) Format 2 - Group Address Capabilities.

#define	I3C_CCC_GETCAPS2_SPEC_VER_SHIFT 0
	Get Optional Feature Capabilities (GETCAPS) Format 2 - I3C 1.x Specification Version bit shift value.

#define	I3C_CCC_GETCAPS2_SPEC_VER_MASK (0x0FU << I3C_CCC_GETCAPS2_SPEC_VER_SHIFT)
	Get Optional Feature Capabilities (GETCAPS) Format 2 - I3C 1.x Specification Version bitmask.

#define	I3C_CCC_GETCAPS2_SPEC_VER(getcaps2)
	Get Optional Feature Capabilities (GETCAPS) Format 2 - I3C 1.x Specification Version.

#define	I3C_CCC_GETCAPS3_MLANE_SUPPORT BIT(0)
	Get Optional Feature Capabilities (GETCAPS) Format 3 - Multi-Lane Data Transfer Support bit.

#define	I3C_CCC_GETCAPS3_D2DXFER_SUPPORT BIT(1)
	Get Optional Feature Capabilities (GETCAPS) Format 3 - Device to Device Transfer (D2DXFER) Support bit.

#define	I3C_CCC_GETCAPS3_D2DXFER_IBI_CAPABLE BIT(2)
	Get Optional Feature Capabilities (GETCAPS) Format 3 - Device to Device Transfer (D2DXFER) IBI Capable bit.

#define	I3C_CCC_GETCAPS3_GETCAPS_DEFINING_BYTE_SUPPORT BIT(3)
	Get Optional Feature Capabilities (GETCAPS) Format 3 - Defining Byte Support in GETCAPS bit.

#define	I3C_CCC_GETCAPS3_GETSTATUS_DEFINING_BYTE_SUPPORT BIT(4)
	Get Optional Feature Capabilities (GETCAPS) Format 3 - Defining Byte Support in GETSTATUS bit.

#define	I3C_CCC_GETCAPS3_HDRBT_CRC32_SUPPORT BIT(5)
	Get Optional Feature Capabilities (GETCAPS) Format 3 - HDR-BT CRC-32 Support bit.

#define	I3C_CCC_GETCAPS3_IBI_MDR_PENDING_READ_NOTIFICATION BIT(6)
	Get Optional Feature Capabilities (GETCAPS) Format 3 - IBI MDB Support for Pending Read Notification bit.

Enumerations
enum	i3c_ccc_getstatus_fmt { GETSTATUS_FORMAT_1 , GETSTATUS_FORMAT_2 }
	Indicate which format of GETSTATUS to use. More...

enum	i3c_ccc_getstatus_defbyte { GETSTATUS_FORMAT_2_TGTSTAT = 0x00U , GETSTATUS_FORMAT_2_PRECR = 0x91U , GETSTATUS_FORMAT_2_INVALID = 0x100U }
	Defining byte values for GETSTATUS Format 2. More...

enum	i3c_ccc_rstact_defining_byte { I3C_CCC_RSTACT_NO_RESET = 0x00U , I3C_CCC_RSTACT_PERIPHERAL_ONLY = 0x01U , I3C_CCC_RSTACT_RESET_WHOLE_TARGET = 0x02U , I3C_CCC_RSTACT_DEBUG_NETWORK_ADAPTER = 0x03U , I3C_CCC_RSTACT_VIRTUAL_TARGET_DETECT = 0x04U }
	Enum for I3C Reset Action (RSTACT) Defining Byte Values. More...

Functions
static bool	i3c_ccc_is_payload_broadcast (const struct i3c_ccc_payload *payload)
	Test if I3C CCC payload is for broadcast.

int	i3c_ccc_do_getbcr (struct i3c_device_desc target, struct i3c_ccc_getbcr bcr)
	Get BCR from a target.

int	i3c_ccc_do_getdcr (struct i3c_device_desc target, struct i3c_ccc_getdcr dcr)
	Get DCR from a target.

int	i3c_ccc_do_getpid (struct i3c_device_desc target, struct i3c_ccc_getpid pid)
	Get PID from a target.

int	i3c_ccc_do_rstact_all (const struct device *controller, enum i3c_ccc_rstact_defining_byte action)
	Broadcast RSTACT to reset I3C Peripheral.

int	i3c_ccc_do_rstdaa_all (const struct device *controller)
	Broadcast RSTDAA to reset dynamic addresses for all targets.

int	i3c_ccc_do_setdasa (const struct i3c_device_desc *target)
	Set Dynamic Address from Static Address for a target.

int	i3c_ccc_do_setnewda (const struct i3c_device_desc *target, struct i3c_ccc_address new_da)
	Set New Dynamic Address for a target.

int	i3c_ccc_do_events_all_set (const struct device controller, bool enable, struct i3c_ccc_events events)
	Broadcast ENEC/DISEC to enable/disable target events.

int	i3c_ccc_do_events_set (struct i3c_device_desc target, bool enable, struct i3c_ccc_events events)
	Direct CCC ENEC/DISEC to enable/disable target events.

int	i3c_ccc_do_setmwl_all (const struct device controller, const struct i3c_ccc_mwl mwl)
	Broadcast SETMWL to Set Maximum Write Length.

int	i3c_ccc_do_setmwl (const struct i3c_device_desc target, const struct i3c_ccc_mwl mwl)
	Single target SETMWL to Set Maximum Write Length.

int	i3c_ccc_do_getmwl (const struct i3c_device_desc target, struct i3c_ccc_mwl mwl)
	Single target GETMWL to Get Maximum Write Length.

int	i3c_ccc_do_setmrl_all (const struct device controller, const struct i3c_ccc_mrl mrl, bool has_ibi_size)
	Broadcast SETMRL to Set Maximum Read Length.

int	i3c_ccc_do_setmrl (const struct i3c_device_desc target, const struct i3c_ccc_mrl mrl)
	Single target SETMRL to Set Maximum Read Length.

int	i3c_ccc_do_getmrl (const struct i3c_device_desc target, struct i3c_ccc_mrl mrl)
	Single target GETMRL to Get Maximum Read Length.

int	i3c_ccc_do_getstatus (const struct i3c_device_desc target, union i3c_ccc_getstatus status, enum i3c_ccc_getstatus_fmt fmt, enum i3c_ccc_getstatus_defbyte defbyte)
	Single target GETSTATUS to Get Target Status.

static int	i3c_ccc_do_getstatus_fmt1 (const struct i3c_device_desc target, union i3c_ccc_getstatus status)
	Single target GETSTATUS to Get Target Status (Format 1).

static int	i3c_ccc_do_getstatus_fmt2 (const struct i3c_device_desc target, union i3c_ccc_getstatus status, enum i3c_ccc_getstatus_defbyte defbyte)
	Single target GETSTATUS to Get Target Status (Format 2).

Detailed Description

I3C Common Command Codes.

Macro Definition Documentation

◆ I3C_CCC_BROADCAST_MAX_ID

#define I3C_CCC_BROADCAST_MAX_ID 0x7FU

#include <zephyr/drivers/i3c/ccc.h>

Maximum CCC ID for broadcast.

◆ I3C_CCC_D2DXFER

#define I3C_CCC_D2DXFER 0x97U

#include <zephyr/drivers/i3c/ccc.h>

Device to Device(s) Tunneling Control (Direct)

◆ I3C_CCC_DEFGRPA

#define I3C_CCC_DEFGRPA 0x2BU

#include <zephyr/drivers/i3c/ccc.h>

Define List of Group Address (Broadcast)

◆ I3C_CCC_DEFTGTS

#define I3C_CCC_DEFTGTS 0x08U

#include <zephyr/drivers/i3c/ccc.h>

Define List of Targets (Broadcast)

◆ I3C_CCC_DISEC

#define I3C_CCC_DISEC ( broadcast ) ((broadcast) ? 0x01U : 0x81U)

#include <zephyr/drivers/i3c/ccc.h>

Disable Events Command.

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_DISEC_EVT_ALL

#define I3C_CCC_DISEC_EVT_ALL (I3C_CCC_DISEC_EVT_DISINTR | I3C_CCC_DISEC_EVT_DISCR | I3C_CCC_DISEC_EVT_DISHJ)

#include <zephyr/drivers/i3c/ccc.h>

◆ I3C_CCC_DISEC_EVT_DISCR

#define I3C_CCC_DISEC_EVT_DISCR BIT(1)

#include <zephyr/drivers/i3c/ccc.h>

Disable Events (DISEC) - Controller Role Requests.

◆ I3C_CCC_DISEC_EVT_DISHJ

#define I3C_CCC_DISEC_EVT_DISHJ BIT(3)

#include <zephyr/drivers/i3c/ccc.h>

Disable Events (DISEC) - Hot-Join Event.

◆ I3C_CCC_DISEC_EVT_DISINTR

#define I3C_CCC_DISEC_EVT_DISINTR BIT(0)

#include <zephyr/drivers/i3c/ccc.h>

Disable Events (DISEC) - Target Interrupt Requests.

◆ I3C_CCC_ENDXFER

#define I3C_CCC_ENDXFER ( broadcast ) ((broadcast) ? 0x12U : 0x92U)

#include <zephyr/drivers/i3c/ccc.h>

Data Transfer Ending Procedure Control.

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_ENEC

#define I3C_CCC_ENEC ( broadcast ) ((broadcast) ? 0x00U : 0x80U)

#include <zephyr/drivers/i3c/ccc.h>

Enable Events Command.

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_ENEC_EVT_ALL

#define I3C_CCC_ENEC_EVT_ALL (I3C_CCC_ENEC_EVT_ENINTR | I3C_CCC_ENEC_EVT_ENCR | I3C_CCC_ENEC_EVT_ENHJ)

#include <zephyr/drivers/i3c/ccc.h>

◆ I3C_CCC_ENEC_EVT_ENCR

#define I3C_CCC_ENEC_EVT_ENCR BIT(1)

#include <zephyr/drivers/i3c/ccc.h>

Enable Events (ENEC) - Controller Role Requests.

◆ I3C_CCC_ENEC_EVT_ENHJ

#define I3C_CCC_ENEC_EVT_ENHJ BIT(3)

#include <zephyr/drivers/i3c/ccc.h>

Enable Events (ENEC) - Hot-Join Event.

◆ I3C_CCC_ENEC_EVT_ENINTR

#define I3C_CCC_ENEC_EVT_ENINTR BIT(0)

#include <zephyr/drivers/i3c/ccc.h>

Enable Events (ENEC) - Target Interrupt Requests.

◆ I3C_CCC_ENTAS

#define I3C_CCC_ENTAS	(	as,
		broadcast
	)	(((broadcast) ? 0x02U : 0x82U) + (as))

#include <zephyr/drivers/i3c/ccc.h>

Enter Activity State.

Parameters

as	Desired activity state
broadcast	True if broadcast, false if direct.

◆ I3C_CCC_ENTAS0

#define I3C_CCC_ENTAS0 ( broadcast ) I3C_CCC_ENTAS(0, broadcast)

#include <zephyr/drivers/i3c/ccc.h>

Enter Activity State 0.

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_ENTAS1

#define I3C_CCC_ENTAS1 ( broadcast ) I3C_CCC_ENTAS(1, broadcast)

#include <zephyr/drivers/i3c/ccc.h>

Enter Activity State 1.

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_ENTAS2

#define I3C_CCC_ENTAS2 ( broadcast ) I3C_CCC_ENTAS(2, broadcast)

#include <zephyr/drivers/i3c/ccc.h>

Enter Activity State 2.

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_ENTAS3

#define I3C_CCC_ENTAS3 ( broadcast ) I3C_CCC_ENTAS(3, broadcast)

#include <zephyr/drivers/i3c/ccc.h>

Enter Activity State 3.

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_ENTDAA

#define I3C_CCC_ENTDAA 0x07U

#include <zephyr/drivers/i3c/ccc.h>

Enter Dynamic Address Assignment (Broadcast)

◆ I3C_CCC_ENTHDR

#define I3C_CCC_ENTHDR ( x ) (0x20U + (x))

#include <zephyr/drivers/i3c/ccc.h>

Enter HDR Mode (HDR-DDR) (Broadcast)

◆ I3C_CCC_ENTHDR0

#define I3C_CCC_ENTHDR0 0x20U

#include <zephyr/drivers/i3c/ccc.h>

Enter HDR Mode 0 (HDR-DDR) (Broadcast)

◆ I3C_CCC_ENTHDR1

#define I3C_CCC_ENTHDR1 0x21U

#include <zephyr/drivers/i3c/ccc.h>

Enter HDR Mode 1 (HDR-TSP) (Broadcast)

◆ I3C_CCC_ENTHDR2

#define I3C_CCC_ENTHDR2 0x22U

#include <zephyr/drivers/i3c/ccc.h>

Enter HDR Mode 2 (HDR-TSL) (Broadcast)

◆ I3C_CCC_ENTHDR3

#define I3C_CCC_ENTHDR3 0x23U

#include <zephyr/drivers/i3c/ccc.h>

Enter HDR Mode 3 (HDR-BT) (Broadcast)

◆ I3C_CCC_ENTHDR4

#define I3C_CCC_ENTHDR4 0x24U

#include <zephyr/drivers/i3c/ccc.h>

Enter HDR Mode 4 (Broadcast)

◆ I3C_CCC_ENTHDR5

#define I3C_CCC_ENTHDR5 0x25U

#include <zephyr/drivers/i3c/ccc.h>

Enter HDR Mode 5 (Broadcast)

◆ I3C_CCC_ENTHDR6

#define I3C_CCC_ENTHDR6 0x26U

#include <zephyr/drivers/i3c/ccc.h>

Enter HDR Mode 6 (Broadcast)

◆ I3C_CCC_ENTHDR7

#define I3C_CCC_ENTHDR7 0x27U

#include <zephyr/drivers/i3c/ccc.h>

Enter HDR Mode 7 (Broadcast)

◆ I3C_CCC_ENTTM

#define I3C_CCC_ENTTM 0x0BU

#include <zephyr/drivers/i3c/ccc.h>

Enter Test Mode (Broadcast)

◆ I3C_CCC_EVT_ALL

#define I3C_CCC_EVT_ALL (I3C_CCC_EVT_INTR | I3C_CCC_EVT_CR | I3C_CCC_EVT_HJ)

#include <zephyr/drivers/i3c/ccc.h>

Bitmask for all events.

◆ I3C_CCC_EVT_CR

#define I3C_CCC_EVT_CR BIT(1)

#include <zephyr/drivers/i3c/ccc.h>

Events - Controller Role Requests.

◆ I3C_CCC_EVT_HJ

#define I3C_CCC_EVT_HJ BIT(3)

#include <zephyr/drivers/i3c/ccc.h>

Events - Hot-Join Event.

◆ I3C_CCC_EVT_INTR

#define I3C_CCC_EVT_INTR BIT(0)

#include <zephyr/drivers/i3c/ccc.h>

Events - Target Interrupt Requests.

◆ I3C_CCC_GETACCCR

#define I3C_CCC_GETACCCR 0x91U

#include <zephyr/drivers/i3c/ccc.h>

Get Accept Controller Role (Direct)

◆ I3C_CCC_GETBCR

#define I3C_CCC_GETBCR 0x8EU

#include <zephyr/drivers/i3c/ccc.h>

Get Bus Characteristics Register (Direct)

◆ I3C_CCC_GETCAPS

#define I3C_CCC_GETCAPS 0x95U

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (Direct)

◆ I3C_CCC_GETCAPS1_HDR_BT

#define I3C_CCC_GETCAPS1_HDR_BT BIT(3)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR-BT mode bit.

◆ I3C_CCC_GETCAPS1_HDR_DDR

#define I3C_CCC_GETCAPS1_HDR_DDR BIT(0)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR-DDR mode bit.

◆ I3C_CCC_GETCAPS1_HDR_MODE

#define I3C_CCC_GETCAPS1_HDR_MODE ( x ) BIT(x)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) - HDR Mode.

Get the bit corresponding to HDR mode.

Parameters

x HDR mode

◆ I3C_CCC_GETCAPS1_HDR_MODE0

#define I3C_CCC_GETCAPS1_HDR_MODE0 BIT(0)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 0.

◆ I3C_CCC_GETCAPS1_HDR_MODE1

#define I3C_CCC_GETCAPS1_HDR_MODE1 BIT(1)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 1.

◆ I3C_CCC_GETCAPS1_HDR_MODE2

#define I3C_CCC_GETCAPS1_HDR_MODE2 BIT(2)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 2.

◆ I3C_CCC_GETCAPS1_HDR_MODE3

#define I3C_CCC_GETCAPS1_HDR_MODE3 BIT(3)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 3.

◆ I3C_CCC_GETCAPS1_HDR_MODE4

#define I3C_CCC_GETCAPS1_HDR_MODE4 BIT(4)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 4.

◆ I3C_CCC_GETCAPS1_HDR_MODE5

#define I3C_CCC_GETCAPS1_HDR_MODE5 BIT(5)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 5.

◆ I3C_CCC_GETCAPS1_HDR_MODE6

#define I3C_CCC_GETCAPS1_HDR_MODE6 BIT(6)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 6.

◆ I3C_CCC_GETCAPS1_HDR_MODE7

#define I3C_CCC_GETCAPS1_HDR_MODE7 BIT(7)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 1 - HDR Mode 7.

◆ I3C_CCC_GETCAPS2_GRPADDR_CAP

#define I3C_CCC_GETCAPS2_GRPADDR_CAP ( getcaps2 )

#include <zephyr/drivers/i3c/ccc.h>

Value:

        (((getcaps2) &                                          \
          I3C_CCC_GETCAPS2_GRPADDR_CAP_MASK)                    \
         >> I3C_CCC_GETCAPS_GRPADDR_CAP_SHIFT)

Get Optional Feature Capabilities (GETCAPS) Format 2 - Group Address Capabilities.

Obtain Group Address Capabilities value from GETCAPS Format 2 value obtained via GETCAPS.

Parameters

getcaps2 GETCAPS2 value.

◆ I3C_CCC_GETCAPS2_GRPADDR_CAP_MASK

#define I3C_CCC_GETCAPS2_GRPADDR_CAP_MASK (0x03U << I3C_CCC_GETCAPS2_GRPADDR_CAP_SHIFT)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 2 - Group Address Capabilities bitmask.

◆ I3C_CCC_GETCAPS2_GRPADDR_CAP_SHIFT

#define I3C_CCC_GETCAPS2_GRPADDR_CAP_SHIFT 4

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 2 - Group Address Capabilities bit shift value.

◆ I3C_CCC_GETCAPS2_HDRDDR_ABORT_CRC

#define I3C_CCC_GETCAPS2_HDRDDR_ABORT_CRC BIT(7)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 2 - HDR-DDR Abort CRC bit.

◆ I3C_CCC_GETCAPS2_HDRDDR_WRITE_ABORT

#define I3C_CCC_GETCAPS2_HDRDDR_WRITE_ABORT BIT(6)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 2 - HDR-DDR Write Abort bit.

◆ I3C_CCC_GETCAPS2_SPEC_VER

#define I3C_CCC_GETCAPS2_SPEC_VER ( getcaps2 )

#include <zephyr/drivers/i3c/ccc.h>

Value:

        (((getcaps2) &                                          \
          I3C_CCC_GETCAPS2_SPEC_VER_MASK)                       \
         >> I3C_CCC_GETCAPS_SPEC_VER_SHIFT)

Get Optional Feature Capabilities (GETCAPS) Format 2 - I3C 1.x Specification Version.

Obtain I3C 1.x Specification Version value from GETCAPS Format 2 value obtained via GETCAPS.

Parameters

getcaps2 GETCAPS2 value.

◆ I3C_CCC_GETCAPS2_SPEC_VER_MASK

#define I3C_CCC_GETCAPS2_SPEC_VER_MASK (0x0FU << I3C_CCC_GETCAPS2_SPEC_VER_SHIFT)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 2 - I3C 1.x Specification Version bitmask.

◆ I3C_CCC_GETCAPS2_SPEC_VER_SHIFT

#define I3C_CCC_GETCAPS2_SPEC_VER_SHIFT 0

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 2 - I3C 1.x Specification Version bit shift value.

◆ I3C_CCC_GETCAPS3_D2DXFER_IBI_CAPABLE

#define I3C_CCC_GETCAPS3_D2DXFER_IBI_CAPABLE BIT(2)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 3 - Device to Device Transfer (D2DXFER) IBI Capable bit.

◆ I3C_CCC_GETCAPS3_D2DXFER_SUPPORT

#define I3C_CCC_GETCAPS3_D2DXFER_SUPPORT BIT(1)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 3 - Device to Device Transfer (D2DXFER) Support bit.

◆ I3C_CCC_GETCAPS3_GETCAPS_DEFINING_BYTE_SUPPORT

#define I3C_CCC_GETCAPS3_GETCAPS_DEFINING_BYTE_SUPPORT BIT(3)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 3 - Defining Byte Support in GETCAPS bit.

◆ I3C_CCC_GETCAPS3_GETSTATUS_DEFINING_BYTE_SUPPORT

#define I3C_CCC_GETCAPS3_GETSTATUS_DEFINING_BYTE_SUPPORT BIT(4)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 3 - Defining Byte Support in GETSTATUS bit.

◆ I3C_CCC_GETCAPS3_HDRBT_CRC32_SUPPORT

#define I3C_CCC_GETCAPS3_HDRBT_CRC32_SUPPORT BIT(5)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 3 - HDR-BT CRC-32 Support bit.

◆ I3C_CCC_GETCAPS3_IBI_MDR_PENDING_READ_NOTIFICATION

#define I3C_CCC_GETCAPS3_IBI_MDR_PENDING_READ_NOTIFICATION BIT(6)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 3 - IBI MDB Support for Pending Read Notification bit.

◆ I3C_CCC_GETCAPS3_MLANE_SUPPORT

#define I3C_CCC_GETCAPS3_MLANE_SUPPORT BIT(0)

#include <zephyr/drivers/i3c/ccc.h>

Get Optional Feature Capabilities (GETCAPS) Format 3 - Multi-Lane Data Transfer Support bit.

◆ I3C_CCC_GETDCR

#define I3C_CCC_GETDCR 0x8FU

#include <zephyr/drivers/i3c/ccc.h>

Get Device Characteristics Register (Direct)

◆ I3C_CCC_GETMRL

#define I3C_CCC_GETMRL 0x8CU

#include <zephyr/drivers/i3c/ccc.h>

Get Max Read Length (Direct)

◆ I3C_CCC_GETMWL

#define I3C_CCC_GETMWL 0x8BU

#include <zephyr/drivers/i3c/ccc.h>

Get Max Write Length (Direct)

◆ I3C_CCC_GETMXDS

#define I3C_CCC_GETMXDS 0x94U

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (Direct)

◆ I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE

#define I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE ( crhdly1 )

#include <zephyr/drivers/i3c/ccc.h>

Value:

        (((crhdly1) &                                           \
          I3C_CCC_GETMXDS_CRDHLY1_SET_BUS_ACT_STATE_MASK)       \
         >> I3C_CCC_GETMXDS_CRDHLY1_SET_BUS_ACT_STATE_SHIFT)

Get Max Data Speed (GETMXDS) - CRDHLY1 - Controller Handoff Activity State.

Obtain Controller Handoff Activity State value from GETMXDS value obtained via GETMXDS.

Parameters

crhdly1 GETMXDS value.

◆ I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE_MASK

#define I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE_MASK (0x03U << I3C_CCC_GETMXDS_CRDHLY1_SET_BUS_ACT_STATE_SHIFT)

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - CRDHLY1 - Controller Handoff Activity State bitmask.

◆ I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE_SHIFT

#define I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE_SHIFT 0

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - CRDHLY1 - Controller Handoff Activity State bit shift value.

◆ I3C_CCC_GETMXDS_CRDHLY1_SET_BUS_ACT_STATE

#define I3C_CCC_GETMXDS_CRDHLY1_SET_BUS_ACT_STATE BIT(2)

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - CRDHLY1 - Set Bus Activity State bit shift value.

◆ I3C_CCC_GETMXDS_MAX_SDR_FSCL_2MHZ

#define I3C_CCC_GETMXDS_MAX_SDR_FSCL_2MHZ 4

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - 2MHz Max Sustained Data Rate.

◆ I3C_CCC_GETMXDS_MAX_SDR_FSCL_4MHZ

#define I3C_CCC_GETMXDS_MAX_SDR_FSCL_4MHZ 3

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - 4MHz Max Sustained Data Rate.

◆ I3C_CCC_GETMXDS_MAX_SDR_FSCL_6MHZ

#define I3C_CCC_GETMXDS_MAX_SDR_FSCL_6MHZ 2

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - 6MHz Max Sustained Data Rate.

◆ I3C_CCC_GETMXDS_MAX_SDR_FSCL_8MHZ

#define I3C_CCC_GETMXDS_MAX_SDR_FSCL_8MHZ 1

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - 8MHz Max Sustained Data Rate.

◆ I3C_CCC_GETMXDS_MAX_SDR_FSCL_MAX

#define I3C_CCC_GETMXDS_MAX_SDR_FSCL_MAX 0

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - Default Max Sustained Data Rate.

◆ I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL

#define I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL ( maxrd )

#include <zephyr/drivers/i3c/ccc.h>

Value:

        (((maxrd) &                                             \
          I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL_MASK)              \
         >> I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL_SHIFT)

Get Max Data Speed (GETMXDS) - maxRd - Max Sustained Data Rate.

Obtain Max Sustained Data Rate value from GETMXDS maxRd value obtained via GETMXDS.

Parameters

maxrd GETMXDS maxRd value.

◆ I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL_MASK

#define I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL_MASK (0x07U << I3C_CCC_GET_MXDS_MAXRD_MAX_SDR_FSCL_SHIFT)

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - maxRd - Max Sustained Data Rate bitmask.

◆ I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL_SHIFT

#define I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL_SHIFT 0

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - maxRd - Max Sustained Data Rate bit shift value.

◆ I3C_CCC_GETMXDS_MAXRD_TSCO

#define I3C_CCC_GETMXDS_MAXRD_TSCO ( maxrd )

#include <zephyr/drivers/i3c/ccc.h>

Value:

(((maxrd) & I3C_CCC_GETMXDS_MAXRD_TSCO_MASK) \

>> I3C_CCC_GETMXDS_MAXRD_TSCO_SHIFT)

I3C_CCC_GETMXDS_MAXRD_TSCO_MASK

#define I3C_CCC_GETMXDS_MAXRD_TSCO_MASK

Get Max Data Speed (GETMXDS) - maxRd - Clock to Data Turnaround bitmask.

Definition: ccc.h:786

I3C_CCC_GETMXDS_MAXRD_TSCO_SHIFT

#define I3C_CCC_GETMXDS_MAXRD_TSCO_SHIFT

Get Max Data Speed (GETMXDS) - maxRd - Clock to Data Turnaround bit shift value.

Definition: ccc.h:783

Get Max Data Speed (GETMXDS) - maxRd - Clock to Data Turnaround.

Obtain Clock to Data Turnaround value from GETMXDS maxRd value obtained via GETMXDS.

Parameters

maxrd GETMXDS maxRd value.

◆ I3C_CCC_GETMXDS_MAXRD_TSCO_MASK

#define I3C_CCC_GETMXDS_MAXRD_TSCO_MASK (0x07U << I3C_CCC_GETMXDS_MAXRD_TSCO_SHIFT)

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - maxRd - Clock to Data Turnaround bitmask.

◆ I3C_CCC_GETMXDS_MAXRD_TSCO_SHIFT

#define I3C_CCC_GETMXDS_MAXRD_TSCO_SHIFT 3

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - maxRd - Clock to Data Turnaround bit shift value.

◆ I3C_CCC_GETMXDS_MAXRD_W2R_PERMITS_STOP_BETWEEN

#define I3C_CCC_GETMXDS_MAXRD_W2R_PERMITS_STOP_BETWEEN BIT(6)

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - maxRd - Write-to-Read Permits Stop Between.

◆ I3C_CCC_GETMXDS_MAXWR_DEFINING_BYTE_SUPPORT

#define I3C_CCC_GETMXDS_MAXWR_DEFINING_BYTE_SUPPORT BIT(3)

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - maxWr - Optional Defining Byte Support.

◆ I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL

#define I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL ( maxwr )

#include <zephyr/drivers/i3c/ccc.h>

Value:

        (((maxwr) &                                             \
          I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL_MASK)              \
         >> I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL_SHIFT)

Get Max Data Speed (GETMXDS) - maxWr - Max Sustained Data Rate.

Obtain Max Sustained Data Rate value from GETMXDS maxWr value obtained via GETMXDS.

Parameters

maxwr GETMXDS maxWr value.

◆ I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL_MASK

#define I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL_MASK (0x07U << I3C_CCC_GET_MXDS_MAXWR_MAX_SDR_FSCL_SHIFT)

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - Max Sustained Data Rate bitmask.

◆ I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL_SHIFT

#define I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL_SHIFT 0

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - Max Sustained Data Rate bit shift value.

◆ I3C_CCC_GETMXDS_TSCO_10NS

#define I3C_CCC_GETMXDS_TSCO_10NS 2

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 10ns.

◆ I3C_CCC_GETMXDS_TSCO_11NS

#define I3C_CCC_GETMXDS_TSCO_11NS 3

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 11ns.

◆ I3C_CCC_GETMXDS_TSCO_12NS

#define I3C_CCC_GETMXDS_TSCO_12NS 4

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 12ns.

◆ I3C_CCC_GETMXDS_TSCO_8NS

#define I3C_CCC_GETMXDS_TSCO_8NS 0

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 8ns.

◆ I3C_CCC_GETMXDS_TSCO_9NS

#define I3C_CCC_GETMXDS_TSCO_9NS 1

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 9ns.

◆ I3C_CCC_GETMXDS_TSCO_GT_12NS

#define I3C_CCC_GETMXDS_TSCO_GT_12NS 7

#include <zephyr/drivers/i3c/ccc.h>

Get Max Data Speed (GETMXDS) - Clock to Data Turnaround > 12ns.

◆ I3C_CCC_GETPID

#define I3C_CCC_GETPID 0x8DU

#include <zephyr/drivers/i3c/ccc.h>

Get Provisioned ID (Direct)

◆ I3C_CCC_GETSTATUS

#define I3C_CCC_GETSTATUS 0x90U

#include <zephyr/drivers/i3c/ccc.h>

Get Device Status (Direct)

◆ I3C_CCC_GETSTATUS_ACTIVITY_MODE

#define I3C_CCC_GETSTATUS_ACTIVITY_MODE ( status )

#include <zephyr/drivers/i3c/ccc.h>

Value:

(((status) & I3C_CCC_GETSTATUS_ACTIVITY_MODE_MASK) \

>> I3C_CCC_GETSTATUS_ACTIVITY_MODE_SHIFT)

I3C_CCC_GETSTATUS_ACTIVITY_MODE_MASK

#define I3C_CCC_GETSTATUS_ACTIVITY_MODE_MASK

GETSTATUS Format 1 - Activity Mode bitmask.

Definition: ccc.h:599

I3C_CCC_GETSTATUS_ACTIVITY_MODE_SHIFT

#define I3C_CCC_GETSTATUS_ACTIVITY_MODE_SHIFT

GETSTATUS Format 1 - Activity Mode bit shift value.

Definition: ccc.h:596

GETSTATUS Format 1 - Activity Mode.

Obtain Activity Mode from GETSTATUS Format 1 value obtained via GETSTATUS.

Parameters

status GETSTATUS Format 1 value

◆ I3C_CCC_GETSTATUS_ACTIVITY_MODE_MASK

#define I3C_CCC_GETSTATUS_ACTIVITY_MODE_MASK (0x03U << I3C_CCC_GETSTATUS_ACTIVITY_MODE_SHIFT)

#include <zephyr/drivers/i3c/ccc.h>

GETSTATUS Format 1 - Activity Mode bitmask.

◆ I3C_CCC_GETSTATUS_ACTIVITY_MODE_SHIFT

#define I3C_CCC_GETSTATUS_ACTIVITY_MODE_SHIFT 6

#include <zephyr/drivers/i3c/ccc.h>

GETSTATUS Format 1 - Activity Mode bit shift value.

◆ I3C_CCC_GETSTATUS_NUM_INT

#define I3C_CCC_GETSTATUS_NUM_INT ( status )

#include <zephyr/drivers/i3c/ccc.h>

Value:

(((status) & I3C_CCC_GETSTATUS_NUM_INT_MASK) \

>> I3C_CCC_GETSTATUS_NUM_INT_SHIFT)

I3C_CCC_GETSTATUS_NUM_INT_SHIFT

#define I3C_CCC_GETSTATUS_NUM_INT_SHIFT

GETSTATUS Format 1 - Number of Pending Interrupts bit shift value.

Definition: ccc.h:615

I3C_CCC_GETSTATUS_NUM_INT_MASK

#define I3C_CCC_GETSTATUS_NUM_INT_MASK

GETSTATUS Format 1 - Number of Pending Interrupts bitmask.

Definition: ccc.h:618

GETSTATUS Format 1 - Number of Pending Interrupts.

Obtain Number of Pending Interrupts from GETSTATUS Format 1 value obtained via GETSTATUS.

Parameters

status GETSTATUS Format 1 value

◆ I3C_CCC_GETSTATUS_NUM_INT_MASK

#define I3C_CCC_GETSTATUS_NUM_INT_MASK (0x0FU << I3C_CCC_GETSTATUS_NUM_INT_SHIFT)

#include <zephyr/drivers/i3c/ccc.h>

GETSTATUS Format 1 - Number of Pending Interrupts bitmask.

◆ I3C_CCC_GETSTATUS_NUM_INT_SHIFT

#define I3C_CCC_GETSTATUS_NUM_INT_SHIFT 0

#include <zephyr/drivers/i3c/ccc.h>

GETSTATUS Format 1 - Number of Pending Interrupts bit shift value.

◆ I3C_CCC_GETSTATUS_PRECR_DEEP_SLEEP_DETECTED

#define I3C_CCC_GETSTATUS_PRECR_DEEP_SLEEP_DETECTED BIT(0)

#include <zephyr/drivers/i3c/ccc.h>

GETSTATUS Format 2 - PERCR - Deep Sleep Detected bit.

◆ I3C_CCC_GETSTATUS_PRECR_HANDOFF_DELAY_NACK

#define I3C_CCC_GETSTATUS_PRECR_HANDOFF_DELAY_NACK BIT(1)

#include <zephyr/drivers/i3c/ccc.h>

GETSTATUS Format 2 - PERCR - Handoff Delay NACK.

◆ I3C_CCC_GETSTATUS_PROTOCOL_ERR

#define I3C_CCC_GETSTATUS_PROTOCOL_ERR BIT(5)

#include <zephyr/drivers/i3c/ccc.h>

GETSTATUS Format 1 - Protocol Error bit.

◆ I3C_CCC_GETXTIME

#define I3C_CCC_GETXTIME 0x99U

#include <zephyr/drivers/i3c/ccc.h>

Get Exchange Timing Information (Direct)

◆ I3C_CCC_MLANE

#define I3C_CCC_MLANE ( broadcast ) ((broadcast) ? 0x2DU : 0x9DU)

#include <zephyr/drivers/i3c/ccc.h>

Multi-Lane Data Transfer Control (Broadcast)

◆ I3C_CCC_RSTACT

#define I3C_CCC_RSTACT ( broadcast ) ((broadcast) ? 0x2AU : 0x9AU)

#include <zephyr/drivers/i3c/ccc.h>

Target Reset Action.

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_RSTDAA

#define I3C_CCC_RSTDAA 0x06U

#include <zephyr/drivers/i3c/ccc.h>

Reset Dynamic Address Assignment (Broadcast)

◆ I3C_CCC_RSTGRPA

#define I3C_CCC_RSTGRPA ( broadcast ) ((broadcast) ? 0x2CU : 0x9CU)

#include <zephyr/drivers/i3c/ccc.h>

Reset Group Address.

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_SETAASA

#define I3C_CCC_SETAASA 0x29U

#include <zephyr/drivers/i3c/ccc.h>

Set All Addresses to Static Addresses (Broadcast)

◆ I3C_CCC_SETBRGTGT

#define I3C_CCC_SETBRGTGT 0x93U

#include <zephyr/drivers/i3c/ccc.h>

Set Bridge Targets (Direct)

◆ I3C_CCC_SETBUSCON

#define I3C_CCC_SETBUSCON 0x0CU

#include <zephyr/drivers/i3c/ccc.h>

Set Bus Context (Broadcast)

◆ I3C_CCC_SETDASA

#define I3C_CCC_SETDASA 0x87U

#include <zephyr/drivers/i3c/ccc.h>

Set Dynamic Address from Static Address (Direct)

◆ I3C_CCC_SETGRPA

#define I3C_CCC_SETGRPA 0x9BU

#include <zephyr/drivers/i3c/ccc.h>

Set Group Address (Direct)

◆ I3C_CCC_SETMRL

#define I3C_CCC_SETMRL ( broadcast ) ((broadcast) ? 0x0AU : 0x8AU)

#include <zephyr/drivers/i3c/ccc.h>

Set Max Read Length (Broadcast or Direct)

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_SETMWL

#define I3C_CCC_SETMWL ( broadcast ) ((broadcast) ? 0x09U : 0x89U)

#include <zephyr/drivers/i3c/ccc.h>

Set Max Write Length (Broadcast or Direct)

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_SETNEWDA

#define I3C_CCC_SETNEWDA 0x88U

#include <zephyr/drivers/i3c/ccc.h>

Set New Dynamic Address (Direct)

◆ I3C_CCC_SETROUTE

#define I3C_CCC_SETROUTE 0x96U

#include <zephyr/drivers/i3c/ccc.h>

Set Route (Direct)

◆ I3C_CCC_SETXTIME

#define I3C_CCC_SETXTIME ( broadcast ) ((broadcast) ? 0x28U : 0x98U)

#include <zephyr/drivers/i3c/ccc.h>

Exchange Timing Information (Broadcast or Direct)

Parameters

broadcast True if broadcast, false if direct.

◆ I3C_CCC_VENDOR

#define I3C_CCC_VENDOR	(	broadcast,
		id
	)	((id) + ((broadcast) ? 0x61U : 0xE0U))

#include <zephyr/drivers/i3c/ccc.h>

Vendor/Standard Extension.

Parameters

broadcast	True if broadcast, false if direct.
id	Extension ID.

Enumeration Type Documentation

◆ i3c_ccc_getstatus_defbyte

enum i3c_ccc_getstatus_defbyte

#include <zephyr/drivers/i3c/ccc.h>

Defining byte values for GETSTATUS Format 2.

Enumerator
GETSTATUS_FORMAT_2_TGTSTAT	Target status.
GETSTATUS_FORMAT_2_PRECR	PRECR - Alternate status format describing Controller-capable device.
GETSTATUS_FORMAT_2_INVALID	Invalid defining byte.

◆ i3c_ccc_getstatus_fmt

enum i3c_ccc_getstatus_fmt

#include <zephyr/drivers/i3c/ccc.h>

Indicate which format of GETSTATUS to use.

Enumerator
GETSTATUS_FORMAT_1	GETSTATUS Format 1.
GETSTATUS_FORMAT_2	GETSTATUS Format 2.

◆ i3c_ccc_rstact_defining_byte

enum i3c_ccc_rstact_defining_byte

#include <zephyr/drivers/i3c/ccc.h>

Enum for I3C Reset Action (RSTACT) Defining Byte Values.

Enumerator
I3C_CCC_RSTACT_NO_RESET	No Reset on Target Reset Pattern.
I3C_CCC_RSTACT_PERIPHERAL_ONLY	Reset the I3C Peripheral Only.
I3C_CCC_RSTACT_RESET_WHOLE_TARGET	Reset the Whole Target.
I3C_CCC_RSTACT_DEBUG_NETWORK_ADAPTER	Debug Network Adapter Reset.
I3C_CCC_RSTACT_VIRTUAL_TARGET_DETECT	Virtual Target Detect.

Function Documentation

◆ i3c_ccc_do_events_all_set()

int i3c_ccc_do_events_all_set	(	const struct device *	controller,
		bool	enable,
		struct i3c_ccc_events *	events
	)

#include <zephyr/drivers/i3c/ccc.h>

Broadcast ENEC/DISEC to enable/disable target events.

Helper function to broadcast Target Events Command to enable or disable target events (ENEC/DISEC).

Parameters

[in]	controller	Pointer to the controller device driver instance.
[in]	enable	ENEC if true, DISEC if false.
[in]	events	Pointer to the event struct.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_events_set()

int i3c_ccc_do_events_set	(	struct i3c_device_desc *	target,
		bool	enable,
		struct i3c_ccc_events *	events
	)

#include <zephyr/drivers/i3c/ccc.h>

Direct CCC ENEC/DISEC to enable/disable target events.

Helper function to send Target Events Command to enable or disable target events (ENEC/DISEC) on a single target.

Parameters

[in]	target	Pointer to the target device descriptor.
[in]	enable	ENEC if true, DISEC if false.
[in]	events	Pointer to the event struct.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_getbcr()

int i3c_ccc_do_getbcr	(	struct i3c_device_desc *	target,
		struct i3c_ccc_getbcr *	bcr
	)

#include <zephyr/drivers/i3c/ccc.h>

Get BCR from a target.

Helper function to get BCR (Bus Characteristic Register) from target device.

Parameters

[in]	target	Pointer to the target device descriptor.
[out]	bcr	Pointer to the BCR payload structure.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_getdcr()

int i3c_ccc_do_getdcr	(	struct i3c_device_desc *	target,
		struct i3c_ccc_getdcr *	dcr
	)

#include <zephyr/drivers/i3c/ccc.h>

Get DCR from a target.

Helper function to get DCR (Device Characteristic Register) from target device.

Parameters

[in]	target	Pointer to the target device descriptor.
[out]	dcr	Pointer to the DCR payload structure.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_getmrl()

int i3c_ccc_do_getmrl	(	const struct i3c_device_desc *	target,
		struct i3c_ccc_mrl *	mrl
	)

#include <zephyr/drivers/i3c/ccc.h>

Single target GETMRL to Get Maximum Read Length.

Helper function to do GETMRL (Get Maximum Read Length) of one target.

Note this uses the BCR of the target to determine whether to send the optional IBI payload size.

Parameters

[in]	target	Pointer to the target device descriptor.
[out]	mrl	Pointer to GETMRL payload.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_getmwl()

int i3c_ccc_do_getmwl	(	const struct i3c_device_desc *	target,
		struct i3c_ccc_mwl *	mwl
	)

#include <zephyr/drivers/i3c/ccc.h>

Single target GETMWL to Get Maximum Write Length.

Helper function to do GETMWL (Get Maximum Write Length) of one target.

Parameters

[in]	target	Pointer to the target device descriptor.
[out]	mwl	Pointer to GETMWL payload.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_getpid()

int i3c_ccc_do_getpid	(	struct i3c_device_desc *	target,
		struct i3c_ccc_getpid *	pid
	)

#include <zephyr/drivers/i3c/ccc.h>

Get PID from a target.

Helper function to get PID (Provisioned ID) from target device.

Parameters

[in]	target	Pointer to the target device descriptor.
[out]	pid	Pointer to the PID payload structure.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_getstatus()

int i3c_ccc_do_getstatus	(	const struct i3c_device_desc *	target,
		union i3c_ccc_getstatus *	status,
		enum i3c_ccc_getstatus_fmt	fmt,
		enum i3c_ccc_getstatus_defbyte	defbyte
	)

#include <zephyr/drivers/i3c/ccc.h>

Single target GETSTATUS to Get Target Status.

Helper function to do GETSTATUS (Get Target Status) of one target.

Note this uses the BCR of the target to determine whether to send the optional IBI payload size.

Parameters

[in]	target	Pointer to the target device descriptor.
[out]	status	Pointer to GETSTATUS payload.
[in]	fmt	Which GETSTATUS to use.
[in]	defbyte	Defining Byte if using format 2.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_getstatus_fmt1()

static int i3c_ccc_do_getstatus_fmt1	(	const struct i3c_device_desc *	target,
		union i3c_ccc_getstatus *	status
	)

inlinestatic

#include <zephyr/drivers/i3c/ccc.h>

Single target GETSTATUS to Get Target Status (Format 1).

Helper function to do GETSTATUS (Get Target Status, format 1) of one target.

Parameters

[in]	target	Pointer to the target device descriptor.
[out]	status	Pointer to GETSTATUS payload.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_getstatus_fmt2()

static int i3c_ccc_do_getstatus_fmt2	(	const struct i3c_device_desc *	target,
		union i3c_ccc_getstatus *	status,
		enum i3c_ccc_getstatus_defbyte	defbyte
	)

inlinestatic

#include <zephyr/drivers/i3c/ccc.h>

Single target GETSTATUS to Get Target Status (Format 2).

Helper function to do GETSTATUS (Get Target Status, format 2) of one target.

Parameters

[in]	target	Pointer to the target device descriptor.
[out]	status	Pointer to GETSTATUS payload.
[in]	defbyte	Defining Byte for GETSTATUS format 2.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_rstact_all()

int i3c_ccc_do_rstact_all	(	const struct device *	controller,
		enum i3c_ccc_rstact_defining_byte	action
	)

#include <zephyr/drivers/i3c/ccc.h>

Broadcast RSTACT to reset I3C Peripheral.

Helper function to broadcast Target Reset Action (RSTACT) to all connected targets to Reset the I3C Peripheral Only (0x01).

Parameters

[in]	controller	Pointer to the controller device driver instance.
[in]	action	What reset action to perform.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_rstdaa_all()

int i3c_ccc_do_rstdaa_all ( const struct device * controller )

#include <zephyr/drivers/i3c/ccc.h>

Broadcast RSTDAA to reset dynamic addresses for all targets.

Helper function to reset dynamic addresses of all connected targets.

Parameters

[in] controller Pointer to the controller device driver instance.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_setdasa()

int i3c_ccc_do_setdasa ( const struct i3c_device_desc * target )

#include <zephyr/drivers/i3c/ccc.h>

Set Dynamic Address from Static Address for a target.

Helper function to do SETDASA (Set Dynamic Address from Static Address) for a particular target.

Note this does not update target with the new dynamic address.

Parameters

[in] target Pointer to the target device descriptor where the device is configured with a static address.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_setmrl()

int i3c_ccc_do_setmrl	(	const struct i3c_device_desc *	target,
		const struct i3c_ccc_mrl *	mrl
	)

#include <zephyr/drivers/i3c/ccc.h>

Single target SETMRL to Set Maximum Read Length.

Helper function to do SETMRL (Set Maximum Read Length) to one target.

Note this uses the BCR of the target to determine whether to send the optional IBI payload size.

Parameters

[in]	target	Pointer to the target device descriptor.
[in]	mrl	Pointer to SETMRL payload.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_setmrl_all()

int i3c_ccc_do_setmrl_all	(	const struct device *	controller,
		const struct i3c_ccc_mrl *	mrl,
		bool	has_ibi_size
	)

#include <zephyr/drivers/i3c/ccc.h>

Broadcast SETMRL to Set Maximum Read Length.

Helper function to do SETMRL (Set Maximum Read Length) to all connected targets.

Parameters

[in]	controller	Pointer to the controller device driver instance.
[in]	mrl	Pointer to SETMRL payload.
[in]	has_ibi_size	True if also sending the optional IBI payload size. False if not sending.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_setmwl()

int i3c_ccc_do_setmwl	(	const struct i3c_device_desc *	target,
		const struct i3c_ccc_mwl *	mwl
	)

#include <zephyr/drivers/i3c/ccc.h>

Single target SETMWL to Set Maximum Write Length.

Helper function to do SETMWL (Set Maximum Write Length) to one target.

Parameters

[in]	target	Pointer to the target device descriptor.
[in]	mwl	Pointer to SETMWL payload.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_setmwl_all()

int i3c_ccc_do_setmwl_all	(	const struct device *	controller,
		const struct i3c_ccc_mwl *	mwl
	)

#include <zephyr/drivers/i3c/ccc.h>

Broadcast SETMWL to Set Maximum Write Length.

Helper function to do SETMWL (Set Maximum Write Length) to all connected targets.

Parameters

[in]	controller	Pointer to the controller device driver instance.
[in]	mwl	Pointer to SETMWL payload.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_do_setnewda()

int i3c_ccc_do_setnewda	(	const struct i3c_device_desc *	target,
		struct i3c_ccc_address	new_da
	)

#include <zephyr/drivers/i3c/ccc.h>

Set New Dynamic Address for a target.

Helper function to do SETNEWDA(Set New Dynamic Address) for a particular target.

Note this does not update target with the new dynamic address.

Parameters

[in]	target	Pointer to the target device descriptor where the device is configured with a static address.
[in]	new_da	Pointer to the new_da struct.

Returns

See also: i3c_do_ccc

◆ i3c_ccc_is_payload_broadcast()

static bool i3c_ccc_is_payload_broadcast ( const struct i3c_ccc_payload * payload )

inlinestatic

#include <zephyr/drivers/i3c/ccc.h>

Test if I3C CCC payload is for broadcast.

This tests if the CCC payload is for broadcast.

Parameters

[in] payload Pointer to the CCC payload.

Return values

true	if payload target is broadcast
false	if payload target is direct

Data Structures

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ I3C_CCC_BROADCAST_MAX_ID

◆ I3C_CCC_D2DXFER

◆ I3C_CCC_DEFGRPA

◆ I3C_CCC_DEFTGTS

◆ I3C_CCC_DISEC

◆ I3C_CCC_DISEC_EVT_ALL

◆ I3C_CCC_DISEC_EVT_DISCR

◆ I3C_CCC_DISEC_EVT_DISHJ

◆ I3C_CCC_DISEC_EVT_DISINTR

◆ I3C_CCC_ENDXFER

◆ I3C_CCC_ENEC

◆ I3C_CCC_ENEC_EVT_ALL

◆ I3C_CCC_ENEC_EVT_ENCR

◆ I3C_CCC_ENEC_EVT_ENHJ

◆ I3C_CCC_ENEC_EVT_ENINTR

◆ I3C_CCC_ENTAS

◆ I3C_CCC_ENTAS0

◆ I3C_CCC_ENTAS1

◆ I3C_CCC_ENTAS2

◆ I3C_CCC_ENTAS3

◆ I3C_CCC_ENTDAA

◆ I3C_CCC_ENTHDR

◆ I3C_CCC_ENTHDR0

◆ I3C_CCC_ENTHDR1

◆ I3C_CCC_ENTHDR2

◆ I3C_CCC_ENTHDR3

◆ I3C_CCC_ENTHDR4

◆ I3C_CCC_ENTHDR5

◆ I3C_CCC_ENTHDR6

◆ I3C_CCC_ENTHDR7

◆ I3C_CCC_ENTTM

◆ I3C_CCC_EVT_ALL

◆ I3C_CCC_EVT_CR

◆ I3C_CCC_EVT_HJ

◆ I3C_CCC_EVT_INTR

◆ I3C_CCC_GETACCCR

◆ I3C_CCC_GETBCR

◆ I3C_CCC_GETCAPS

◆ I3C_CCC_GETCAPS1_HDR_BT

◆ I3C_CCC_GETCAPS1_HDR_DDR

◆ I3C_CCC_GETCAPS1_HDR_MODE

◆ I3C_CCC_GETCAPS1_HDR_MODE0

◆ I3C_CCC_GETCAPS1_HDR_MODE1

◆ I3C_CCC_GETCAPS1_HDR_MODE2

◆ I3C_CCC_GETCAPS1_HDR_MODE3

◆ I3C_CCC_GETCAPS1_HDR_MODE4

◆ I3C_CCC_GETCAPS1_HDR_MODE5

◆ I3C_CCC_GETCAPS1_HDR_MODE6

◆ I3C_CCC_GETCAPS1_HDR_MODE7

◆ I3C_CCC_GETCAPS2_GRPADDR_CAP

◆ I3C_CCC_GETCAPS2_GRPADDR_CAP_MASK

◆ I3C_CCC_GETCAPS2_GRPADDR_CAP_SHIFT

◆ I3C_CCC_GETCAPS2_HDRDDR_ABORT_CRC

◆ I3C_CCC_GETCAPS2_HDRDDR_WRITE_ABORT

◆ I3C_CCC_GETCAPS2_SPEC_VER

◆ I3C_CCC_GETCAPS2_SPEC_VER_MASK

◆ I3C_CCC_GETCAPS2_SPEC_VER_SHIFT

◆ I3C_CCC_GETCAPS3_D2DXFER_IBI_CAPABLE

◆ I3C_CCC_GETCAPS3_D2DXFER_SUPPORT

◆ I3C_CCC_GETCAPS3_GETCAPS_DEFINING_BYTE_SUPPORT

◆ I3C_CCC_GETCAPS3_GETSTATUS_DEFINING_BYTE_SUPPORT

◆ I3C_CCC_GETCAPS3_HDRBT_CRC32_SUPPORT

◆ I3C_CCC_GETCAPS3_IBI_MDR_PENDING_READ_NOTIFICATION

◆ I3C_CCC_GETCAPS3_MLANE_SUPPORT

◆ I3C_CCC_GETDCR

◆ I3C_CCC_GETMRL

◆ I3C_CCC_GETMWL

◆ I3C_CCC_GETMXDS

◆ I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE

◆ I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE_MASK

◆ I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE_SHIFT

◆ I3C_CCC_GETMXDS_CRDHLY1_SET_BUS_ACT_STATE

◆ I3C_CCC_GETMXDS_MAX_SDR_FSCL_2MHZ

◆ I3C_CCC_GETMXDS_MAX_SDR_FSCL_4MHZ