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Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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Root clock sources for i.MX952 SoC. More...
Macros | |
| #define | IMX952_CLK_EXT 0 |
| External clock source. | |
| #define | IMX952_CLK_32K 1 |
| 32kHz clock source | |
| #define | IMX952_CLK_24M 2 |
| 24MHz clock source | |
| #define | IMX952_CLK_FRO 3 |
| Free-running oscillator clock. | |
| #define | IMX952_CLK_SYSPLL1_VCO 4 |
| System PLL1 VCO. | |
| #define | IMX952_CLK_SYSPLL1_PFD0_UNGATED 5 |
| System PLL1 PFD0 ungated. | |
| #define | IMX952_CLK_SYSPLL1_PFD0 6 |
| System PLL1 PFD0. | |
| #define | IMX952_CLK_SYSPLL1_PFD0_DIV2 7 |
| System PLL1 PFD0 divided by 2. | |
| #define | IMX952_CLK_SYSPLL1_PFD1_UNGATED 8 |
| System PLL1 PFD1 ungated. | |
| #define | IMX952_CLK_SYSPLL1_PFD1 9 |
| System PLL1 PFD1. | |
| #define | IMX952_CLK_SYSPLL1_PFD1_DIV2 10 |
| System PLL1 PFD1 divided by 2. | |
| #define | IMX952_CLK_SYSPLL1_PFD2_UNGATED 11 |
| System PLL1 PFD2 ungated. | |
| #define | IMX952_CLK_SYSPLL1_PFD2 12 |
| System PLL1 PFD2. | |
| #define | IMX952_CLK_SYSPLL1_PFD2_DIV2 13 |
| System PLL1 PFD2 divided by 2. | |
| #define | IMX952_CLK_AUDIOPLL1_VCO 14 |
| Audio PLL1 VCO. | |
| #define | IMX952_CLK_AUDIOPLL1 15 |
| Audio PLL1 output. | |
| #define | IMX952_CLK_AUDIOPLL2_VCO 16 |
| Audio PLL2 VCO. | |
| #define | IMX952_CLK_AUDIOPLL2 17 |
| Audio PLL2 output. | |
| #define | IMX952_CLK_VIDEOPLL1_VCO 18 |
| Video PLL1 VCO. | |
| #define | IMX952_CLK_VIDEOPLL1 19 |
| Video PLL1 output. | |
| #define | IMX952_CLK_SRC_RESERVED20 20 |
| Reserved src clock 20. | |
| #define | IMX952_CLK_SYSPLL1_PFD3_UNGATED 21 |
| System PLL1 PFD3 ungated. | |
| #define | IMX952_CLK_SYSPLL1_PFD3 22 |
| System PLL1 PFD3. | |
| #define | IMX952_CLK_SYSPLL1_PFD3_DIV2 23 |
| System PLL1 PFD3 divided by 2. | |
| #define | IMX952_CLK_ARMPLL_VCO 24 |
| ARM PLL VCO. | |
| #define | IMX952_CLK_ARMPLL_PFD0_UNGATED 25 |
| ARM PLL PFD0 ungated. | |
| #define | IMX952_CLK_ARMPLL_PFD0 26 |
| ARM PLL PFD0. | |
| #define | IMX952_CLK_ARMPLL_PFD1_UNGATED 27 |
| ARM PLL PFD1 ungated. | |
| #define | IMX952_CLK_ARMPLL_PFD1 28 |
| ARM PLL PFD1. | |
| #define | IMX952_CLK_ARMPLL_PFD2_UNGATED 29 |
| ARM PLL PFD2 ungated. | |
| #define | IMX952_CLK_ARMPLL_PFD2 30 |
| ARM PLL PFD2. | |
| #define | IMX952_CLK_ARMPLL_PFD3_UNGATED 31 |
| ARM PLL PFD3 ungated. | |
| #define | IMX952_CLK_ARMPLL_PFD3 32 |
| ARM PLL PFD3. | |
| #define | IMX952_CLK_DRAMPLL_VCO 33 |
| DRAM PLL VCO. | |
| #define | IMX952_CLK_DRAMPLL 34 |
| DRAM PLL output. | |
| #define | IMX952_CLK_HSIOPLL_VCO 35 |
| HSIO PLL VCO. | |
| #define | IMX952_CLK_HSIOPLL 36 |
| HSIO PLL output. | |
| #define | IMX952_CLK_LDBPLL_VCO 37 |
| LDB PLL VCO. | |
| #define | IMX952_CLK_LDBPLL 38 |
| LDB PLL output. | |
| #define | IMX952_CLK_EXT1 39 |
| External clock source 1. | |
| #define | IMX952_CLK_EXT2 40 |
| External clock source 2. | |
Root clock sources for i.MX952 SoC.
| #define IMX952_CLK_24M 2 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
24MHz clock source
| #define IMX952_CLK_32K 1 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
32kHz clock source
| #define IMX952_CLK_ARMPLL_PFD0 26 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
ARM PLL PFD0.
| #define IMX952_CLK_ARMPLL_PFD0_UNGATED 25 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
ARM PLL PFD0 ungated.
| #define IMX952_CLK_ARMPLL_PFD1 28 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
ARM PLL PFD1.
| #define IMX952_CLK_ARMPLL_PFD1_UNGATED 27 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
ARM PLL PFD1 ungated.
| #define IMX952_CLK_ARMPLL_PFD2 30 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
ARM PLL PFD2.
| #define IMX952_CLK_ARMPLL_PFD2_UNGATED 29 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
ARM PLL PFD2 ungated.
| #define IMX952_CLK_ARMPLL_PFD3 32 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
ARM PLL PFD3.
| #define IMX952_CLK_ARMPLL_PFD3_UNGATED 31 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
ARM PLL PFD3 ungated.
| #define IMX952_CLK_ARMPLL_VCO 24 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
ARM PLL VCO.
| #define IMX952_CLK_AUDIOPLL1 15 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
Audio PLL1 output.
| #define IMX952_CLK_AUDIOPLL1_VCO 14 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
Audio PLL1 VCO.
| #define IMX952_CLK_AUDIOPLL2 17 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
Audio PLL2 output.
| #define IMX952_CLK_AUDIOPLL2_VCO 16 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
Audio PLL2 VCO.
| #define IMX952_CLK_DRAMPLL 34 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
DRAM PLL output.
| #define IMX952_CLK_DRAMPLL_VCO 33 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
DRAM PLL VCO.
| #define IMX952_CLK_EXT 0 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
External clock source.
| #define IMX952_CLK_EXT1 39 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
External clock source 1.
| #define IMX952_CLK_EXT2 40 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
External clock source 2.
| #define IMX952_CLK_FRO 3 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
Free-running oscillator clock.
| #define IMX952_CLK_HSIOPLL 36 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
HSIO PLL output.
| #define IMX952_CLK_HSIOPLL_VCO 35 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
HSIO PLL VCO.
| #define IMX952_CLK_LDBPLL 38 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
LDB PLL output.
| #define IMX952_CLK_LDBPLL_VCO 37 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
LDB PLL VCO.
| #define IMX952_CLK_SRC_RESERVED20 20 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
Reserved src clock 20.
| #define IMX952_CLK_SYSPLL1_PFD0 6 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD0.
| #define IMX952_CLK_SYSPLL1_PFD0_DIV2 7 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD0 divided by 2.
| #define IMX952_CLK_SYSPLL1_PFD0_UNGATED 5 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD0 ungated.
| #define IMX952_CLK_SYSPLL1_PFD1 9 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD1.
| #define IMX952_CLK_SYSPLL1_PFD1_DIV2 10 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD1 divided by 2.
| #define IMX952_CLK_SYSPLL1_PFD1_UNGATED 8 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD1 ungated.
| #define IMX952_CLK_SYSPLL1_PFD2 12 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD2.
| #define IMX952_CLK_SYSPLL1_PFD2_DIV2 13 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD2 divided by 2.
| #define IMX952_CLK_SYSPLL1_PFD2_UNGATED 11 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD2 ungated.
| #define IMX952_CLK_SYSPLL1_PFD3 22 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD3.
| #define IMX952_CLK_SYSPLL1_PFD3_DIV2 23 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD3 divided by 2.
| #define IMX952_CLK_SYSPLL1_PFD3_UNGATED 21 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 PFD3 ungated.
| #define IMX952_CLK_SYSPLL1_VCO 4 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
System PLL1 VCO.
| #define IMX952_CLK_VIDEOPLL1 19 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
Video PLL1 output.
| #define IMX952_CLK_VIDEOPLL1_VCO 18 |
#include <zephyr/dt-bindings/clock/imx952_clock.h>
Video PLL1 VCO.