Files
file	max2221x.h
	Public API for MAX2221X MFD driver.

Macros
#define	MAX2221X_NUM_CHANNELS 4
	Number of MAX2221X channels.

Functions
int	max2221x_reg_read (const struct device dev, uint8_t addr, uint16_t value)
	Read register from max2221x.
int	max2221x_reg_write (const struct device *dev, uint8_t addr, uint16_t value)
	Write register to max2221x.
int	max2221x_reg_update (const struct device *dev, uint8_t addr, uint16_t mask, uint16_t val)
	Update register in max2221x.

MAX2221X SPI Transaction Fields
#define	MAX2221X_SPI_TRANS_ADDR GENMASK(6, 0)
	SPI transaction register address field mask.
#define	MAX2221X_SPI_TRANS_DIR BIT(7)
	SPI transaction read/write direction bit.

MAX2221X Register Addresses
#define	MAX2221X_REG_GLOBAL_CTRL 0x00
	Global control register address.
#define	MAX2221X_REG_GLOBAL_CFG 0x01
	Global configuration register address.
#define	MAX2221X_REG_STATUS 0x02
	Status register address.
#define	MAX2221X_REG_DC_H2L 0x03
	Demagnetization duty cycle high-to-low register address.
#define	MAX2221X_REG_VM_MONITOR 0x05
	Voltage monitor register address.
#define	MAX2221X_REG_VM_THRESHOLD 0x06
	Voltage monitor threshold register address.
#define	MAX2221X_REG_CFG_DC_L2H(x)
	Channel duty cycle low-to-high configuration register address.
#define	MAX2221X_REG_CFG_DC_H(x)
	Channel duty cycle high configuration register address.
#define	MAX2221X_REG_CFG_DC_L(x)
	Channel duty cycle low configuration register address.
#define	MAX2221X_REG_CFG_TIME_L2H(x)
	Channel time low-to-high configuration register address.
#define	MAX2221X_REG_CFG_CTRL0(x)
	Channel control 0 configuration register address.
#define	MAX2221X_REG_CFG_CTRL1(x)
	Channel control 1 configuration register address.
#define	MAX2221X_REG_PWM_DUTY(x)
	Channel PWM duty cycle register address.
#define	MAX2221X_REG_FAULT0 0x65
	Fault 0 register address.
#define	MAX2221X_REG_FAULT1 0x66
	Fault 1 register address.

MAX2221X Global Configuration Masks
#define	MAX2221X_F_PWM_M_MASK GENMASK(7, 4)
	Master chopping frequency mask in global configuration register.
#define	MAX2221X_CNTL0_MASK BIT(0)
	Channel 0 control enable mask.
#define	MAX2221X_CNTL1_MASK BIT(1)
	Channel 1 control enable mask.
#define	MAX2221X_CNTL2_MASK BIT(2)
	Channel 2 control enable mask.
#define	MAX2221X_CNTL3_MASK BIT(3)
	Channel 3 control enable mask.

MAX2221X Global Control Masks
#define	MAX2221X_ACTIVE_MASK BIT(15)
	Active mode enable mask.
#define	MAX2221X_M_UVM_MASK BIT(8)
	Under-voltage monitor mask.
#define	MAX2221X_VDRNVDRDUTY_MASK BIT(4)
	VDR/VDRDUTY mode selection mask.

MAX2221X Status Register Masks
#define	MAX2221X_STATUS_STT3_MASK BIT(14)
	Status bit 3 mask.
#define	MAX2221X_STATUS_STT2_MASK BIT(13)
	Status bit 2 mask.
#define	MAX2221X_STATUS_STT1_MASK BIT(12)
	Status bit 1 mask.
#define	MAX2221X_STATUS_STT0_MASK BIT(11)
	Status bit 0 mask.
#define	MAX2221X_STATUS_MIN_T_ON_MASK BIT(10)
	Minimum on-time fault status mask.
#define	MAX2221X_STATUS_RES_MASK BIT(9)
	Resistance measurement status mask.
#define	MAX2221X_STATUS_IND_MASK BIT(8)
	Inductance measurement status mask.
#define	MAX2221X_STATUS_OVT_MASK BIT(7)
	Over-temperature fault status mask.
#define	MAX2221X_STATUS_OCP_MASK BIT(6)
	Over-current protection fault status mask.
#define	MAX2221X_STATUS_OLF_MASK BIT(5)
	Open-load fault status mask.
#define	MAX2221X_STATUS_HHF_MASK BIT(4)
	Hit current not reached fault status mask.
#define	MAX2221X_STATUS_DPM_MASK BIT(3)
	DPM error fault status mask.
#define	MAX2221X_STATUS_COMER_MASK BIT(2)
	Communication error fault status mask.
#define	MAX2221X_STATUS_UVM_MASK BIT(1)
	Under-voltage monitor fault status mask.

MAX2221X VM Monitor Masks
#define	MAX2221X_VM_MONITOR_MASK GENMASK(12, 0)
	Voltage monitor measurement value mask.

MAX2221X VM Threshold Masks
#define	MAX2221X_VM_THLD_UP_MASK GENMASK(7, 4)
	Upper voltage monitor threshold mask.
#define	MAX2221X_VM_THLD_DOWN_MASK GENMASK(3, 0)
	Lower voltage monitor threshold mask.

MAX2221X Channel Control 0 Masks
#define	MAX2221X_CTRL_MODE_MASK GENMASK(15, 14)
	Control mode selection mask.
#define	MAX2221X_RDWE_MASK BIT(10)
	Ramp-down enable mask.
#define	MAX2221X_RMDE_MASK BIT(9)
	Ramp-middle enable mask.
#define	MAX2221X_RUPE_MASK BIT(8)
	Ramp-up enable mask.
#define	MAX2221X_RAMP_MASK GENMASK(7, 0)
	Ramp slew rate value mask.

MAX2221X Channel Control 1 Masks
#define	MAX2221X_F_PWM_MASK GENMASK(9, 8)
	Channel chopping frequency divisor mask.
#define	MAX2221X_SLEW_RATE_MASK GENMASK(5, 4)
	Output slew rate selection mask.
#define	MAX2221X_GAIN_MASK GENMASK(3, 2)
	Digital gain selection mask.
#define	MAX2221X_SNSF_MASK GENMASK(1, 0)
	Sense scaling factor selection mask.

MAX2221X Fault 0 Register Masks
#define	MAX2221X_FAULT_DPM3_MASK BIT(15)
	DPM fault on channel 3 mask.
#define	MAX2221X_FAULT_DPM2_MASK BIT(14)
	DPM fault on channel 2 mask.
#define	MAX2221X_FAULT_DPM1_MASK BIT(13)
	DPM fault on channel 1 mask.
#define	MAX2221X_FAULT_DPM0_MASK BIT(12)
	DPM fault on channel 0 mask.
#define	MAX2221X_FAULT_OLF3_MASK BIT(11)
	Open-load fault on channel 3 mask.
#define	MAX2221X_FAULT_OLF2_MASK BIT(10)
	Open-load fault on channel 2 mask.
#define	MAX2221X_FAULT_OLF1_MASK BIT(9)
	Open-load fault on channel 1 mask.
#define	MAX2221X_FAULT_OLF0_MASK BIT(8)
	Open-load fault on channel 0 mask.
#define	MAX2221X_FAULT_HHF3_MASK BIT(7)
	Hit current not reached fault on channel 3 mask.
#define	MAX2221X_FAULT_HHF2_MASK BIT(6)
	Hit current not reached fault on channel 2 mask.
#define	MAX2221X_FAULT_HHF1_MASK BIT(5)
	Hit current not reached fault on channel 1 mask.
#define	MAX2221X_FAULT_HHF0_MASK BIT(4)
	Hit current not reached fault on channel 0 mask.
#define	MAX2221X_FAULT_OCP3_MASK BIT(3)
	Over-current protection fault on channel 3 mask.
#define	MAX2221X_FAULT_OCP2_MASK BIT(2)
	Over-current protection fault on channel 2 mask.
#define	MAX2221X_FAULT_OCP1_MASK BIT(1)
	Over-current protection fault on channel 1 mask.
#define	MAX2221X_FAULT_OCP0_MASK BIT(0)
	Over-current protection fault on channel 0 mask.

MAX2221X Fault 1 Register Masks
#define	MAX2221X_FAULT_RES3_MASK BIT(10)
	Resistance measurement fault on channel 3 mask.
#define	MAX2221X_FAULT_RES2_MASK BIT(9)
	Resistance measurement fault on channel 2 mask.
#define	MAX2221X_FAULT_RES1_MASK BIT(8)
	Resistance measurement fault on channel 1 mask.
#define	MAX2221X_FAULT_RES0_MASK BIT(7)
	Resistance measurement fault on channel 0 mask.
#define	MAX2221X_FAULT_OVT_MASK BIT(6)
	Over-temperature fault mask.
#define	MAX2221X_FAULT_COMER_MASK BIT(5)
	Communication error fault mask.
#define	MAX2221X_FAULT_UVM_MASK BIT(4)
	Under-voltage monitor fault mask.
#define	MAX2221X_FAULT_IND3_MASK BIT(3)
	Inductance measurement fault on channel 3 mask.
#define	MAX2221X_FAULT_IND2_MASK BIT(2)
	Inductance measurement fault on channel 2 mask.
#define	MAX2221X_FAULT_IND1_MASK BIT(1)
	Inductance measurement fault on channel 1 mask.
#define	MAX2221X_FAULT_IND0_MASK BIT(0)
	Inductance measurement fault on channel 0 mask.

Detailed Description

Macro Definition Documentation

◆ MAX2221X_ACTIVE_MASK

#define MAX2221X_ACTIVE_MASK BIT(15)

#include <zephyr/drivers/mfd/max2221x.h>

Active mode enable mask.

◆ MAX2221X_CNTL0_MASK

#define MAX2221X_CNTL0_MASK BIT(0)

#include <zephyr/drivers/mfd/max2221x.h>

Channel 0 control enable mask.

◆ MAX2221X_CNTL1_MASK

#define MAX2221X_CNTL1_MASK BIT(1)

#include <zephyr/drivers/mfd/max2221x.h>

Channel 1 control enable mask.

◆ MAX2221X_CNTL2_MASK

#define MAX2221X_CNTL2_MASK BIT(2)

#include <zephyr/drivers/mfd/max2221x.h>

Channel 2 control enable mask.

◆ MAX2221X_CNTL3_MASK

#define MAX2221X_CNTL3_MASK BIT(3)

#include <zephyr/drivers/mfd/max2221x.h>

Channel 3 control enable mask.

◆ MAX2221X_CTRL_MODE_MASK

#define MAX2221X_CTRL_MODE_MASK GENMASK(15, 14)

#include <zephyr/drivers/mfd/max2221x.h>

Control mode selection mask.

◆ MAX2221X_F_PWM_M_MASK

#define MAX2221X_F_PWM_M_MASK GENMASK(7, 4)

#include <zephyr/drivers/mfd/max2221x.h>

Master chopping frequency mask in global configuration register.

◆ MAX2221X_F_PWM_MASK

#define MAX2221X_F_PWM_MASK GENMASK(9, 8)

#include <zephyr/drivers/mfd/max2221x.h>

Channel chopping frequency divisor mask.

◆ MAX2221X_FAULT_COMER_MASK

#define MAX2221X_FAULT_COMER_MASK BIT(5)

#include <zephyr/drivers/mfd/max2221x.h>

Communication error fault mask.

◆ MAX2221X_FAULT_DPM0_MASK

#define MAX2221X_FAULT_DPM0_MASK BIT(12)

#include <zephyr/drivers/mfd/max2221x.h>

DPM fault on channel 0 mask.

◆ MAX2221X_FAULT_DPM1_MASK

#define MAX2221X_FAULT_DPM1_MASK BIT(13)

#include <zephyr/drivers/mfd/max2221x.h>

DPM fault on channel 1 mask.

◆ MAX2221X_FAULT_DPM2_MASK

#define MAX2221X_FAULT_DPM2_MASK BIT(14)

#include <zephyr/drivers/mfd/max2221x.h>

DPM fault on channel 2 mask.

◆ MAX2221X_FAULT_DPM3_MASK

#define MAX2221X_FAULT_DPM3_MASK BIT(15)

#include <zephyr/drivers/mfd/max2221x.h>

DPM fault on channel 3 mask.

◆ MAX2221X_FAULT_HHF0_MASK

#define MAX2221X_FAULT_HHF0_MASK BIT(4)

#include <zephyr/drivers/mfd/max2221x.h>

Hit current not reached fault on channel 0 mask.

◆ MAX2221X_FAULT_HHF1_MASK

#define MAX2221X_FAULT_HHF1_MASK BIT(5)

#include <zephyr/drivers/mfd/max2221x.h>

Hit current not reached fault on channel 1 mask.

◆ MAX2221X_FAULT_HHF2_MASK

#define MAX2221X_FAULT_HHF2_MASK BIT(6)

#include <zephyr/drivers/mfd/max2221x.h>

Hit current not reached fault on channel 2 mask.

◆ MAX2221X_FAULT_HHF3_MASK

#define MAX2221X_FAULT_HHF3_MASK BIT(7)

#include <zephyr/drivers/mfd/max2221x.h>

Hit current not reached fault on channel 3 mask.

◆ MAX2221X_FAULT_IND0_MASK

#define MAX2221X_FAULT_IND0_MASK BIT(0)

#include <zephyr/drivers/mfd/max2221x.h>

Inductance measurement fault on channel 0 mask.

◆ MAX2221X_FAULT_IND1_MASK

#define MAX2221X_FAULT_IND1_MASK BIT(1)

#include <zephyr/drivers/mfd/max2221x.h>

Inductance measurement fault on channel 1 mask.

◆ MAX2221X_FAULT_IND2_MASK

#define MAX2221X_FAULT_IND2_MASK BIT(2)

#include <zephyr/drivers/mfd/max2221x.h>

Inductance measurement fault on channel 2 mask.

◆ MAX2221X_FAULT_IND3_MASK

#define MAX2221X_FAULT_IND3_MASK BIT(3)

#include <zephyr/drivers/mfd/max2221x.h>

Inductance measurement fault on channel 3 mask.

◆ MAX2221X_FAULT_OCP0_MASK

#define MAX2221X_FAULT_OCP0_MASK BIT(0)

#include <zephyr/drivers/mfd/max2221x.h>

Over-current protection fault on channel 0 mask.

◆ MAX2221X_FAULT_OCP1_MASK

#define MAX2221X_FAULT_OCP1_MASK BIT(1)

#include <zephyr/drivers/mfd/max2221x.h>

Over-current protection fault on channel 1 mask.

◆ MAX2221X_FAULT_OCP2_MASK

#define MAX2221X_FAULT_OCP2_MASK BIT(2)

#include <zephyr/drivers/mfd/max2221x.h>

Over-current protection fault on channel 2 mask.

◆ MAX2221X_FAULT_OCP3_MASK

#define MAX2221X_FAULT_OCP3_MASK BIT(3)

#include <zephyr/drivers/mfd/max2221x.h>

Over-current protection fault on channel 3 mask.

◆ MAX2221X_FAULT_OLF0_MASK

#define MAX2221X_FAULT_OLF0_MASK BIT(8)

#include <zephyr/drivers/mfd/max2221x.h>

Open-load fault on channel 0 mask.

◆ MAX2221X_FAULT_OLF1_MASK

#define MAX2221X_FAULT_OLF1_MASK BIT(9)

#include <zephyr/drivers/mfd/max2221x.h>

Open-load fault on channel 1 mask.

◆ MAX2221X_FAULT_OLF2_MASK

#define MAX2221X_FAULT_OLF2_MASK BIT(10)

#include <zephyr/drivers/mfd/max2221x.h>

Open-load fault on channel 2 mask.

◆ MAX2221X_FAULT_OLF3_MASK

#define MAX2221X_FAULT_OLF3_MASK BIT(11)

#include <zephyr/drivers/mfd/max2221x.h>

Open-load fault on channel 3 mask.

◆ MAX2221X_FAULT_OVT_MASK

#define MAX2221X_FAULT_OVT_MASK BIT(6)

#include <zephyr/drivers/mfd/max2221x.h>

Over-temperature fault mask.

◆ MAX2221X_FAULT_RES0_MASK

#define MAX2221X_FAULT_RES0_MASK BIT(7)

#include <zephyr/drivers/mfd/max2221x.h>

Resistance measurement fault on channel 0 mask.

◆ MAX2221X_FAULT_RES1_MASK

#define MAX2221X_FAULT_RES1_MASK BIT(8)

#include <zephyr/drivers/mfd/max2221x.h>

Resistance measurement fault on channel 1 mask.

◆ MAX2221X_FAULT_RES2_MASK

#define MAX2221X_FAULT_RES2_MASK BIT(9)

#include <zephyr/drivers/mfd/max2221x.h>

Resistance measurement fault on channel 2 mask.

◆ MAX2221X_FAULT_RES3_MASK

#define MAX2221X_FAULT_RES3_MASK BIT(10)

#include <zephyr/drivers/mfd/max2221x.h>

Resistance measurement fault on channel 3 mask.

◆ MAX2221X_FAULT_UVM_MASK

#define MAX2221X_FAULT_UVM_MASK BIT(4)

#include <zephyr/drivers/mfd/max2221x.h>

Under-voltage monitor fault mask.

◆ MAX2221X_GAIN_MASK

#define MAX2221X_GAIN_MASK GENMASK(3, 2)

#include <zephyr/drivers/mfd/max2221x.h>

Digital gain selection mask.

◆ MAX2221X_M_UVM_MASK

#define MAX2221X_M_UVM_MASK BIT(8)

#include <zephyr/drivers/mfd/max2221x.h>

Under-voltage monitor mask.

◆ MAX2221X_NUM_CHANNELS

#define MAX2221X_NUM_CHANNELS 4

#include <zephyr/drivers/mfd/max2221x.h>

Number of MAX2221X channels.

◆ MAX2221X_RAMP_MASK

#define MAX2221X_RAMP_MASK GENMASK(7, 0)

#include <zephyr/drivers/mfd/max2221x.h>

Ramp slew rate value mask.

◆ MAX2221X_RDWE_MASK

#define MAX2221X_RDWE_MASK BIT(10)

#include <zephyr/drivers/mfd/max2221x.h>

Ramp-down enable mask.

◆ MAX2221X_REG_CFG_CTRL0

#define MAX2221X_REG_CFG_CTRL0 ( x )

#include <zephyr/drivers/mfd/max2221x.h>

Value:

(0x0D + ((x) * 0xE))

Channel control 0 configuration register address.

Parameters

x	Channel number

◆ MAX2221X_REG_CFG_CTRL1

#define MAX2221X_REG_CFG_CTRL1 ( x )

#include <zephyr/drivers/mfd/max2221x.h>

Value:

(0x0E + ((x) * 0xE))

Channel control 1 configuration register address.

Parameters

x	Channel number

◆ MAX2221X_REG_CFG_DC_H

#define MAX2221X_REG_CFG_DC_H ( x )

#include <zephyr/drivers/mfd/max2221x.h>

Value:

(0x0A + ((x) * 0xE))

Channel duty cycle high configuration register address.

Parameters

x	Channel number

◆ MAX2221X_REG_CFG_DC_L

#define MAX2221X_REG_CFG_DC_L ( x )

#include <zephyr/drivers/mfd/max2221x.h>

Value:

(0x0B + ((x) * 0xE))

Channel duty cycle low configuration register address.

Parameters

x	Channel number

◆ MAX2221X_REG_CFG_DC_L2H

#define MAX2221X_REG_CFG_DC_L2H ( x )

#include <zephyr/drivers/mfd/max2221x.h>

Value:

(0x09 + ((x) * 0xE))

Channel duty cycle low-to-high configuration register address.

Parameters

x	Channel number

◆ MAX2221X_REG_CFG_TIME_L2H

#define MAX2221X_REG_CFG_TIME_L2H ( x )

#include <zephyr/drivers/mfd/max2221x.h>

Value:

(0x0C + ((x) * 0xE))

Channel time low-to-high configuration register address.

Parameters

x	Channel number

◆ MAX2221X_REG_DC_H2L

#define MAX2221X_REG_DC_H2L 0x03

#include <zephyr/drivers/mfd/max2221x.h>

Demagnetization duty cycle high-to-low register address.

◆ MAX2221X_REG_FAULT0

#define MAX2221X_REG_FAULT0 0x65

#include <zephyr/drivers/mfd/max2221x.h>

Fault 0 register address.

◆ MAX2221X_REG_FAULT1

#define MAX2221X_REG_FAULT1 0x66

#include <zephyr/drivers/mfd/max2221x.h>

Fault 1 register address.

◆ MAX2221X_REG_GLOBAL_CFG

#define MAX2221X_REG_GLOBAL_CFG 0x01

#include <zephyr/drivers/mfd/max2221x.h>

Global configuration register address.

◆ MAX2221X_REG_GLOBAL_CTRL

#define MAX2221X_REG_GLOBAL_CTRL 0x00

#include <zephyr/drivers/mfd/max2221x.h>

Global control register address.

◆ MAX2221X_REG_PWM_DUTY

#define MAX2221X_REG_PWM_DUTY ( x )

#include <zephyr/drivers/mfd/max2221x.h>

Value:

(0x49 + ((x) * 0xE))

Channel PWM duty cycle register address.

Parameters

x	Channel number

◆ MAX2221X_REG_STATUS

#define MAX2221X_REG_STATUS 0x02

#include <zephyr/drivers/mfd/max2221x.h>

Status register address.

◆ MAX2221X_REG_VM_MONITOR

#define MAX2221X_REG_VM_MONITOR 0x05

#include <zephyr/drivers/mfd/max2221x.h>

Voltage monitor register address.

◆ MAX2221X_REG_VM_THRESHOLD

#define MAX2221X_REG_VM_THRESHOLD 0x06

#include <zephyr/drivers/mfd/max2221x.h>

Voltage monitor threshold register address.

◆ MAX2221X_RMDE_MASK

#define MAX2221X_RMDE_MASK BIT(9)

#include <zephyr/drivers/mfd/max2221x.h>

Ramp-middle enable mask.

◆ MAX2221X_RUPE_MASK

#define MAX2221X_RUPE_MASK BIT(8)

#include <zephyr/drivers/mfd/max2221x.h>

Ramp-up enable mask.

◆ MAX2221X_SLEW_RATE_MASK

#define MAX2221X_SLEW_RATE_MASK GENMASK(5, 4)

#include <zephyr/drivers/mfd/max2221x.h>

Output slew rate selection mask.

◆ MAX2221X_SNSF_MASK

#define MAX2221X_SNSF_MASK GENMASK(1, 0)

#include <zephyr/drivers/mfd/max2221x.h>

Sense scaling factor selection mask.

◆ MAX2221X_SPI_TRANS_ADDR

#define MAX2221X_SPI_TRANS_ADDR GENMASK(6, 0)

#include <zephyr/drivers/mfd/max2221x.h>

SPI transaction register address field mask.

◆ MAX2221X_SPI_TRANS_DIR

#define MAX2221X_SPI_TRANS_DIR BIT(7)

#include <zephyr/drivers/mfd/max2221x.h>

SPI transaction read/write direction bit.

◆ MAX2221X_STATUS_COMER_MASK

#define MAX2221X_STATUS_COMER_MASK BIT(2)

#include <zephyr/drivers/mfd/max2221x.h>

Communication error fault status mask.

◆ MAX2221X_STATUS_DPM_MASK

#define MAX2221X_STATUS_DPM_MASK BIT(3)

#include <zephyr/drivers/mfd/max2221x.h>

DPM error fault status mask.

◆ MAX2221X_STATUS_HHF_MASK

#define MAX2221X_STATUS_HHF_MASK BIT(4)

#include <zephyr/drivers/mfd/max2221x.h>

Hit current not reached fault status mask.

◆ MAX2221X_STATUS_IND_MASK

#define MAX2221X_STATUS_IND_MASK BIT(8)

#include <zephyr/drivers/mfd/max2221x.h>

Inductance measurement status mask.

◆ MAX2221X_STATUS_MIN_T_ON_MASK

#define MAX2221X_STATUS_MIN_T_ON_MASK BIT(10)

#include <zephyr/drivers/mfd/max2221x.h>

Minimum on-time fault status mask.

◆ MAX2221X_STATUS_OCP_MASK

#define MAX2221X_STATUS_OCP_MASK BIT(6)

#include <zephyr/drivers/mfd/max2221x.h>

Over-current protection fault status mask.

◆ MAX2221X_STATUS_OLF_MASK

#define MAX2221X_STATUS_OLF_MASK BIT(5)

#include <zephyr/drivers/mfd/max2221x.h>

Open-load fault status mask.

◆ MAX2221X_STATUS_OVT_MASK

#define MAX2221X_STATUS_OVT_MASK BIT(7)

#include <zephyr/drivers/mfd/max2221x.h>

Over-temperature fault status mask.

◆ MAX2221X_STATUS_RES_MASK

#define MAX2221X_STATUS_RES_MASK BIT(9)

#include <zephyr/drivers/mfd/max2221x.h>

Resistance measurement status mask.

◆ MAX2221X_STATUS_STT0_MASK

#define MAX2221X_STATUS_STT0_MASK BIT(11)

#include <zephyr/drivers/mfd/max2221x.h>

Status bit 0 mask.

◆ MAX2221X_STATUS_STT1_MASK

#define MAX2221X_STATUS_STT1_MASK BIT(12)

#include <zephyr/drivers/mfd/max2221x.h>

Status bit 1 mask.

◆ MAX2221X_STATUS_STT2_MASK

#define MAX2221X_STATUS_STT2_MASK BIT(13)

#include <zephyr/drivers/mfd/max2221x.h>

Status bit 2 mask.

◆ MAX2221X_STATUS_STT3_MASK

#define MAX2221X_STATUS_STT3_MASK BIT(14)

#include <zephyr/drivers/mfd/max2221x.h>

Status bit 3 mask.

◆ MAX2221X_STATUS_UVM_MASK

#define MAX2221X_STATUS_UVM_MASK BIT(1)

#include <zephyr/drivers/mfd/max2221x.h>

Under-voltage monitor fault status mask.

◆ MAX2221X_VDRNVDRDUTY_MASK

#define MAX2221X_VDRNVDRDUTY_MASK BIT(4)

#include <zephyr/drivers/mfd/max2221x.h>

VDR/VDRDUTY mode selection mask.

◆ MAX2221X_VM_MONITOR_MASK

#define MAX2221X_VM_MONITOR_MASK GENMASK(12, 0)

#include <zephyr/drivers/mfd/max2221x.h>

Voltage monitor measurement value mask.

◆ MAX2221X_VM_THLD_DOWN_MASK

#define MAX2221X_VM_THLD_DOWN_MASK GENMASK(3, 0)

#include <zephyr/drivers/mfd/max2221x.h>

Lower voltage monitor threshold mask.

◆ MAX2221X_VM_THLD_UP_MASK

#define MAX2221X_VM_THLD_UP_MASK GENMASK(7, 4)

#include <zephyr/drivers/mfd/max2221x.h>

Upper voltage monitor threshold mask.

Function Documentation

◆ max2221x_reg_read()

int max2221x_reg_read	(	const struct device *	dev,
		uint8_t	addr,
		uint16_t *	value )

#include <zephyr/drivers/mfd/max2221x.h>

Read register from max2221x.

Parameters

dev	max2221x mfd device
addr	register address to read from
value	pointer to buffer for received data

Return values

0	If successful
-errno	In case of any error (see spi_transceive_dt())

◆ max2221x_reg_update()

int max2221x_reg_update	(	const struct device *	dev,
		uint8_t	addr,
		uint16_t	mask,
		uint16_t	val )

#include <zephyr/drivers/mfd/max2221x.h>

Update register in max2221x.

Parameters

dev	max2221x mfd device
addr	register address to update
mask	mask to apply to the register
val	value to write to the register

Return values

0	If successful
-errno	In case of any error (see spi_transceive_dt())

◆ max2221x_reg_write()

int max2221x_reg_write	(	const struct device *	dev,
		uint8_t	addr,
		uint16_t	value )

#include <zephyr/drivers/mfd/max2221x.h>

Write register to max2221x.

Parameters

dev	max2221x mfd device
addr	register address to write to
value	content to write

Return values

0	If successful
-errno	In case of any error (see spi_write_dt())

Files

Macros

Functions

MAX2221X SPI Transaction Fields

MAX2221X Register Addresses

MAX2221X Global Configuration Masks

MAX2221X Global Control Masks

MAX2221X Status Register Masks

MAX2221X VM Monitor Masks

MAX2221X VM Threshold Masks

MAX2221X Channel Control 0 Masks

MAX2221X Channel Control 1 Masks

MAX2221X Fault 0 Register Masks

MAX2221X Fault 1 Register Masks

Detailed Description

Macro Definition Documentation

◆ MAX2221X_ACTIVE_MASK

◆ MAX2221X_CNTL0_MASK

◆ MAX2221X_CNTL1_MASK

◆ MAX2221X_CNTL2_MASK

◆ MAX2221X_CNTL3_MASK

◆ MAX2221X_CTRL_MODE_MASK

◆ MAX2221X_F_PWM_M_MASK

◆ MAX2221X_F_PWM_MASK

◆ MAX2221X_FAULT_COMER_MASK

◆ MAX2221X_FAULT_DPM0_MASK

◆ MAX2221X_FAULT_DPM1_MASK

◆ MAX2221X_FAULT_DPM2_MASK

◆ MAX2221X_FAULT_DPM3_MASK

◆ MAX2221X_FAULT_HHF0_MASK

◆ MAX2221X_FAULT_HHF1_MASK

◆ MAX2221X_FAULT_HHF2_MASK

◆ MAX2221X_FAULT_HHF3_MASK

◆ MAX2221X_FAULT_IND0_MASK

◆ MAX2221X_FAULT_IND1_MASK

◆ MAX2221X_FAULT_IND2_MASK

◆ MAX2221X_FAULT_IND3_MASK

◆ MAX2221X_FAULT_OCP0_MASK

◆ MAX2221X_FAULT_OCP1_MASK

◆ MAX2221X_FAULT_OCP2_MASK

◆ MAX2221X_FAULT_OCP3_MASK

◆ MAX2221X_FAULT_OLF0_MASK

◆ MAX2221X_FAULT_OLF1_MASK

◆ MAX2221X_FAULT_OLF2_MASK

◆ MAX2221X_FAULT_OLF3_MASK

◆ MAX2221X_FAULT_OVT_MASK

◆ MAX2221X_FAULT_RES0_MASK

◆ MAX2221X_FAULT_RES1_MASK

◆ MAX2221X_FAULT_RES2_MASK

◆ MAX2221X_FAULT_RES3_MASK

◆ MAX2221X_FAULT_UVM_MASK

◆ MAX2221X_GAIN_MASK

◆ MAX2221X_M_UVM_MASK

◆ MAX2221X_NUM_CHANNELS

◆ MAX2221X_RAMP_MASK

◆ MAX2221X_RDWE_MASK

◆ MAX2221X_REG_CFG_CTRL0

◆ MAX2221X_REG_CFG_CTRL1

◆ MAX2221X_REG_CFG_DC_H

◆ MAX2221X_REG_CFG_DC_L

◆ MAX2221X_REG_CFG_DC_L2H

◆ MAX2221X_REG_CFG_TIME_L2H

◆ MAX2221X_REG_DC_H2L

◆ MAX2221X_REG_FAULT0

◆ MAX2221X_REG_FAULT1

◆ MAX2221X_REG_GLOBAL_CFG

◆ MAX2221X_REG_GLOBAL_CTRL

◆ MAX2221X_REG_PWM_DUTY

◆ MAX2221X_REG_STATUS

◆ MAX2221X_REG_VM_MONITOR

◆ MAX2221X_REG_VM_THRESHOLD

◆ MAX2221X_RMDE_MASK

◆ MAX2221X_RUPE_MASK

◆ MAX2221X_SLEW_RATE_MASK

◆ MAX2221X_SNSF_MASK

◆ MAX2221X_SPI_TRANS_ADDR

◆ MAX2221X_SPI_TRANS_DIR

◆ MAX2221X_STATUS_COMER_MASK

◆ MAX2221X_STATUS_DPM_MASK

◆ MAX2221X_STATUS_HHF_MASK