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QDEC NXP S32
Device Drivers » Sensor » Device-specific Sensor API extensions and Devicetree constants. » NXP

NXP S32 quadrature decoder TRGMUX and LCU routing. More...

Files

file  qdec_nxp_s32.h
 Devicetree binding constants for the NXP S32 quadrature decoder.

Logic trigger numbers

Logic trigger identifiers used in the trgmux property.

See Trgmux_Ip_Init_PBcfg.h.

#define TRGMUX_LOGIC_GROUP_0_TRIGGER_0   (0)
 Logic trigger 0.
#define TRGMUX_LOGIC_GROUP_0_TRIGGER_1   (1)
 Logic trigger 1.
#define TRGMUX_LOGIC_GROUP_1_TRIGGER_0   (2)
 Logic trigger 2.
#define TRGMUX_LOGIC_GROUP_1_TRIGGER_1   (3)
 Logic trigger 3.

TRGMUX hardware trigger inputs

TRGMUX trigger input identifiers used in the trgmux-io-config property.

See Trgmux_Ip_Cfg_Defines.h.

#define TRGMUX_IP_INPUT_SIUL2_IN0   (60)
 SIUL2 input 0.
#define TRGMUX_IP_INPUT_SIUL2_IN1   (61)
 SIUL2 input 1.
#define TRGMUX_IP_INPUT_SIUL2_IN2   (62)
 SIUL2 input 2.
#define TRGMUX_IP_INPUT_SIUL2_IN3   (63)
 SIUL2 input 3.
#define TRGMUX_IP_INPUT_SIUL2_IN4   (64)
 SIUL2 input 4.
#define TRGMUX_IP_INPUT_SIUL2_IN5   (65)
 SIUL2 input 5.
#define TRGMUX_IP_INPUT_SIUL2_IN6   (66)
 SIUL2 input 6.
#define TRGMUX_IP_INPUT_SIUL2_IN7   (67)
 SIUL2 input 7.
#define TRGMUX_IP_INPUT_SIUL2_IN8   (68)
 SIUL2 input 8.
#define TRGMUX_IP_INPUT_SIUL2_IN9   (69)
 SIUL2 input 9.
#define TRGMUX_IP_INPUT_SIUL2_IN10   (70)
 SIUL2 input 10.
#define TRGMUX_IP_INPUT_SIUL2_IN11   (71)
 SIUL2 input 11.
#define TRGMUX_IP_INPUT_SIUL2_IN12   (72)
 SIUL2 input 12.
#define TRGMUX_IP_INPUT_SIUL2_IN13   (73)
 SIUL2 input 13.
#define TRGMUX_IP_INPUT_SIUL2_IN14   (74)
 SIUL2 input 14.
#define TRGMUX_IP_INPUT_SIUL2_IN15   (75)
 SIUL2 input 15.
#define TRGMUX_IP_INPUT_LCU1_LC0_OUT_I0   (105)
 LCU1 LC0 output 0.
#define TRGMUX_IP_INPUT_LCU1_LC0_OUT_I1   (106)
 LCU1 LC0 output 1.
#define TRGMUX_IP_INPUT_LCU1_LC0_OUT_I2   (107)
 LCU1 LC0 output 2.
#define TRGMUX_IP_INPUT_LCU1_LC0_OUT_I3   (108)
 LCU1 LC0 output 3.

TRGMUX hardware trigger outputs

TRGMUX trigger output identifiers used in the trgmux-io-config property.

See Trgmux_Ip_Cfg_Defines.h.

#define TRGMUX_IP_OUTPUT_LCU1_0_INP_I0   (144)
 LCU1 instance 0 input 0.
#define TRGMUX_IP_OUTPUT_LCU1_0_INP_I1   (145)
 LCU1 instance 0 input 1.
#define TRGMUX_IP_OUTPUT_LCU1_0_INP_I2   (146)
 LCU1 instance 0 input 2.
#define TRGMUX_IP_OUTPUT_LCU1_0_INP_I3   (147)
 LCU1 instance 0 input 3.
#define TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH1   (32)
 eMIOS0 channel 1
#define TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH2   (33)
 eMIOS0 channel 2
#define TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH3   (34)
 eMIOS0 channel 3
#define TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH4   (35)
 eMIOS0 channel 4
#define TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH5   (36)
 eMIOS0 channel 5
#define TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH6   (37)
 eMIOS0 channel 6
#define TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH7   (38)
 eMIOS0 channel 7
#define TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH9   (39)
 eMIOS0 channel 9
#define TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH10   (40)
 eMIOS0 channel 10
#define TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH11   (41)
 eMIOS0 channel 11
#define TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH12   (42)
 eMIOS0 channel 12
#define TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH13   (43)
 eMIOS0 channel 13
#define TRGMUX_IP_OUTPUT_EMIOS0_CH14_15_IPP_IND_CH14   (44)
 eMIOS0 channel 14
#define TRGMUX_IP_OUTPUT_EMIOS0_CH14_15_IPP_IND_CH15   (45)
 eMIOS0 channel 15

LCU source mux selection

Values for the lcu-mux-sel devicetree property.

See Lcu_Ip_Cfg_Defines.h.

#define LCU_IP_MUX_SEL_LOGIC_0   (0)
 Constant logic 0.
#define LCU_IP_MUX_SEL_LU_IN_0   (1)
 LCU input 0.
#define LCU_IP_MUX_SEL_LU_IN_1   (2)
 LCU input 1.
#define LCU_IP_MUX_SEL_LU_IN_2   (3)
 LCU input 2.
#define LCU_IP_MUX_SEL_LU_IN_3   (4)
 LCU input 3.
#define LCU_IP_MUX_SEL_LU_IN_4   (5)
 LCU input 4.
#define LCU_IP_MUX_SEL_LU_IN_5   (6)
 LCU input 5.
#define LCU_IP_MUX_SEL_LU_IN_6   (7)
 LCU input 6.
#define LCU_IP_MUX_SEL_LU_IN_7   (8)
 LCU input 7.
#define LCU_IP_MUX_SEL_LU_IN_8   (9)
 LCU input 8.
#define LCU_IP_MUX_SEL_LU_IN_9   (10)
 LCU input 9.
#define LCU_IP_MUX_SEL_LU_IN_10   (11)
 LCU input 10.
#define LCU_IP_MUX_SEL_LU_IN_11   (12)
 LCU input 11.
#define LCU_IP_MUX_SEL_LU_OUT_0   (13)
 LCU output 0.
#define LCU_IP_MUX_SEL_LU_OUT_1   (14)
 LCU output 1.
#define LCU_IP_MUX_SEL_LU_OUT_2   (15)
 LCU output 2.
#define LCU_IP_MUX_SEL_LU_OUT_3   (16)
 LCU output 3.
#define LCU_IP_MUX_SEL_LU_OUT_4   (17)
 LCU output 4.
#define LCU_IP_MUX_SEL_LU_OUT_5   (18)
 LCU output 5.
#define LCU_IP_MUX_SEL_LU_OUT_6   (19)
 LCU output 6.
#define LCU_IP_MUX_SEL_LU_OUT_7   (20)
 LCU output 7.
#define LCU_IP_MUX_SEL_LU_OUT_8   (21)
 LCU output 8.
#define LCU_IP_MUX_SEL_LU_OUT_9   (22)
 LCU output 9.
#define LCU_IP_MUX_SEL_LU_OUT_10   (23)
 LCU output 10.
#define LCU_IP_MUX_SEL_LU_OUT_11   (24)
 LCU output 11.

LCU inputs

Values for the lcu-input-idx devicetree property.

#define LCU_IP_IN_0   (0)
 LCU input 0.
#define LCU_IP_IN_1   (1)
 LCU input 1.
#define LCU_IP_IN_2   (2)
 LCU input 2.
#define LCU_IP_IN_3   (3)
 LCU input 3.
#define LCU_IP_IN_4   (4)
 LCU input 4.
#define LCU_IP_IN_5   (5)
 LCU input 5.
#define LCU_IP_IN_6   (6)
 LCU input 6.
#define LCU_IP_IN_7   (7)
 LCU input 7.
#define LCU_IP_IN_8   (8)
 LCU input 8.
#define LCU_IP_IN_9   (9)
 LCU input 9.
#define LCU_IP_IN_10   (10)
 LCU input 10.
#define LCU_IP_IN_11   (11)
 LCU input 11.

Detailed Description

NXP S32 quadrature decoder TRGMUX and LCU routing.

Macro Definition Documentation

◆ LCU_IP_IN_0

#define LCU_IP_IN_0   (0)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 0.

◆ LCU_IP_IN_1

#define LCU_IP_IN_1   (1)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 1.

◆ LCU_IP_IN_10

#define LCU_IP_IN_10   (10)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 10.

◆ LCU_IP_IN_11

#define LCU_IP_IN_11   (11)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 11.

◆ LCU_IP_IN_2

#define LCU_IP_IN_2   (2)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 2.

◆ LCU_IP_IN_3

#define LCU_IP_IN_3   (3)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 3.

◆ LCU_IP_IN_4

#define LCU_IP_IN_4   (4)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 4.

◆ LCU_IP_IN_5

#define LCU_IP_IN_5   (5)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 5.

◆ LCU_IP_IN_6

#define LCU_IP_IN_6   (6)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 6.

◆ LCU_IP_IN_7

#define LCU_IP_IN_7   (7)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 7.

◆ LCU_IP_IN_8

#define LCU_IP_IN_8   (8)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 8.

◆ LCU_IP_IN_9

#define LCU_IP_IN_9   (9)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 9.

◆ LCU_IP_MUX_SEL_LOGIC_0

#define LCU_IP_MUX_SEL_LOGIC_0   (0)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

Constant logic 0.

◆ LCU_IP_MUX_SEL_LU_IN_0

#define LCU_IP_MUX_SEL_LU_IN_0   (1)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 0.

◆ LCU_IP_MUX_SEL_LU_IN_1

#define LCU_IP_MUX_SEL_LU_IN_1   (2)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 1.

◆ LCU_IP_MUX_SEL_LU_IN_10

#define LCU_IP_MUX_SEL_LU_IN_10   (11)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 10.

◆ LCU_IP_MUX_SEL_LU_IN_11

#define LCU_IP_MUX_SEL_LU_IN_11   (12)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 11.

◆ LCU_IP_MUX_SEL_LU_IN_2

#define LCU_IP_MUX_SEL_LU_IN_2   (3)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 2.

◆ LCU_IP_MUX_SEL_LU_IN_3

#define LCU_IP_MUX_SEL_LU_IN_3   (4)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 3.

◆ LCU_IP_MUX_SEL_LU_IN_4

#define LCU_IP_MUX_SEL_LU_IN_4   (5)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 4.

◆ LCU_IP_MUX_SEL_LU_IN_5

#define LCU_IP_MUX_SEL_LU_IN_5   (6)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 5.

◆ LCU_IP_MUX_SEL_LU_IN_6

#define LCU_IP_MUX_SEL_LU_IN_6   (7)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 6.

◆ LCU_IP_MUX_SEL_LU_IN_7

#define LCU_IP_MUX_SEL_LU_IN_7   (8)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 7.

◆ LCU_IP_MUX_SEL_LU_IN_8

#define LCU_IP_MUX_SEL_LU_IN_8   (9)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 8.

◆ LCU_IP_MUX_SEL_LU_IN_9

#define LCU_IP_MUX_SEL_LU_IN_9   (10)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU input 9.

◆ LCU_IP_MUX_SEL_LU_OUT_0

#define LCU_IP_MUX_SEL_LU_OUT_0   (13)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 0.

◆ LCU_IP_MUX_SEL_LU_OUT_1

#define LCU_IP_MUX_SEL_LU_OUT_1   (14)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 1.

◆ LCU_IP_MUX_SEL_LU_OUT_10

#define LCU_IP_MUX_SEL_LU_OUT_10   (23)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 10.

◆ LCU_IP_MUX_SEL_LU_OUT_11

#define LCU_IP_MUX_SEL_LU_OUT_11   (24)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 11.

◆ LCU_IP_MUX_SEL_LU_OUT_2

#define LCU_IP_MUX_SEL_LU_OUT_2   (15)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 2.

◆ LCU_IP_MUX_SEL_LU_OUT_3

#define LCU_IP_MUX_SEL_LU_OUT_3   (16)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 3.

◆ LCU_IP_MUX_SEL_LU_OUT_4

#define LCU_IP_MUX_SEL_LU_OUT_4   (17)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 4.

◆ LCU_IP_MUX_SEL_LU_OUT_5

#define LCU_IP_MUX_SEL_LU_OUT_5   (18)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 5.

◆ LCU_IP_MUX_SEL_LU_OUT_6

#define LCU_IP_MUX_SEL_LU_OUT_6   (19)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 6.

◆ LCU_IP_MUX_SEL_LU_OUT_7

#define LCU_IP_MUX_SEL_LU_OUT_7   (20)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 7.

◆ LCU_IP_MUX_SEL_LU_OUT_8

#define LCU_IP_MUX_SEL_LU_OUT_8   (21)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 8.

◆ LCU_IP_MUX_SEL_LU_OUT_9

#define LCU_IP_MUX_SEL_LU_OUT_9   (22)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU output 9.

◆ TRGMUX_IP_INPUT_LCU1_LC0_OUT_I0

#define TRGMUX_IP_INPUT_LCU1_LC0_OUT_I0   (105)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU1 LC0 output 0.

◆ TRGMUX_IP_INPUT_LCU1_LC0_OUT_I1

#define TRGMUX_IP_INPUT_LCU1_LC0_OUT_I1   (106)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU1 LC0 output 1.

◆ TRGMUX_IP_INPUT_LCU1_LC0_OUT_I2

#define TRGMUX_IP_INPUT_LCU1_LC0_OUT_I2   (107)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU1 LC0 output 2.

◆ TRGMUX_IP_INPUT_LCU1_LC0_OUT_I3

#define TRGMUX_IP_INPUT_LCU1_LC0_OUT_I3   (108)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU1 LC0 output 3.

◆ TRGMUX_IP_INPUT_SIUL2_IN0

#define TRGMUX_IP_INPUT_SIUL2_IN0   (60)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 0.

◆ TRGMUX_IP_INPUT_SIUL2_IN1

#define TRGMUX_IP_INPUT_SIUL2_IN1   (61)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 1.

◆ TRGMUX_IP_INPUT_SIUL2_IN10

#define TRGMUX_IP_INPUT_SIUL2_IN10   (70)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 10.

◆ TRGMUX_IP_INPUT_SIUL2_IN11

#define TRGMUX_IP_INPUT_SIUL2_IN11   (71)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 11.

◆ TRGMUX_IP_INPUT_SIUL2_IN12

#define TRGMUX_IP_INPUT_SIUL2_IN12   (72)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 12.

◆ TRGMUX_IP_INPUT_SIUL2_IN13

#define TRGMUX_IP_INPUT_SIUL2_IN13   (73)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 13.

◆ TRGMUX_IP_INPUT_SIUL2_IN14

#define TRGMUX_IP_INPUT_SIUL2_IN14   (74)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 14.

◆ TRGMUX_IP_INPUT_SIUL2_IN15

#define TRGMUX_IP_INPUT_SIUL2_IN15   (75)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 15.

◆ TRGMUX_IP_INPUT_SIUL2_IN2

#define TRGMUX_IP_INPUT_SIUL2_IN2   (62)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 2.

◆ TRGMUX_IP_INPUT_SIUL2_IN3

#define TRGMUX_IP_INPUT_SIUL2_IN3   (63)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 3.

◆ TRGMUX_IP_INPUT_SIUL2_IN4

#define TRGMUX_IP_INPUT_SIUL2_IN4   (64)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 4.

◆ TRGMUX_IP_INPUT_SIUL2_IN5

#define TRGMUX_IP_INPUT_SIUL2_IN5   (65)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 5.

◆ TRGMUX_IP_INPUT_SIUL2_IN6

#define TRGMUX_IP_INPUT_SIUL2_IN6   (66)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 6.

◆ TRGMUX_IP_INPUT_SIUL2_IN7

#define TRGMUX_IP_INPUT_SIUL2_IN7   (67)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 7.

◆ TRGMUX_IP_INPUT_SIUL2_IN8

#define TRGMUX_IP_INPUT_SIUL2_IN8   (68)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 8.

◆ TRGMUX_IP_INPUT_SIUL2_IN9

#define TRGMUX_IP_INPUT_SIUL2_IN9   (69)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

SIUL2 input 9.

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH10

#define TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH10   (40)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 10

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH11

#define TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH11   (41)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 11

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH12

#define TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH12   (42)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 12

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH13

#define TRGMUX_IP_OUTPUT_EMIOS0_CH10_13_IPP_IND_CH13   (43)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 13

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH14_15_IPP_IND_CH14

#define TRGMUX_IP_OUTPUT_EMIOS0_CH14_15_IPP_IND_CH14   (44)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 14

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH14_15_IPP_IND_CH15

#define TRGMUX_IP_OUTPUT_EMIOS0_CH14_15_IPP_IND_CH15   (45)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 15

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH1

#define TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH1   (32)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 1

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH2

#define TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH2   (33)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 2

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH3

#define TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH3   (34)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 3

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH4

#define TRGMUX_IP_OUTPUT_EMIOS0_CH1_4_IPP_IND_CH4   (35)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 4

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH5

#define TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH5   (36)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 5

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH6

#define TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH6   (37)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 6

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH7

#define TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH7   (38)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 7

◆ TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH9

#define TRGMUX_IP_OUTPUT_EMIOS0_CH5_9_IPP_IND_CH9   (39)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

eMIOS0 channel 9

◆ TRGMUX_IP_OUTPUT_LCU1_0_INP_I0

#define TRGMUX_IP_OUTPUT_LCU1_0_INP_I0   (144)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU1 instance 0 input 0.

◆ TRGMUX_IP_OUTPUT_LCU1_0_INP_I1

#define TRGMUX_IP_OUTPUT_LCU1_0_INP_I1   (145)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU1 instance 0 input 1.

◆ TRGMUX_IP_OUTPUT_LCU1_0_INP_I2

#define TRGMUX_IP_OUTPUT_LCU1_0_INP_I2   (146)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU1 instance 0 input 2.

◆ TRGMUX_IP_OUTPUT_LCU1_0_INP_I3

#define TRGMUX_IP_OUTPUT_LCU1_0_INP_I3   (147)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

LCU1 instance 0 input 3.

◆ TRGMUX_LOGIC_GROUP_0_TRIGGER_0

#define TRGMUX_LOGIC_GROUP_0_TRIGGER_0   (0)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

Logic trigger 0.

◆ TRGMUX_LOGIC_GROUP_0_TRIGGER_1

#define TRGMUX_LOGIC_GROUP_0_TRIGGER_1   (1)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

Logic trigger 1.

◆ TRGMUX_LOGIC_GROUP_1_TRIGGER_0

#define TRGMUX_LOGIC_GROUP_1_TRIGGER_0   (2)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

Logic trigger 2.

◆ TRGMUX_LOGIC_GROUP_1_TRIGGER_1

#define TRGMUX_LOGIC_GROUP_1_TRIGGER_1   (3)

#include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>

Logic trigger 3.