|
Zephyr API Documentation 4.3.99
A Scalable Open Source RTOS
|
Interfaces for Serial Wire Debug Port (SWDP). More...
Files | |
| file | swdp.h |
| Main header file for SWDP (Serial Wire Debug Port) driver API. | |
Data Structures | |
| struct | swdp_api |
| Serial Wire Debug Port (SWDP) driver API. More... | |
Macros | |
| #define | SWDP_TRANSFER_ERROR BIT(3) |
| Transfer or parity error detected during transaction. | |
Functions | |
| int | swdp_output_sequence (const struct device *dev, const uint32_t count, const uint8_t *const data) |
| Write count bits to SWDIO from data LSB first. | |
| int | swdp_input_sequence (const struct device *dev, const uint32_t count, uint8_t *const buf) |
| Read count bits from SWDIO into data LSB first. | |
| int | swdp_transfer (const struct device *dev, const uint8_t request, uint32_t *const data, const uint8_t idle_cycles, uint8_t *const response) |
| Perform SWDP transfer and store response. | |
| int | swdp_set_pins (const struct device *dev, const uint8_t pins, const uint8_t value) |
| Set SWCLK, SWDPIO, and nRESET pins state. | |
| int | swdp_get_pins (const struct device *dev, uint8_t *const state) |
| Get SWCLK, SWDPIO, and nRESET pins state. | |
| int | swdp_set_clock (const struct device *dev, const uint32_t clock) |
| Set SWDP clock frequency. | |
| int | swdp_port_on (const struct device *dev) |
| Enable interface, set pins to default state. | |
| int | swdp_port_off (const struct device *dev) |
| Disable interface, set pins to High-Z mode. | |
| int | swdp_configure (const struct device *dev, const uint8_t turnaround, const bool data_phase) |
| Configure SWDP interface. | |
SWD Packet Request Bits | |
Bit definitions for SWD packet request fields. These bits are used to construct the 8-bit request packet header sent during an SWD transaction. | |
| #define | SWDP_REQUEST_APnDP BIT(0) |
| Access Port (AP) or Debug Port (DP). | |
| #define | SWDP_REQUEST_RnW BIT(1) |
| Read (1) or Write (0) operation. | |
| #define | SWDP_REQUEST_A2 BIT(2) |
| Address bit 2 for register selection. | |
| #define | SWDP_REQUEST_A3 BIT(3) |
| Address bit 3 for register selection. | |
SWD Acknowledge (ACK) Response Bits | |
Bit definitions for SWD acknowledge response fields. These bits are used to indicate the result of an SWD transaction. | |
| #define | SWDP_ACK_OK BIT(0) |
| Transaction completed successfully. | |
| #define | SWDP_ACK_WAIT BIT(1) |
| Target requests to retry the transaction later. | |
| #define | SWDP_ACK_FAULT BIT(2) |
| Target detected a fault condition. | |
SWDP Interface Pin Definitions | |
Pin identifiers for SWDP interface control. These constants define bit positions for controlling individual pins in the SWDP interface. | |
| #define | SWDP_SWCLK_PIN 0U |
| Serial Wire Clock (SWCLK) pin identifier. | |
| #define | SWDP_SWDIO_PIN 1U |
| Serial Wire Data Input/Output (SWDIO) pin identifier. | |
| #define | SWDP_nRESET_PIN 7U |
| Active-low reset (nRESET) pin identifier. | |
Interfaces for Serial Wire Debug Port (SWDP).
| #define SWDP_ACK_FAULT BIT(2) |
#include <zephyr/drivers/swdp.h>
Target detected a fault condition.
| #define SWDP_ACK_OK BIT(0) |
#include <zephyr/drivers/swdp.h>
Transaction completed successfully.
| #define SWDP_ACK_WAIT BIT(1) |
#include <zephyr/drivers/swdp.h>
Target requests to retry the transaction later.
| #define SWDP_nRESET_PIN 7U |
#include <zephyr/drivers/swdp.h>
Active-low reset (nRESET) pin identifier.
| #define SWDP_REQUEST_A2 BIT(2) |
#include <zephyr/drivers/swdp.h>
Address bit 2 for register selection.
| #define SWDP_REQUEST_A3 BIT(3) |
#include <zephyr/drivers/swdp.h>
Address bit 3 for register selection.
| #define SWDP_REQUEST_APnDP BIT(0) |
| #define SWDP_REQUEST_RnW BIT(1) |
#include <zephyr/drivers/swdp.h>
Read (1) or Write (0) operation.
| #define SWDP_SWCLK_PIN 0U |
#include <zephyr/drivers/swdp.h>
Serial Wire Clock (SWCLK) pin identifier.
| #define SWDP_SWDIO_PIN 1U |
#include <zephyr/drivers/swdp.h>
Serial Wire Data Input/Output (SWDIO) pin identifier.
| #define SWDP_TRANSFER_ERROR BIT(3) |
#include <zephyr/drivers/swdp.h>
Transfer or parity error detected during transaction.
#include <zephyr/drivers/swdp.h>
Configure SWDP interface.
| dev | SWDP device |
| turnaround | Line turnaround cycles |
| data_phase | Always generate Data Phase (also on WAIT/FAULT) |
#include <zephyr/drivers/swdp.h>
Get SWCLK, SWDPIO, and nRESET pins state.
| dev | SWDP device |
| state | Place to store pins state |
#include <zephyr/drivers/swdp.h>
Read count bits from SWDIO into data LSB first.
| dev | SWDP device |
| count | Number of bits to read |
| buf | Buffer to store bits read |
| int swdp_output_sequence | ( | const struct device * | dev, |
| const uint32_t | count, | ||
| const uint8_t *const | data ) |
#include <zephyr/drivers/swdp.h>
Write count bits to SWDIO from data LSB first.
Typically used for line reset sequence or switching JTAG<->SWD operation.
| dev | SWDP device |
| count | Number of bits to write |
| data | Bits to write |
| int swdp_port_off | ( | const struct device * | dev | ) |
#include <zephyr/drivers/swdp.h>
Disable interface, set pins to High-Z mode.
| dev | SWDP device |
| int swdp_port_on | ( | const struct device * | dev | ) |
#include <zephyr/drivers/swdp.h>
Enable interface, set pins to default state.
| dev | SWDP device |
#include <zephyr/drivers/swdp.h>
Set SWDP clock frequency.
| dev | SWDP device |
| clock | Clock frequency in Hz |
#include <zephyr/drivers/swdp.h>
Set SWCLK, SWDPIO, and nRESET pins state.
| dev | SWDP device |
| pins | Bitmask of pins to set |
| value | Value to set pins to |
| int swdp_transfer | ( | const struct device * | dev, |
| const uint8_t | request, | ||
| uint32_t *const | data, | ||
| const uint8_t | idle_cycles, | ||
| uint8_t *const | response ) |
#include <zephyr/drivers/swdp.h>
Perform SWDP transfer and store response.
Request must be in the form APnDP | RnW | A[2:3], without start, stop, or parity bits. The driver may ignore idle_cycles when the SWDCLK is always clocked.
| dev | SWDP device |
| request | SWDP request bits |
| data | Data to be transferred with request |
| idle_cycles | Idle cycles between request and response |
| response | Buffer to store response (ACK/WAIT/FAULT) |