ifx_clock_source_common.h

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/*
 * SPDX-FileCopyrightText: Copyright (c) 2026 Infineon Technologies AG,
 * SPDX-FileCopyrightText: or an affiliate of Infineon Technologies AG. All rights reserved.
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IFX_CLOCK_SOURCE_COMMON_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IFX_CLOCK_SOURCE_COMMON_H_
 
#define CLK_SOURCE_IHO
#define CLK_SOURCE_PILO
 
#define IFX_IHO           1  
#define IFX_IMO           2  
#define IFX_ECO           3  
#define IFX_EXT           4  
#define IFX_ALTHF         5  
#define IFX_ALTLF         6  
#define IFX_ILO           7  
#define IFX_PILO          8  
#define IFX_WCO           9  
#define IFX_MFO           10 
#define IFX_PATHMUX       11 
#define IFX_FLL           12 
#define IFX_PLL200        13 
#define IFX_PLL400        14 
#define IFX_ECO_PRESCALER 15 
#define IFX_LF            16 
#define IFX_MF            17 
#define IFX_HF            18 
#define IFX_PUMP          19 
#define IFX_BAK           20 
#define IFX_ALT_SYS_TICK  21 
#define IFX_PERI          22 
#define IFX_DPLL250_0     23 
#define IFX_DPLL250_1     24 
#define IFX_DPLL500       25 
 
#define IFX_CLK_HF_NO_DIVIDE    0  
#define IFX_CLK_HF_DIVIDE_BY_2  1  
#define IFX_CLK_HF_DIVIDE_BY_3  2  
#define IFX_CLK_HF_DIVIDE_BY_4  3  
#define IFX_CLK_HF_DIVIDE_BY_5  4  
#define IFX_CLK_HF_DIVIDE_BY_6  5  
#define IFX_CLK_HF_DIVIDE_BY_7  6  
#define IFX_CLK_HF_DIVIDE_BY_8  7  
#define IFX_CLK_HF_DIVIDE_BY_9  8  
#define IFX_CLK_HF_DIVIDE_BY_10 9  
#define IFX_CLK_HF_DIVIDE_BY_11 10 
#define IFX_CLK_HF_DIVIDE_BY_12 11 
#define IFX_CLK_HF_DIVIDE_BY_13 12 
#define IFX_CLK_HF_DIVIDE_BY_14 13 
#define IFX_CLK_HF_DIVIDE_BY_15 14 
#define IFX_CLK_HF_DIVIDE_BY_16 15 
#define IFX_CLK_HF_MAX_DIVIDER     
 
#define IFX_CLK_HF_IN_CLKPATH0  0  
#define IFX_CLK_HF_IN_CLKPATH1  1  
#define IFX_CLK_HF_IN_CLKPATH2  2  
#define IFX_CLK_HF_IN_CLKPATH3  3  
#define IFX_CLK_HF_IN_CLKPATH4  4  
#define IFX_CLK_HF_IN_CLKPATH5  5  
#define IFX_CLK_HF_IN_CLKPATH6  6  
#define IFX_CLK_HF_IN_CLKPATH7  7  
#define IFX_CLK_HF_IN_CLKPATH8  8  
#define IFX_CLK_HF_IN_CLKPATH9  9  
#define IFX_CLK_HF_IN_CLKPATH10 10 
#define IFX_CLK_HF_IN_CLKPATH11 11 
#define IFX_CLK_HF_IN_CLKPATH12 12 
#define IFX_CLK_HF_IN_CLKPATH13 13 
#define IFX_CLK_HF_IN_CLKPATH14 14 
#define IFX_CLK_HF_IN_CLKPATH15 15 
 
/* Target resource types for peripheral dividers */
#define IFX_RSC_ADC     0  
#define IFX_RSC_ADCMIC  1  
#define IFX_RSC_BLESS   2  
#define IFX_RSC_CAN     3  
#define IFX_RSC_CLKPATH 4  
#define IFX_RSC_CLOCK   5  
#define IFX_RSC_CRYPTO  6  
#define IFX_RSC_DAC     7  
#define IFX_RSC_DMA     8  
#define IFX_RSC_DW      9  
#define IFX_RSC_ETH     10 
#define IFX_RSC_GPIO    11 
#define IFX_RSC_I2S     12 
#define IFX_RSC_I3C     13 
#define IFX_RSC_KEYSCAN 14 
#define IFX_RSC_LCD     15 
#define IFX_RSC_LIN     16 
#define IFX_RSC_LPCOMP  17 
#define IFX_RSC_LPTIMER 18 
#define IFX_RSC_OPAMP   19 
#define IFX_RSC_PDM     20 
#define IFX_RSC_PTC     21 
#define IFX_RSC_SMIF    22 
#define IFX_RSC_RTC     23 
#define IFX_RSC_SCB     24 
#define IFX_RSC_SDHC    25 
#define IFX_RSC_SDIODEV 26 
#define IFX_RSC_TCPWM   27 
#define IFX_RSC_TDM     28 
#define IFX_RSC_UDB     29 
#define IFX_RSC_USB     30 
#define IFX_RSC_INVALID 31 
 
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IFX_CLOCK_SOURCE_COMMON_H_ */