infineon-autanalog.h

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/*
 * Copyright (c) 2026 Infineon Technologies AG,
 * or an affiliate of Infineon Technologies AG.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

 
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_MFD_INFINEON_AUTANALOG_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_MFD_INFINEON_AUTANALOG_H_

#define IFX_AUTANALOG_AC_ACTION_STOP                0 
#define IFX_AUTANALOG_AC_ACTION_NEXT                1 
#define IFX_AUTANALOG_AC_ACTION_WAIT_FOR            2 
#define IFX_AUTANALOG_AC_ACTION_BRANCH_IF_TRUE      3 
#define IFX_AUTANALOG_AC_ACTION_BRANCH_IF_FALSE     4 
#define IFX_AUTANALOG_AC_ACTION_BRANCH_IF_TRUE_CLR  5 
#define IFX_AUTANALOG_AC_ACTION_BRANCH_IF_FALSE_CLR 6 

#define IFX_AUTANALOG_AC_COND_FALSE              0  
#define IFX_AUTANALOG_AC_COND_TRUE               1  
#define IFX_AUTANALOG_AC_COND_BLOCK_READY        2  
#define IFX_AUTANALOG_AC_COND_CNT_DONE           3  
#define IFX_AUTANALOG_AC_COND_SAR_DONE           4  
#define IFX_AUTANALOG_AC_COND_SAR_EOS            5  
#define IFX_AUTANALOG_AC_COND_SAR_RANGE0         6  
#define IFX_AUTANALOG_AC_COND_SAR_RANGE1         7  
#define IFX_AUTANALOG_AC_COND_SAR_RANGE2         8  
#define IFX_AUTANALOG_AC_COND_SAR_RANGE3         9  
#define IFX_AUTANALOG_AC_COND_SAR_BUSY           10 
#define IFX_AUTANALOG_AC_COND_SAR_FIR0_DONE      11 
#define IFX_AUTANALOG_AC_COND_SAR_FIR1_DONE      12 
#define IFX_AUTANALOG_AC_COND_SAR_FIFO_DONE      13 
#define IFX_AUTANALOG_AC_COND_SAR_FIR0_FIFO_DONE 14 
#define IFX_AUTANALOG_AC_COND_SAR_FIR1_FIFO_DONE 15 
#define IFX_AUTANALOG_AC_COND_PTCOMP_STROBE0     16 
#define IFX_AUTANALOG_AC_COND_PTCOMP_STROBE1     17 
#define IFX_AUTANALOG_AC_COND_PTCOMP_CMP0        18 
#define IFX_AUTANALOG_AC_COND_PTCOMP_CMP1        19 
#define IFX_AUTANALOG_AC_COND_PTCOMP_RANGE0      20 
#define IFX_AUTANALOG_AC_COND_PTCOMP_RANGE1      21 
#define IFX_AUTANALOG_AC_COND_CTB0_CMP0          22 
#define IFX_AUTANALOG_AC_COND_CTB0_CMP1          23 
#define IFX_AUTANALOG_AC_COND_CTB1_CMP0          24 
#define IFX_AUTANALOG_AC_COND_CTB1_CMP1          25 
#define IFX_AUTANALOG_AC_COND_CHIP_ACTIVE        32 
#define IFX_AUTANALOG_AC_COND_CHIP_DEEPSLEEP     33 
#define IFX_AUTANALOG_AC_COND_TR_IN0             34 
#define IFX_AUTANALOG_AC_COND_TR_IN1             35 
#define IFX_AUTANALOG_AC_COND_TR_IN2             36 
#define IFX_AUTANALOG_AC_COND_TR_IN3             37 
#define IFX_AUTANALOG_AC_COND_TR_IN_WAKE         38 
#define IFX_AUTANALOG_AC_COND_TIMER_DONE_WAKE    39 
#define IFX_AUTANALOG_AC_COND_CTB0_CMP0_WAKE     40 
#define IFX_AUTANALOG_AC_COND_CTB0_CMP1_WAKE     41 
#define IFX_AUTANALOG_AC_COND_CTB1_CMP0_WAKE     42 
#define IFX_AUTANALOG_AC_COND_CTB1_CMP1_WAKE     43 
#define IFX_AUTANALOG_AC_COND_PTCOMP_CMP0_WAKE   44 
#define IFX_AUTANALOG_AC_COND_PTCOMP_CMP1_WAKE   45 
#define IFX_AUTANALOG_AC_COND_FIFO_LEVEL0        46 
#define IFX_AUTANALOG_AC_COND_FIFO_LEVEL1        47 
#define IFX_AUTANALOG_AC_COND_FIFO_LEVEL2        48 
#define IFX_AUTANALOG_AC_COND_FIFO_LEVEL3        49 
#define IFX_AUTANALOG_AC_COND_FIFO_LEVEL4        50 
#define IFX_AUTANALOG_AC_COND_FIFO_LEVEL5        51 
#define IFX_AUTANALOG_AC_COND_FIFO_LEVEL6        52 
#define IFX_AUTANALOG_AC_COND_FIFO_LEVEL7        53 
#define IFX_AUTANALOG_AC_COND_DAC0_RANGE0        54 
#define IFX_AUTANALOG_AC_COND_DAC0_RANGE1        55 
#define IFX_AUTANALOG_AC_COND_DAC0_RANGE2        56 
#define IFX_AUTANALOG_AC_COND_DAC0_EPOCH         57 
#define IFX_AUTANALOG_AC_COND_DAC0_STROBE        58 
#define IFX_AUTANALOG_AC_COND_DAC1_RANGE0        59 
#define IFX_AUTANALOG_AC_COND_DAC1_RANGE1        60 
#define IFX_AUTANALOG_AC_COND_DAC1_RANGE2        61 
#define IFX_AUTANALOG_AC_COND_DAC1_EPOCH         62 
#define IFX_AUTANALOG_AC_COND_DAC1_STROBE        63 

#define IFX_AUTANALOG_AC_GPIO_OUT_DISABLED 0x0 
#define IFX_AUTANALOG_AC_GPIO_OUT0         0x1 
#define IFX_AUTANALOG_AC_GPIO_OUT1         0x2 
#define IFX_AUTANALOG_AC_GPIO_OUT2         0x4 
#define IFX_AUTANALOG_AC_GPIO_OUT3         0x8 

#define IFX_AUTANALOG_CTB_OA_GAIN_1_00  0  
#define IFX_AUTANALOG_CTB_OA_GAIN_1_42  1  
#define IFX_AUTANALOG_CTB_OA_GAIN_2_00  2  
#define IFX_AUTANALOG_CTB_OA_GAIN_2_78  3  
#define IFX_AUTANALOG_CTB_OA_GAIN_4_00  4  
#define IFX_AUTANALOG_CTB_OA_GAIN_5_82  5  
#define IFX_AUTANALOG_CTB_OA_GAIN_8_00  6  
#define IFX_AUTANALOG_CTB_OA_GAIN_10_67 7  
#define IFX_AUTANALOG_CTB_OA_GAIN_16_00 8  
#define IFX_AUTANALOG_CTB_OA_GAIN_21_33 9  
#define IFX_AUTANALOG_CTB_OA_GAIN_32_00 10 

#define IFX_AUTANALOG_DAC_DIR_DISABLED 0 
#define IFX_AUTANALOG_DAC_DIR_FORWARD  1 
#define IFX_AUTANALOG_DAC_DIR_REVERSE  2 
 
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_MFD_INFINEON_AUTANALOG_H_ */