Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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nrf_clock_control.h
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1/*
2 * Copyright (c) 2016 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12
13#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NRF_CLOCK_CONTROL_H_
14#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NRF_CLOCK_CONTROL_H_
15
16#include <zephyr/device.h>
17#include <zephyr/sys/onoff.h>
19
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30#if defined(CONFIG_CLOCK_CONTROL_NRF)
31
32#include <hal/nrf_clock.h>
33
38enum clock_control_nrf_type {
39 CLOCK_CONTROL_NRF_TYPE_HFCLK,
40 CLOCK_CONTROL_NRF_TYPE_LFCLK,
41#if NRF_CLOCK_HAS_HFCLK24M
42 CLOCK_CONTROL_NRF_TYPE_HFCLK24M,
43#endif
44#if NRF_CLOCK_HAS_HFCLK192M
45 CLOCK_CONTROL_NRF_TYPE_HFCLK192M,
46#endif
47#if NRF_CLOCK_HAS_HFCLKAUDIO
48 CLOCK_CONTROL_NRF_TYPE_HFCLKAUDIO,
49#endif
50 CLOCK_CONTROL_NRF_TYPE_COUNT
51};
52
60#define CLOCK_CONTROL_NRF_SUBSYS_HF \
61 ((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_HFCLK)
63#define CLOCK_CONTROL_NRF_SUBSYS_LF \
64 ((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_LFCLK)
66#define CLOCK_CONTROL_NRF_SUBSYS_HF24M \
67 ((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_HFCLK24M)
69#define CLOCK_CONTROL_NRF_SUBSYS_HF192M \
70 ((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_HFCLK192M)
72#define CLOCK_CONTROL_NRF_SUBSYS_HFAUDIO \
73 ((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_HFCLKAUDIO)
75
77enum nrf_lfclk_start_mode {
78 CLOCK_CONTROL_NRF_LF_START_NOWAIT,
79 CLOCK_CONTROL_NRF_LF_START_AVAILABLE,
80 CLOCK_CONTROL_NRF_LF_START_STABLE,
81};
82
84
85/* Define 32KHz clock source */
86#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC
87#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_RC
88#endif
89#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL
90#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_XTAL
91#endif
92#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH
93#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_SYNTH
94#endif
95#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING
96#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_XTAL_LOW_SWING
97#endif
98#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING
99#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_XTAL_FULL_SWING
100#endif
101
102/* Define 32KHz clock accuracy */
103#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM
104#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 0
105#endif
106#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM
107#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 1
108#endif
109#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_150PPM
110#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 2
111#endif
112#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_100PPM
113#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 3
114#endif
115#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_75PPM
116#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 4
117#endif
118#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM
119#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 5
120#endif
121#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM
122#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 6
123#endif
124#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM
125#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 7
126#endif
127
129void z_nrf_clock_calibration_force_start(void);
130
137int z_nrf_clock_calibration_count(void);
138
145int z_nrf_clock_calibration_skips_count(void);
146
147
152bool z_nrf_clock_calibration_is_in_progress(void);
153
160struct onoff_manager *z_nrf_clock_control_get_onoff(clock_control_subsys_t sys);
161
170void z_nrf_clock_control_lf_on(enum nrf_lfclk_start_mode start_mode);
171
184void z_nrf_clock_bt_ctlr_hf_request(void);
185
190void z_nrf_clock_bt_ctlr_hf_release(void);
191
197uint32_t z_nrf_clock_bt_ctlr_hf_get_startup_time_us(void);
198
200
201#endif /* defined(CONFIG_CLOCK_CONTROL_NRF) */
202
204#define NRF_CLOCK_CONTROL_FREQUENCY_MAX UINT32_MAX
205
207#define NRF_CLOCK_CONTROL_ACCURACY_MAX 1
209#define NRF_CLOCK_CONTROL_ACCURACY_PPM(ppm) (ppm)
210
212#define NRF_CLOCK_CONTROL_PRECISION_HIGH 1
214#define NRF_CLOCK_CONTROL_PRECISION_DEFAULT 0
215
222#define CLOCK_CONTROL_NRF_AUXPLL_FREQ_OUT_MIN_HZ 80000000
224#define CLOCK_CONTROL_NRF_AUXPLL_FREQ_OUT_AUDIO_44K1_HZ 11289591
226#define CLOCK_CONTROL_NRF_AUXPLL_FREQ_OUT_USB24M_HZ 24000000
228#define CLOCK_CONTROL_NRF_AUXPLL_FREQ_OUT_AUDIO_48K_HZ 12287963
230
232
233/* Internal helper macro to map DT property value to output frequency */
234#define _CLOCK_CONTROL_NRF_AUXPLL_MAP_FREQ(freq_val) \
235 ((freq_val) == NRF_AUXPLL_FREQ_DIV_MIN ? \
236 CLOCK_CONTROL_NRF_AUXPLL_FREQ_OUT_MIN_HZ : \
237 (freq_val) == NRF_AUXPLL_FREQ_DIV_AUDIO_44K1 ? \
238 CLOCK_CONTROL_NRF_AUXPLL_FREQ_OUT_AUDIO_44K1_HZ : \
239 (freq_val) == NRF_AUXPLL_FREQ_DIV_USB24M ? \
240 CLOCK_CONTROL_NRF_AUXPLL_FREQ_OUT_USB24M_HZ : \
241 (freq_val) == NRF_AUXPLL_FREQ_DIV_AUDIO_48K ? \
242 CLOCK_CONTROL_NRF_AUXPLL_FREQ_OUT_AUDIO_48K_HZ : 0)
243
245
252#define CLOCK_CONTROL_NRF_AUXPLL_GET_FREQ(node) \
253 COND_CODE_1(DT_NODE_HAS_PROP(node, nordic_frequency), \
254 (_CLOCK_CONTROL_NRF_AUXPLL_MAP_FREQ(DT_PROP(node, nordic_frequency))), \
255 (0))
256
260
261struct nrf_clock_spec {
262 uint32_t frequency;
263 uint16_t accuracy : 15;
264 uint16_t precision : 1;
265};
266
267__subsystem struct nrf_clock_control_driver_api {
268 struct clock_control_driver_api std_api;
269
270 int (*request)(const struct device *dev,
271 const struct nrf_clock_spec *spec,
272 struct onoff_client *cli);
273 int (*release)(const struct device *dev,
274 const struct nrf_clock_spec *spec);
275 int (*cancel_or_release)(const struct device *dev,
276 const struct nrf_clock_spec *spec,
277 struct onoff_client *cli);
278 int (*resolve)(const struct device *dev,
279 const struct nrf_clock_spec *req_spec,
280 struct nrf_clock_spec *res_spec);
281 int (*get_startup_time)(const struct device *dev,
282 const struct nrf_clock_spec *spec,
283 uint32_t *startup_time_us);
284};
285
286DEVICE_API_EXTENDS(nrf_clock_control, clock_control, std_api);
287
291
324static inline
325int nrf_clock_control_request(const struct device *dev,
326 const struct nrf_clock_spec *spec,
327 struct onoff_client *cli)
328{
329 return DEVICE_API_GET(nrf_clock_control, dev)->request(dev, spec, cli);
330}
331
347 const struct nrf_clock_spec *spec,
348 k_timeout_t timeout);
349
364static inline
365int nrf_clock_control_release(const struct device *dev,
366 const struct nrf_clock_spec *spec)
367{
368 return DEVICE_API_GET(nrf_clock_control, dev)->release(dev, spec);
369}
370
393static inline
395 const struct nrf_clock_spec *spec,
396 struct onoff_client *cli)
397{
398 return DEVICE_API_GET(nrf_clock_control, dev)->cancel_or_release(dev, spec, cli);
399}
400
411static inline int nrf_clock_control_resolve(const struct device *dev,
412 const struct nrf_clock_spec *req_spec,
413 struct nrf_clock_spec *res_spec)
414{
415 const struct nrf_clock_control_driver_api *api = DEVICE_API_GET(nrf_clock_control, dev);
416
417 if (api->resolve == NULL) {
418 return -ENOSYS;
419 }
420
421 return api->resolve(dev, req_spec, res_spec);
422}
423
434static inline int nrf_clock_control_get_startup_time(const struct device *dev,
435 const struct nrf_clock_spec *spec,
436 uint32_t *startup_time_us)
437{
438 const struct nrf_clock_control_driver_api *api = DEVICE_API_GET(nrf_clock_control, dev);
439
440 if (api->get_startup_time == NULL) {
441 return -ENOSYS;
442 }
443
444 return api->get_startup_time(dev, spec, startup_time_us);
445}
446
459
470
471#ifdef __cplusplus
472}
473#endif
474
476
477#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NRF_CLOCK_CONTROL_H_ */
Main header file for clock control driver API.
#define DEVICE_API_EXTENDS(_child, _parent, _member)
Declare that API class _child is an extension of device API class _parent.
Definition device.h:1390
#define DEVICE_API_GET(_class, _dev)
Expands to the pointer of a device's API for a given class.
Definition device.h:1425
int(* clock_control)(const struct device *dev, clock_control_subsys_t sys)
Callback API to enable or disable a clock.
Definition clock_control.h:96
void * clock_control_subsys_t
Opaque handle identifying a clock controller subsystem.
Definition clock_control.h:65
static int nrf_clock_control_get_startup_time(const struct device *dev, const struct nrf_clock_spec *spec, uint32_t *startup_time_us)
Get the startup time of a clock.
Definition nrf_clock_control.h:434
void nrf_clock_control_hfxo_request(void)
Request the HFXO from Zero Latency Interrupt context.
static int nrf_clock_control_request(const struct device *dev, const struct nrf_clock_spec *spec, struct onoff_client *cli)
Request a reservation to use a given clock with specified attributes.
Definition nrf_clock_control.h:325
static int nrf_clock_control_cancel_or_release(const struct device *dev, const struct nrf_clock_spec *spec, struct onoff_client *cli)
Safely cancel a reservation request.
Definition nrf_clock_control.h:394
void nrf_clock_control_hfxo_release(void)
Release the HFXO from Zero Latency Interrupt context.
static int nrf_clock_control_release(const struct device *dev, const struct nrf_clock_spec *spec)
Release a reserved use of a clock.
Definition nrf_clock_control.h:365
static int nrf_clock_control_resolve(const struct device *dev, const struct nrf_clock_spec *req_spec, struct nrf_clock_spec *res_spec)
Resolve a requested clock spec to resulting spec.
Definition nrf_clock_control.h:411
int nrf_clock_control_request_sync(const struct device *dev, const struct nrf_clock_spec *spec, k_timeout_t timeout)
Synchronously request a reservation to use a given clock with specified attributes.
#define ENOSYS
Function not implemented.
Definition errno.h:82
Header file for on-off service for managing shared resources.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT16_TYPE__ uint16_t
Definition stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition device.h:513
Kernel timeout type.
Definition clock.h:65
State associated with a client of an on-off service.
Definition onoff.h:280
State associated with an on-off manager.
Definition onoff.h:160