Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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numaker_m031x_reset.h
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1/*
2 * Copyright (c) 2026 Nuvoton Technology Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12
13#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M031X_RESET_H
14#define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M031X_RESET_H
15
40
52
54
60
61/* Beginning of M031 BSP sys_reg.h reset module copy */
62
63#define SYS_IPRST0_CHIPRST_Pos 0
64#define SYS_IPRST0_CPURST_Pos 1
65#define SYS_IPRST0_PDMARST_Pos 2
66#define SYS_IPRST0_EBIRST_Pos 3
67#define SYS_IPRST0_HDIVRST_Pos 4
68#define SYS_IPRST0_CRCRST_Pos 7
69#define SYS_IPRST1_GPIORST_Pos 1
70#define SYS_IPRST1_TMR0RST_Pos 2
71#define SYS_IPRST1_TMR1RST_Pos 3
72#define SYS_IPRST1_TMR2RST_Pos 4
73#define SYS_IPRST1_TMR3RST_Pos 5
74#define SYS_IPRST1_ACMP01RST_Pos 7
75#define SYS_IPRST1_I2C0RST_Pos 8
76#define SYS_IPRST1_I2C1RST_Pos 9
77#define SYS_IPRST1_QSPI0RST_Pos 12
78#define SYS_IPRST1_SPI0RST_Pos 13
79#define SYS_IPRST1_UART0RST_Pos 16
80#define SYS_IPRST1_UART1RST_Pos 17
81#define SYS_IPRST1_UART2RST_Pos 18
82#define SYS_IPRST1_UART3RST_Pos 19
83#define SYS_IPRST1_UART4RST_Pos 20
84#define SYS_IPRST1_UART5RST_Pos 21
85#define SYS_IPRST1_UART6RST_Pos 22
86#define SYS_IPRST1_UART7RST_Pos 23
87#define SYS_IPRST1_USBDRST_Pos 27
88#define SYS_IPRST1_ADCRST_Pos 28
89#define SYS_IPRST2_USCI0RST_Pos 8
90#define SYS_IPRST2_USCI1RST_Pos 9
91#define SYS_IPRST2_PWM0RST_Pos 16
92#define SYS_IPRST2_PWM1RST_Pos 17
93#define SYS_IPRST2_BPWM0RST_Pos 18
94#define SYS_IPRST2_BPWM1RST_Pos 19
95
96/* End of M031 BSP sys_reg.h reset module copy */
97
98/* Beginning of M031 BSP sys.h reset module copy */
99
100/*---------------------------------------------------------------------
101 * Module Reset Control Resister constant definitions.
102 *---------------------------------------------------------------------
103 */
104
105#define NUMAKER_PDMA_RST ((0x0 << 24) | SYS_IPRST0_PDMARST_Pos)
106#define NUMAKER_EBI_RST ((0x0 << 24) | SYS_IPRST0_EBIRST_Pos)
107#define NUMAKER_HDIV_RST ((0x0 << 24) | SYS_IPRST0_HDIVRST_Pos)
108#define NUMAKER_CRC_RST ((0x0 << 24) | SYS_IPRST0_CRCRST_Pos)
109#define NUMAKER_GPIO_RST ((0x4 << 24) | SYS_IPRST1_GPIORST_Pos)
110#define NUMAKER_TMR0_RST ((0x4 << 24) | SYS_IPRST1_TMR0RST_Pos)
111#define NUMAKER_TMR1_RST ((0x4 << 24) | SYS_IPRST1_TMR1RST_Pos)
112#define NUMAKER_TMR2_RST ((0x4 << 24) | SYS_IPRST1_TMR2RST_Pos)
113#define NUMAKER_TMR3_RST ((0x4 << 24) | SYS_IPRST1_TMR3RST_Pos)
114#define NUMAKER_ACMP01_RST ((0x4 << 24) | SYS_IPRST1_ACMP01RST_Pos)
115#define NUMAKER_I2C0_RST ((0x4 << 24) | SYS_IPRST1_I2C0RST_Pos)
116#define NUMAKER_I2C1_RST ((0x4 << 24) | SYS_IPRST1_I2C1RST_Pos)
117#define NUMAKER_QSPI0_RST ((0x4 << 24) | SYS_IPRST1_QSPI0RST_Pos)
118#define NUMAKER_SPI0_RST ((0x4 << 24) | SYS_IPRST1_SPI0RST_Pos)
119#define NUMAKER_UART0_RST ((0x4 << 24) | SYS_IPRST1_UART0RST_Pos)
120#define NUMAKER_UART1_RST ((0x4 << 24) | SYS_IPRST1_UART1RST_Pos)
121#define NUMAKER_UART2_RST ((0x4 << 24) | SYS_IPRST1_UART2RST_Pos)
122#define NUMAKER_UART3_RST ((0x4 << 24) | SYS_IPRST1_UART3RST_Pos)
123#define NUMAKER_UART4_RST ((0x4 << 24) | SYS_IPRST1_UART4RST_Pos)
124#define NUMAKER_UART5_RST ((0x4 << 24) | SYS_IPRST1_UART5RST_Pos)
125#define NUMAKER_UART6_RST ((0x4 << 24) | SYS_IPRST1_UART6RST_Pos)
126#define NUMAKER_UART7_RST ((0x4 << 24) | SYS_IPRST1_UART7RST_Pos)
127#define NUMAKER_USBD_RST ((0x4 << 24) | SYS_IPRST1_USBDRST_Pos)
128#define NUMAKER_ADC_RST ((0x4 << 24) | SYS_IPRST1_ADCRST_Pos)
129#define NUMAKER_USCI0_RST ((0x8 << 24) | SYS_IPRST2_USCI0RST_Pos)
130#define NUMAKER_USCI1_RST ((0x8 << 24) | SYS_IPRST2_USCI1RST_Pos)
131#define NUMAKER_PWM0_RST ((0x8 << 24) | SYS_IPRST2_PWM0RST_Pos)
132#define NUMAKER_PWM1_RST ((0x8 << 24) | SYS_IPRST2_PWM1RST_Pos)
133#define NUMAKER_BPWM0_RST ((0x8 << 24) | SYS_IPRST2_BPWM0RST_Pos)
134#define NUMAKER_BPWM1_RST ((0x8 << 24) | SYS_IPRST2_BPWM1RST_Pos)
135
136/* End of M031 BSP sys.h reset module copy */
137
139
141
143
145
146#endif