Zephyr API Documentation 4.3.99
A Scalable Open Source RTOS
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pinctrl-r8a779g0.h
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1/*
2 * Copyright (c) 2025 Renesas Electronics Corporation
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
16
17#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A779G0_H_
18#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A779G0_H_
19
20#include "pinctrl-rcar-common.h"
21
23/* Pins declaration */
24#define PIN_NONE -1
25
26#define PIN_GP0_00 RCAR_GP_PIN(0, 0)
27#define PIN_GP0_01 RCAR_GP_PIN(0, 1)
28#define PIN_GP0_02 RCAR_GP_PIN(0, 2)
29#define PIN_IRQ3 RCAR_GP_PIN(0, 3)
30#define PIN_IRQ2 RCAR_GP_PIN(0, 4)
31#define PIN_IRQ1 RCAR_GP_PIN(0, 5)
32#define PIN_IRQ0 RCAR_GP_PIN(0, 6)
33#define PIN_MSIOF5_SS2 RCAR_GP_PIN(0, 7)
34#define PIN_MSIOF5_SS1 RCAR_GP_PIN(0, 8)
35#define PIN_MSIOF5_SYNC RCAR_GP_PIN(0, 9)
36#define PIN_MSIOF5_TXD RCAR_GP_PIN(0, 10)
37#define PIN_MSIOF5_SCK RCAR_GP_PIN(0, 11)
38#define PIN_MSIOF5_RXD RCAR_GP_PIN(0, 12)
39#define PIN_MSIOF2_SS2 RCAR_GP_PIN(0, 13)
40#define PIN_MSIOF2_SS1 RCAR_GP_PIN(0, 14)
41#define PIN_MSIOF2_SYNC RCAR_GP_PIN(0, 15)
42#define PIN_MSIOF2_TXD RCAR_GP_PIN(0, 16)
43#define PIN_MSIOF2_SCK RCAR_GP_PIN(0, 17)
44#define PIN_MSIOF2_RXD RCAR_GP_PIN(0, 18)
45
46#define PIN_MSIOF1_SS2 RCAR_GP_PIN(1, 0)
47#define PIN_MSIOF1_SS1 RCAR_GP_PIN(1, 1)
48#define PIN_MSIOF1_SYNC RCAR_GP_PIN(1, 2)
49#define PIN_MSIOF1_SCK RCAR_GP_PIN(1, 3)
50#define PIN_MSIOF1_TXD RCAR_GP_PIN(1, 4)
51#define PIN_MSIOF1_RXD RCAR_GP_PIN(1, 5)
52#define PIN_MSIOF0_SS2 RCAR_GP_PIN(1, 6)
53#define PIN_MSIOF0_SS1 RCAR_GP_PIN(1, 7)
54#define PIN_MSIOF0_SYNC RCAR_GP_PIN(1, 8)
55#define PIN_MSIOF0_TXD RCAR_GP_PIN(1, 9)
56#define PIN_MSIOF0_SCK RCAR_GP_PIN(1, 10)
57#define PIN_MSIOF0_RXD RCAR_GP_PIN(1, 11)
58#define PIN_HTX0 RCAR_GP_PIN(1, 12)
59#define PIN_HCTS0_N RCAR_GP_PIN(1, 13)
60#define PIN_HRTS0_N RCAR_GP_PIN(1, 14)
61#define PIN_HSCK0 RCAR_GP_PIN(1, 15)
62#define PIN_HRX0 RCAR_GP_PIN(1, 16)
63#define PIN_SCIF_CLK RCAR_GP_PIN(1, 17)
64#define PIN_SSI_SCK RCAR_GP_PIN(1, 18)
65#define PIN_SSI_WS RCAR_GP_PIN(1, 19)
66#define PIN_SSI_SD RCAR_GP_PIN(1, 20)
67#define PIN_AUDIO_CLKOUT RCAR_GP_PIN(1, 21)
68#define PIN_AUDIO_CLKIN RCAR_GP_PIN(1, 22)
69#define PIN_GP1_23 RCAR_GP_PIN(1, 23)
70#define PIN_HRX3 RCAR_GP_PIN(1, 24)
71#define PIN_HSCK3 RCAR_GP_PIN(1, 25)
72#define PIN_HRTS3_N RCAR_GP_PIN(1, 26)
73#define PIN_HCTS3_N RCAR_GP_PIN(1, 27)
74#define PIN_HTX3 RCAR_GP_PIN(1, 28)
75
76#define PIN_FXR_TXDA RCAR_GP_PIN(2, 0)
77#define PIN_FXR_TXENA_N RCAR_GP_PIN(2, 1)
78#define PIN_RXDA_EXTFXR RCAR_GP_PIN(2, 2)
79#define PIN_CLK_EXTFXR RCAR_GP_PIN(2, 3)
80#define PIN_RXDB_EXTFXR RCAR_GP_PIN(2, 4)
81#define PIN_FXR_TXENB_N RCAR_GP_PIN(2, 5)
82#define PIN_FXR_TXDB RCAR_GP_PIN(2, 6)
83#define PIN_TPU0T01 RCAR_GP_PIN(2, 7)
84#define PIN_TPU0T00 RCAR_GP_PIN(2, 8)
85#define PIN_CAN_CLK RCAR_GP_PIN(2, 9)
86#define PIN_CANFD0_TX RCAR_GP_PIN(2, 10)
87#define PIN_CANFD0_RX RCAR_GP_PIN(2, 11)
88#define PIN_CANFD2_TX RCAR_GP_PIN(2, 12)
89#define PIN_CANFD2_RX RCAR_GP_PIN(2, 13)
90#define PIN_CANFD3_TX RCAR_GP_PIN(2, 14)
91#define PIN_CANFD3_RX RCAR_GP_PIN(2, 15)
92#define PIN_CANFD4_TX RCAR_GP_PIN(2, 16)
93#define PIN_CANFD4_RX RCAR_GP_PIN(2, 17)
94#define PIN_CANFD7_TX RCAR_GP_PIN(2, 18)
95#define PIN_CANFD7_RX RCAR_GP_PIN(2, 19)
96
97#define PIN_MMC_SD_D1 RCAR_GP_PIN(3, 0)
98#define PIN_MMC_SD_D0 RCAR_GP_PIN(3, 1)
99#define PIN_MMC_SD_D2 RCAR_GP_PIN(3, 2)
100#define PIN_MMC_SD_CLK RCAR_GP_PIN(3, 3)
101#define PIN_MMC_DS RCAR_GP_PIN(3, 4)
102#define PIN_MMC_SD_D3 RCAR_GP_PIN(3, 5)
103#define PIN_MMC_D5 RCAR_GP_PIN(3, 6)
104#define PIN_MMC_D4 RCAR_GP_PIN(3, 7)
105#define PIN_MMC_D7 RCAR_GP_PIN(3, 8)
106#define PIN_MMC_D6 RCAR_GP_PIN(3, 9)
107#define PIN_MMC_SD_CMD RCAR_GP_PIN(3, 10)
108#define PIN_SD_CD RCAR_GP_PIN(3, 11)
109#define PIN_SD_WP RCAR_GP_PIN(3, 12)
110#define PIN_IPC_CLKIN RCAR_GP_PIN(3, 13)
111#define PIN_IPC_CLKOUT RCAR_GP_PIN(3, 14)
112#define PIN_QSPI0_SSL RCAR_GP_PIN(3, 15)
113#define PIN_QSPI0_IO3 RCAR_GP_PIN(3, 16)
114#define PIN_QSPI0_IO2 RCAR_GP_PIN(3, 17)
115#define PIN_QSPI0_MISO_IO1 RCAR_GP_PIN(3, 18)
116#define PIN_QSPI0_MOSI_IO0 RCAR_GP_PIN(3, 19)
117#define PIN_QSPI0_SPCLK RCAR_GP_PIN(3, 20)
118#define PIN_QSPI1_MOSI_IO0 RCAR_GP_PIN(3, 21)
119#define PIN_QSPI1_SPCLK RCAR_GP_PIN(3, 22)
120#define PIN_QSPI1_MISO_IO1 RCAR_GP_PIN(3, 23)
121#define PIN_QSPI1_IO2 RCAR_GP_PIN(3, 24)
122#define PIN_QSPI1_SSL RCAR_GP_PIN(3, 25)
123#define PIN_QSPI1_IO3 RCAR_GP_PIN(3, 26)
124#define PIN_RPC_RESET_N RCAR_GP_PIN(3, 27)
125#define PIN_RPC_WP_N RCAR_GP_PIN(3, 28)
126#define PIN_RPC_INT_N RCAR_GP_PIN(3, 29)
127
128#define PIN_TSN0_MDIO RCAR_GP_PIN(4, 0)
129#define PIN_TSN0_MDC RCAR_GP_PIN(4, 1)
130#define PIN_TSN0_AVTP_PPS1 RCAR_GP_PIN(4, 2)
131#define PIN_TSN0_PHY_INT RCAR_GP_PIN(4, 3)
132#define PIN_TSN0_LINK RCAR_GP_PIN(4, 4)
133#define PIN_TSN0_AVTP_MATCH RCAR_GP_PIN(4, 5)
134#define PIN_TSN0_AVTP_CAPTURE RCAR_GP_PIN(4, 6)
135#define PIN_TSN0_RX_CTL RCAR_GP_PIN(4, 7)
136#define PIN_TSN0_AVTP_PPS0 RCAR_GP_PIN(4, 8)
137#define PIN_TSN0_TX_CTL RCAR_GP_PIN(4, 9)
138#define PIN_TSN0_RD0 RCAR_GP_PIN(4, 10)
139#define PIN_TSN0_RXC RCAR_GP_PIN(4, 11)
140#define PIN_TSN0_TXC RCAR_GP_PIN(4, 12)
141#define PIN_TSN0_RD1 RCAR_GP_PIN(4, 13)
142#define PIN_TSN0_TD1 RCAR_GP_PIN(4, 14)
143#define PIN_TSN0_TD0 RCAR_GP_PIN(4, 15)
144#define PIN_TSN0_RD3 RCAR_GP_PIN(4, 16)
145#define PIN_TSN0_RD2 RCAR_GP_PIN(4, 17)
146#define PIN_TSN0_TD3 RCAR_GP_PIN(4, 18)
147#define PIN_TSN0_TD2 RCAR_GP_PIN(4, 19)
148#define PIN_TSN0_TXCREFCLK RCAR_GP_PIN(4, 20)
149#define PIN_PCIE0_CLKREQ_N RCAR_GP_PIN(4, 21)
150#define PIN_PCIE1_CLKREQ_N RCAR_GP_PIN(4, 22)
151#define PIN_AVS0 RCAR_GP_PIN(4, 23)
152#define PIN_AVS1 RCAR_GP_PIN(4, 24)
153
154#define PIN_AVB2_AVTP_PPS RCAR_GP_PIN(5, 0)
155#define PIN_AVB2_AVTP_CAPTURE RCAR_GP_PIN(5, 1)
156#define PIN_AVB2_AVTP_MATCH RCAR_GP_PIN(5, 2)
157#define PIN_AVB2_LINK RCAR_GP_PIN(5, 3)
158#define PIN_AVB2_PHY_INT RCAR_GP_PIN(5, 4)
159#define PIN_AVB2_MAGIC RCAR_GP_PIN(5, 5)
160#define PIN_AVB2_MDC RCAR_GP_PIN(5, 6)
161#define PIN_AVB2_TXCREFCLK RCAR_GP_PIN(5, 7)
162#define PIN_AVB2_TD3 RCAR_GP_PIN(5, 8)
163#define PIN_AVB2_RD3 RCAR_GP_PIN(5, 9)
164#define PIN_AVB2_MDIO RCAR_GP_PIN(5, 10)
165#define PIN_AVB2_TD2 RCAR_GP_PIN(5, 11)
166#define PIN_AVB2_TD1 RCAR_GP_PIN(5, 12)
167#define PIN_AVB2_RD1 RCAR_GP_PIN(5, 13)
168#define PIN_AVB2_RD2 RCAR_GP_PIN(5, 14)
169#define PIN_AVB2_TD0 RCAR_GP_PIN(5, 15)
170#define PIN_AVB2_TXC RCAR_GP_PIN(5, 16)
171#define PIN_AVB2_RD0 RCAR_GP_PIN(5, 17)
172#define PIN_AVB2_RXC RCAR_GP_PIN(5, 18)
173#define PIN_AVB2_TX_CTL RCAR_GP_PIN(5, 19)
174#define PIN_AVB2_RX_CTL RCAR_GP_PIN(5, 20)
175
176#define PIN_SCL0 RCAR_GP_PIN(8, 0)
177#define PIN_SDA0 RCAR_GP_PIN(8, 1)
178#define PIN_SCL1 RCAR_GP_PIN(8, 2)
179#define PIN_SDA1 RCAR_GP_PIN(8, 3)
180#define PIN_SCL2 RCAR_GP_PIN(8, 4)
181#define PIN_SDA2 RCAR_GP_PIN(8, 5)
182#define PIN_SCL3 RCAR_GP_PIN(8, 6)
183#define PIN_SDA3 RCAR_GP_PIN(8, 7)
184#define PIN_SCL4 RCAR_GP_PIN(8, 8)
185#define PIN_SDA4 RCAR_GP_PIN(8, 9)
186#define PIN_SCL5 RCAR_GP_PIN(8, 10)
187#define PIN_SDA5 RCAR_GP_PIN(8, 11)
188#define PIN_GP8_12 RCAR_GP_PIN(8, 12)
189#define PIN_GP8_13 RCAR_GP_PIN(8, 13)
190
191/* Pinmux function declarations */
192#define FUNC_HTX1 IP1SR0(24, 0x1)
193#define FUNC_HRX1 IP1SR0(28, 0x1)
194#define FUNC_HCTS1 IP2SR0(0, 0x1)
195#define FUNC_HRTS1 IP2SR0(4, 0x1)
196#define FUNC_MSIOF1_SYNC IP0SR1(8, 0x0)
197#define FUNC_MSIOF1_SCK IP0SR1(12, 0x0)
198#define FUNC_MSIOF1_TXD IP0SR1(16, 0x0)
199#define FUNC_MSIOF1_RXD IP0SR1(20, 0x0)
200#define FUNC_MSIOF0_SS1 IP0SR1(28, 0x0)
201#define FUNC_MSIOF0_SYNC IP1SR1(0, 0x0)
202#define FUNC_MSIOF0_TXD IP1SR1(4, 0x0)
203#define FUNC_MSIOF0_SCK IP1SR1(8, 0x0)
204#define FUNC_MSIOF0_RXD IP1SR1(12, 0x0)
205#define FUNC_TX0 IP1SR1(16, 0x1)
206#define FUNC_HTX0 IP1SR1(16, 0x0)
207#define FUNC_HCTS0 IP1SR1(20, 0x1)
208#define FUNC_HRTS0 IP1SR1(24, 0x1)
209#define FUNC_PWM0 IP1SR1(28, 0x2)
210#define FUNC_HRX0 IP2SR1(0, 0x0)
211#define FUNC_RX0 IP2SR1(0, 0x1)
212#define FUNC_SCIF_CLK IP2SR1(4, 0x0)
213#define FUNC_AUDIO_CLKOUT IP2SR1(20, 0x0)
214#define FUNC_TPU0TO0 IP3SR1(4, 0x3)
215#define FUNC_TPU0TO1 IP3SR1(8, 0x3)
216#define FUNC_CAN_CLK IP1SR2(4, 0x0)
217#define FUNC_CANFD3_TX IP1SR2(24, 0x0)
218#define FUNC_CANFD3_RX IP1SR2(28, 0x0)
219#define FUNC_CANFD4_TX IP2SR2(0, 0x0)
220#define FUNC_CANFD4_RX IP2SR2(4, 0x0)
221#define FUNC_MMC_SD_D1 IP0SR3(0, 0x0)
222#define FUNC_MMC_SD_D0 IP0SR3(4, 0x0)
223#define FUNC_MMC_SD_D2 IP0SR3(8, 0x0)
224#define FUNC_MMC_SD_CLK IP0SR3(12, 0x0)
225#define FUNC_MMC_DS IP0SR3(16, 0x0)
226#define FUNC_MMC_SD_D3 IP0SR3(20, 0x0)
227#define FUNC_MMC_D5 IP0SR3(24, 0x0)
228#define FUNC_MMC_D4 IP0SR3(28, 0x0)
229#define FUNC_MMC_D7 IP1SR3(0, 0x0)
230#define FUNC_MMC_D6 IP1SR3(4, 0x0)
231#define FUNC_MMC_SD_CMD IP1SR3(8, 0x0)
232#define FUNC_SD_CD IP1SR3(12, 0x0)
233#define FUNC_SD_WP IP1SR3(16, 0x0)
234#define FUNC_QSPI0_SSL IP1SR3(28, 0x0)
235#define FUNC_QSPI0_IO3 IP2SR3(0, 0x0)
236#define FUNC_QSPI0_IO2 IP2SR3(4, 0x0)
237#define FUNC_QSPI0_MISO_IO1 IP2SR3(8, 0x0)
238#define FUNC_QSPI0_MOSI_IO0 IP2SR3(12, 0x0)
239#define FUNC_QSPI0_SPCLK IP2SR3(16, 0x0)
240#define FUNC_QSPI1_MOSI_IO0 IP2SR3(20, 0x0)
241#define FUNC_QSPI1_SPCLK IP2SR3(24, 0x0)
242#define FUNC_QSPI1_MISO_IO1 IP2SR3(28, 0x0)
243#define FUNC_QSPI1_IO2 IP3SR3(0, 0x0)
244#define FUNC_QSPI1_SSL IP3SR3(4, 0x0)
245#define FUNC_QSPI1_IO3 IP3SR3(8, 0x0)
246#define FUNC_RPC_RESET IP3SR3(12, 0x0)
247#define FUNC_RPC_WP IP3SR3(16, 0x0)
248#define FUNC_RPC_INT IP3SR3(20, 0x0)
249#define FUNC_PCIE0_CLKREQ IP2SR4(20, 0x0)
250#define FUNC_PCIE1_CLKREQ IP2SR4(24, 0x0)
251#define FUNC_AVS0 IP2SR4(28, 0x0)
252#define FUNC_AVS1 IP3SR4(0, 0x0)
253#define FUNC_AVB0_AVTP_PPS IP0SR7(0, 0x0)
254#define FUNC_AVB0_AVTP_CAPTURE IP0SR7(4, 0x0)
255#define FUNC_AVB0_AVTP_MATCH IP0SR7(8, 0x0)
256#define FUNC_AVB0_TD3 IP0SR7(12, 0x0)
257#define FUNC_AVB0_LINK IP0SR7(16, 0x0)
258#define FUNC_AVB0_PHY_INT IP0SR7(20, 0x0)
259#define FUNC_AVB0_TD2 IP0SR7(24, 0x0)
260#define FUNC_AVB0_TD1 IP0SR7(28, 0x0)
261#define FUNC_AVB0_RD3 IP1SR7(0, 0x0)
262#define FUNC_AVB0_TXCREFCLK IP1SR7(4, 0x0)
263#define FUNC_AVB0_MAGIC IP1SR7(8, 0x0)
264#define FUNC_AVB0_TD0 IP1SR7(12, 0x0)
265#define FUNC_AVB0_RD2 IP1SR7(16, 0x0)
266#define FUNC_AVB0_MDC IP1SR7(20, 0x0)
267#define FUNC_AVB0_MDIO IP1SR7(24, 0x0)
268#define FUNC_AVB0_TXC IP1SR7(28, 0x0)
269#define FUNC_AVB0_TX_CTL IP2SR7(0, 0x0)
270#define FUNC_AVB0_RD1 IP2SR7(4, 0x0)
271#define FUNC_AVB0_RD0 IP2SR7(8, 0x0)
272#define FUNC_AVB0_RXC IP2SR7(12, 0x0)
273#define FUNC_AVB0_RX_CTL IP2SR7(16, 0x0)
274#define FUNC_SCL0 IP0SR8(0, 0x0)
275#define FUNC_SDA0 IP0SR8(4, 0x0)
276#define FUNC_SCL1 IP0SR8(8, 0x0)
277#define FUNC_SDA1 IP0SR8(12, 0x0)
278#define FUNC_SCL2 IP0SR8(16, 0x0)
279#define FUNC_SDA2 IP0SR8(20, 0x0)
280#define FUNC_SCL3 IP0SR8(24, 0x0)
281#define FUNC_SDA3 IP0SR8(28, 0x0)
282#define FUNC_SCL4 IP1SR8(0, 0x0)
283#define FUNC_SDA4 IP1SR8(4, 0x0)
284#define FUNC_SCL5 IP1SR8(8, 0x0)
285#define FUNC_SDA5 IP1SR8(12, 0x0)
287
288#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A779G0_H_ */
Utility macro definitions to encode GPIO pin function for Renesas R-Car Gen4 SoC.