r8a78000_cpg_mssr.h

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/*
 * Copyright (c) 2026 BayLibre, SAS
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RENESAS_CLOCK_R8A78000_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RENESAS_CLOCK_R8A78000_H_


 
/* Clock IDs */
#define R8A78000_CLK_VIPN_FCPCS0        0
#define R8A78000_CLK_VIPN_FCPCS1        1
#define R8A78000_CLK_VIPN_VCP5X0        2
#define R8A78000_CLK_VIPN_VCP5X1        3
#define R8A78000_CLK_VIPN_MSYNC         4
#define R8A78000_CLK_VIPS_FCPCS0        5
#define R8A78000_CLK_VIPS_FCPCS1        6
#define R8A78000_CLK_VIPS_VCP5X0        7
#define R8A78000_CLK_VIPS_VCP5X1        8
#define R8A78000_CLK_VIPS_MSYNC         9
#define R8A78000_CLK_MTI                10
#define R8A78000_CLK_ISP0               11
#define R8A78000_CLK_ISP1               12
#define R8A78000_CLK_ISP2               13
#define R8A78000_CLK_ISP3               14
#define R8A78000_CLK_ISPCS0             15
#define R8A78000_CLK_ISPCS1             16
#define R8A78000_CLK_ISPCS2             17
#define R8A78000_CLK_ISPCS3             18
#define R8A78000_CLK_CSITOP0            19
#define R8A78000_CLK_CSITOP1            20
#define R8A78000_CLK_CSITOP2            21
#define R8A78000_CLK_CSITOP3            22
#define R8A78000_CLK_DPTX0              23
#define R8A78000_CLK_DPTX1              24
#define R8A78000_CLK_DPTX2              25
#define R8A78000_CLK_VSPD0              26
#define R8A78000_CLK_VSPD1              27
#define R8A78000_CLK_VSPD2              28
#define R8A78000_CLK_VSPD3              29
#define R8A78000_CLK_VSPD4              30
#define R8A78000_CLK_VSPDB0             31
#define R8A78000_CLK_VSPDB1             32
#define R8A78000_CLK_VSPDB2             33
#define R8A78000_CLK_VSPDB3             34
#define R8A78000_CLK_VSPDB4             35
#define R8A78000_CLK_VSPX0              36
#define R8A78000_CLK_VSPX1              37
#define R8A78000_CLK_VSPX2              38
#define R8A78000_CLK_VSPX3              39
#define R8A78000_CLK_FCPVD0             40
#define R8A78000_CLK_FCPVD1             41
#define R8A78000_CLK_FCPVD2             42
#define R8A78000_CLK_FCPVD3             43
#define R8A78000_CLK_FCPVD4             44
#define R8A78000_CLK_FCPVD5             45
#define R8A78000_CLK_FCPVD6             46
#define R8A78000_CLK_FCPVD7             47
#define R8A78000_CLK_FCPVD8             48
#define R8A78000_CLK_FCPVD9             49
#define R8A78000_CLK_DOC2CH1            50
#define R8A78000_CLK_DOC2CH2            51
#define R8A78000_CLK_FCPVX0             52
#define R8A78000_CLK_FCPVX1             53
#define R8A78000_CLK_FCPVX2             54
#define R8A78000_CLK_FCPVX3             55
#define R8A78000_CLK_VIN000             56
#define R8A78000_CLK_VIN001             57
#define R8A78000_CLK_VIN002             58
#define R8A78000_CLK_VIN003             59
#define R8A78000_CLK_VIN004             60
#define R8A78000_CLK_VIN005             61
#define R8A78000_CLK_VIN006             62
#define R8A78000_CLK_VIN007             63
#define R8A78000_CLK_VIN010             64
#define R8A78000_CLK_VIN011             65
#define R8A78000_CLK_VIN012             66
#define R8A78000_CLK_VIN013             67
#define R8A78000_CLK_VIN014             68
#define R8A78000_CLK_VIN015             69
#define R8A78000_CLK_VIN016             70
#define R8A78000_CLK_VIN017             71
#define R8A78000_CLK_VIN020             72
#define R8A78000_CLK_VIN021             73
#define R8A78000_CLK_VIN022             74
#define R8A78000_CLK_VIN023             75
#define R8A78000_CLK_VIN024             76
#define R8A78000_CLK_VIN025             77
#define R8A78000_CLK_VIN026             78
#define R8A78000_CLK_VIN027             79
#define R8A78000_CLK_VIN030             80
#define R8A78000_CLK_VIN031             81
#define R8A78000_CLK_VIN032             82
#define R8A78000_CLK_VIN033             83
#define R8A78000_CLK_VIN034             84
#define R8A78000_CLK_VIN035             85
#define R8A78000_CLK_VIN036             86
#define R8A78000_CLK_VIN037             87
#define R8A78000_CLK_VIN040             88
#define R8A78000_CLK_VIN041             89
#define R8A78000_CLK_VIN042             90
#define R8A78000_CLK_VIN043             91
#define R8A78000_CLK_VIN044             92
#define R8A78000_CLK_VIN045             93
#define R8A78000_CLK_VIN046             94
#define R8A78000_CLK_VIN047             95
#define R8A78000_CLK_VIN050             96
#define R8A78000_CLK_VIN051             97
#define R8A78000_CLK_VIN052             98
#define R8A78000_CLK_VIN053             99
#define R8A78000_CLK_VIN054             100
#define R8A78000_CLK_VIN055             101
#define R8A78000_CLK_VIN056             102
#define R8A78000_CLK_VIN057             103
#define R8A78000_CLK_VIN060             104
#define R8A78000_CLK_VIN061             105
#define R8A78000_CLK_VIN062             106
#define R8A78000_CLK_VIN063             107
#define R8A78000_CLK_VIN064             108
#define R8A78000_CLK_VIN065             109
#define R8A78000_CLK_VIN066             110
#define R8A78000_CLK_VIN067             111
#define R8A78000_CLK_VIN070             112
#define R8A78000_CLK_VIN071             113
#define R8A78000_CLK_VIN072             114
#define R8A78000_CLK_VIN073             115
#define R8A78000_CLK_VIN074             116
#define R8A78000_CLK_VIN075             117
#define R8A78000_CLK_VIN076             118
#define R8A78000_CLK_VIN077             119
#define R8A78000_CLK_VIN080             120
#define R8A78000_CLK_VIN081             121
#define R8A78000_CLK_VIN082             122
#define R8A78000_CLK_VIN083             123
#define R8A78000_CLK_VIN084             124
#define R8A78000_CLK_VIN085             125
#define R8A78000_CLK_VIN086             126
#define R8A78000_CLK_VIN087             127
#define R8A78000_CLK_VIN090             128
#define R8A78000_CLK_VIN091             129
#define R8A78000_CLK_VIN092             130
#define R8A78000_CLK_VIN093             131
#define R8A78000_CLK_VIN094             132
#define R8A78000_CLK_VIN095             133
#define R8A78000_CLK_VIN096             134
#define R8A78000_CLK_VIN097             135
#define R8A78000_CLK_VIN100             136
#define R8A78000_CLK_VIN101             137
#define R8A78000_CLK_VIN102             138
#define R8A78000_CLK_VIN103             139
#define R8A78000_CLK_VIN104             140
#define R8A78000_CLK_VIN105             141
#define R8A78000_CLK_VIN106             142
#define R8A78000_CLK_VIN107             143
#define R8A78000_CLK_VIN110             144
#define R8A78000_CLK_VIN111             145
#define R8A78000_CLK_VIN112             146
#define R8A78000_CLK_VIN113             147
#define R8A78000_CLK_VIN114             148
#define R8A78000_CLK_VIN115             149
#define R8A78000_CLK_VIN116             150
#define R8A78000_CLK_VIN117             151
#define R8A78000_CLK_DOC2CH0            152
#define R8A78000_CLK_VCON0              153
#define R8A78000_CLK_VCON1              154
#define R8A78000_CLK_VCON2              155
#define R8A78000_CLK_VCON3              156
#define R8A78000_CLK_VCON4              157
#define R8A78000_CLK_VCON5              158
#define R8A78000_CLK_VCON6              159
#define R8A78000_CLK_VCON7              160
#define R8A78000_CLK_VCON8              161
#define R8A78000_CLK_VCON9              162
#define R8A78000_CLK_VSPB0              163
#define R8A78000_CLK_VSPB1              164
#define R8A78000_CLK_VSPB2              165
#define R8A78000_CLK_VSPB3              166
#define R8A78000_CLK_VSPB4              167
#define R8A78000_CLK_VSPI0              168
#define R8A78000_CLK_VSPI1              169
#define R8A78000_CLK_VSPI2              170
#define R8A78000_CLK_VSPI3              171
#define R8A78000_CLK_FCPVB0             172
#define R8A78000_CLK_FCPVB1             173
#define R8A78000_CLK_FCPVB2             174
#define R8A78000_CLK_FCPVB3             175
#define R8A78000_CLK_FCPVB4             176
#define R8A78000_CLK_FCPVI0             177
#define R8A78000_CLK_FCPVI1             178
#define R8A78000_CLK_FCPVI2             179
#define R8A78000_CLK_FCPVI3             180
#define R8A78000_CLK_VIN0               181
#define R8A78000_CLK_VIN1               182
#define R8A78000_CLK_VIN2               183
#define R8A78000_CLK_VIN3               184
#define R8A78000_CLK_VIN4               185
#define R8A78000_CLK_VIN5               186
#define R8A78000_CLK_VIN6               187
#define R8A78000_CLK_VIN7               188
#define R8A78000_CLK_VIN8               189
#define R8A78000_CLK_VIN9               190
#define R8A78000_CLK_VIN10              191
#define R8A78000_CLK_VIN11              192
#define R8A78000_CLK_PERE_GPIODM0       193
#define R8A78000_CLK_PERE_GPIODM1       194
#define R8A78000_CLK_PERE_GPIODM2       195
#define R8A78000_CLK_PERE_GPIODM3       196
#define R8A78000_CLK_RPC                197
#define R8A78000_CLK_UFS0               198
#define R8A78000_CLK_UFS1               199
#define R8A78000_CLK_SDHI0              200
#define R8A78000_CLK_PERW_GPIODM0       201
#define R8A78000_CLK_PERW_GPIODM1       202
#define R8A78000_CLK_PERW_GPIODM2       203
#define R8A78000_CLK_PERW_GPIODM3       204
#define R8A78000_CLK_SCIF0              205
#define R8A78000_CLK_SCIF1              206
#define R8A78000_CLK_SCIF2              207
#define R8A78000_CLK_SCIF3              208
#define R8A78000_CLK_I2C1               209
#define R8A78000_CLK_I2C2               210
#define R8A78000_CLK_I2C3               211
#define R8A78000_CLK_I2C4               212
#define R8A78000_CLK_I2C5               213
#define R8A78000_CLK_I2C6               214
#define R8A78000_CLK_I2C7               215
#define R8A78000_CLK_I2C8               216
#define R8A78000_CLK_I3C0               217
#define R8A78000_CLK_I3C1               218
#define R8A78000_CLK_I3C2               219
#define R8A78000_CLK_MSI4               220
#define R8A78000_CLK_MSI5               221
#define R8A78000_CLK_MSI6               222
#define R8A78000_CLK_MSI7               223
#define R8A78000_CLK_HSCIF0             224
#define R8A78000_CLK_HSCIF1             225
#define R8A78000_CLK_HSCIF2             226
#define R8A78000_CLK_HSCIF3             227
#define R8A78000_CLK_DRI00              228
#define R8A78000_CLK_DRI01              229
#define R8A78000_CLK_DRI10              230
#define R8A78000_CLK_DRI11              231
#define R8A78000_CLK_DRI20              232
#define R8A78000_CLK_DRI21              233
#define R8A78000_CLK_DRI30              234
#define R8A78000_CLK_DRI31              235
#define R8A78000_CLK_DRI40              236
#define R8A78000_CLK_DRI41              237
#define R8A78000_CLK_DRI50              238
#define R8A78000_CLK_DRI51              239
#define R8A78000_CLK_DRI60              240
#define R8A78000_CLK_DRI61              241
#define R8A78000_CLK_DRI70              242
#define R8A78000_CLK_DRI71              243
#define R8A78000_CLK_PWM0               244
#define R8A78000_CLK_TMU1               245
#define R8A78000_CLK_TMU2               246
#define R8A78000_CLK_TMU3               247
#define R8A78000_CLK_TMU4               248
#define R8A78000_CLK_TPU0               249
#define R8A78000_CLK_ADG0               250
#define R8A78000_CLK_ADG1               251
#define R8A78000_CLK_SSI0               252
#define R8A78000_CLK_SSI00              253
#define R8A78000_CLK_SSI01              254
#define R8A78000_CLK_SSI02              255
#define R8A78000_CLK_SSI03              256
#define R8A78000_CLK_SSI04              257
#define R8A78000_CLK_SSI05              258
#define R8A78000_CLK_SSI06              259
#define R8A78000_CLK_SSI07              260
#define R8A78000_CLK_SSI08              261
#define R8A78000_CLK_SSI09              262
#define R8A78000_CLK_SSI1               263
#define R8A78000_CLK_SSI10              264
#define R8A78000_CLK_SSI11              265
#define R8A78000_CLK_SSI12              266
#define R8A78000_CLK_SSI13              267
#define R8A78000_CLK_SSI14              268
#define R8A78000_CLK_SSI15              269
#define R8A78000_CLK_SSI16              270
#define R8A78000_CLK_SSI17              271
#define R8A78000_CLK_SSI18              272
#define R8A78000_CLK_SSI19              273
#define R8A78000_CLK_SCU0               274
#define R8A78000_CLK_SRC00              275
#define R8A78000_CLK_SRC01              276
#define R8A78000_CLK_SRC02              277
#define R8A78000_CLK_SRC03              278
#define R8A78000_CLK_SRC04              279
#define R8A78000_CLK_SRC05              280
#define R8A78000_CLK_SRC06              281
#define R8A78000_CLK_SRC07              282
#define R8A78000_CLK_SRC08              283
#define R8A78000_CLK_SRC09              284
#define R8A78000_CLK_SCU00              285
#define R8A78000_CLK_SCU01              286
#define R8A78000_CLK_DVC00              287
#define R8A78000_CLK_DVC01              288
#define R8A78000_CLK_SCU1               289
#define R8A78000_CLK_SRC10              290
#define R8A78000_CLK_SRC11              291
#define R8A78000_CLK_SRC12              292
#define R8A78000_CLK_SRC13              293
#define R8A78000_CLK_SRC14              294
#define R8A78000_CLK_SRC15              295
#define R8A78000_CLK_SRC16              296
#define R8A78000_CLK_SRC17              297
#define R8A78000_CLK_SRC18              298
#define R8A78000_CLK_SRC19              299
#define R8A78000_CLK_SCU10              300
#define R8A78000_CLK_SCU11              301
#define R8A78000_CLK_DVC10              302
#define R8A78000_CLK_DVC11              303
#define R8A78000_CLK_APD00              304
#define R8A78000_CLK_APD01              305
#define R8A78000_CLK_APD10              306
#define R8A78000_CLK_APD11              307
#define R8A78000_CLK_APD02              308
#define R8A78000_CLK_APD12              309
#define R8A78000_CLK_AULK2P             310
#define R8A78000_CLK_AULK4P             311
#define R8A78000_CLK_XPCS0              312
#define R8A78000_CLK_XPCS1              313
#define R8A78000_CLK_XPCS2              314
#define R8A78000_CLK_XPCS3              315
#define R8A78000_CLK_XPCS4              316
#define R8A78000_CLK_XPCS5              317
#define R8A78000_CLK_XPCS6              318
#define R8A78000_CLK_XPCS7              319
#define R8A78000_CLK_RSW3               320
#define R8A78000_CLK_RSW3TSN            321
#define R8A78000_CLK_RSW3AES            322
#define R8A78000_CLK_RSW3TSNTES0        323
#define R8A78000_CLK_RSW3TSNTES1        324
#define R8A78000_CLK_RSW3TSNTES2        325
#define R8A78000_CLK_RSW3TSNTES3        326
#define R8A78000_CLK_RSW3TSNTES4        327
#define R8A78000_CLK_RSW3TSNTES5        328
#define R8A78000_CLK_RSW3TSNTES6        329
#define R8A78000_CLK_RSW3TSNTES7        330
#define R8A78000_CLK_RSW3MFWD           331
#define R8A78000_CLK_HSCN_GPIODM0       332
#define R8A78000_CLK_HSCN_GPIODM1       333
#define R8A78000_CLK_HSCN_GPIODM2       334
#define R8A78000_CLK_HSCN_GPIODM3       335
#define R8A78000_CLK_US30               336
#define R8A78000_CLK_US31               337
#define R8A78000_CLK_US32               338
#define R8A78000_CLK_US33               339
#define R8A78000_CLK_MPPHY01            340
#define R8A78000_CLK_MPPHY11            341
#define R8A78000_CLK_MPPHY21            342
#define R8A78000_CLK_MPPHY31            343
#define R8A78000_CLK_MPPHY02            344
#define R8A78000_CLK_PCI401             345
#define R8A78000_CLK_PCI411             346
#define R8A78000_CLK_PCI402             347
#define R8A78000_CLK_PCI412             348
#define R8A78000_CLK_CR52TOP0           349
#define R8A78000_CLK_CR52TOP0_BD        350
#define R8A78000_CLK_CR52CORE0          351
#define R8A78000_CLK_CR52CORE0_PO       352
#define R8A78000_CLK_CR52CORE1          353
#define R8A78000_CLK_CR52CORE1_PO       354
#define R8A78000_CLK_CR52SHADOW0        355
#define R8A78000_CLK_CR52SHADOW0_PO     356
#define R8A78000_CLK_CR52SHADOW1        357
#define R8A78000_CLK_CR52SHADOW1_PO     358
#define R8A78000_CLK_CR52TOP1           359
#define R8A78000_CLK_CR52TOP1_DEB       360
#define R8A78000_CLK_CR52CORE2          361
#define R8A78000_CLK_CR52CORE2_PO       362
#define R8A78000_CLK_CR52CORE3          363
#define R8A78000_CLK_CR52CORE3_PO       364
#define R8A78000_CLK_CR52SHADOW2        365
#define R8A78000_CLK_CR52SHADOW2_PO     366
#define R8A78000_CLK_CR52SHADOW3        367
#define R8A78000_CLK_CR52SHADOW3_PO     368
#define R8A78000_CLK_CR52TOP2           369
#define R8A78000_CLK_CR52TOP2_DB        370
#define R8A78000_CLK_CR52CORE4          371
#define R8A78000_CLK_CR52CORE4_PO       372
#define R8A78000_CLK_CR52CORE5          373
#define R8A78000_CLK_CR52CORE5_PO       374
#define R8A78000_CLK_CR52SHADOW4        375
#define R8A78000_CLK_CR52SHADOW4_PO     376
#define R8A78000_CLK_CR52SHADOW5        377
#define R8A78000_CLK_CR52SHADOW5_PO     378
#define R8A78000_CLK_CSD                379
#define R8A78000_CLK_OSTM0              380
#define R8A78000_CLK_OSTM1              381
#define R8A78000_CLK_OSTM2              382
#define R8A78000_CLK_OSTM3              383
#define R8A78000_CLK_OSTM4              384
#define R8A78000_CLK_OSTM5              385
#define R8A78000_CLK_TMU0               386
#define R8A78000_CLK_WDT0               387
#define R8A78000_CLK_WDT1               388
#define R8A78000_CLK_WWDT00             389
#define R8A78000_CLK_WWDT10             390
#define R8A78000_CLK_WWDT20             391
#define R8A78000_CLK_WWDT30             392
#define R8A78000_CLK_WWDT40             393
#define R8A78000_CLK_WWDT50             394
#define R8A78000_CLK_WWDT60             395
#define R8A78000_CLK_WWDT70             396
#define R8A78000_CLK_WWDT80             397
#define R8A78000_CLK_WWDT90             398
#define R8A78000_CLK_WWDT100            399
#define R8A78000_CLK_WWDT110            400
#define R8A78000_CLK_WWDT120            401
#define R8A78000_CLK_WWDT130            402
#define R8A78000_CLK_WWDT01             403
#define R8A78000_CLK_WWDT11             404
#define R8A78000_CLK_WWDT21             405
#define R8A78000_CLK_WWDT31             406
#define R8A78000_CLK_WWDT41             407
#define R8A78000_CLK_WWDT51             408
#define R8A78000_CLK_WWDT61             409
#define R8A78000_CLK_WWDT71             410
#define R8A78000_CLK_WWDT81             411
#define R8A78000_CLK_WWDT91             412
#define R8A78000_CLK_WWDT101            413
#define R8A78000_CLK_WWDT111            414
#define R8A78000_CLK_WWDT121            415
#define R8A78000_CLK_WWDT131            416
#define R8A78000_CLK_WWDT140            417
#define R8A78000_CLK_WWDT141            418
#define R8A78000_CLK_WWDT150            419
#define R8A78000_CLK_WWDT151            420
#define R8A78000_CLK_WWDT160            421
#define R8A78000_CLK_WWDT161            422
#define R8A78000_CLK_WWDT170            423
#define R8A78000_CLK_WWDT171            424
#define R8A78000_CLK_WWDT180            425
#define R8A78000_CLK_WWDT181            426
#define R8A78000_CLK_WWDT190            427
#define R8A78000_CLK_WWDT191            428
#define R8A78000_CLK_SWDT0              429
#define R8A78000_CLK_SWDT1              430
#define R8A78000_CLK_WCRC0              431
#define R8A78000_CLK_WCRC1              432
#define R8A78000_CLK_WCRC2              433
#define R8A78000_CLK_WCRC3              434
#define R8A78000_CLK_WCRC4              435
#define R8A78000_CLK_WCRC5              436
#define R8A78000_CLK_WCRC6              437
#define R8A78000_CLK_WCRC7              438
#define R8A78000_CLK_WCRC8              439
#define R8A78000_CLK_WCRC9              440
#define R8A78000_CLK_WCRC10             441
#define R8A78000_CLK_CRC0               442
#define R8A78000_CLK_CRC1               443
#define R8A78000_CLK_CRC2               444
#define R8A78000_CLK_CRC3               445
#define R8A78000_CLK_CRC4               446
#define R8A78000_CLK_CRC5               447
#define R8A78000_CLK_CRC6               448
#define R8A78000_CLK_CRC7               449
#define R8A78000_CLK_CRC8               450
#define R8A78000_CLK_CRC9               451
#define R8A78000_CLK_CRC10              452
#define R8A78000_CLK_KCRC0              453
#define R8A78000_CLK_KCRC1              454
#define R8A78000_CLK_KCRC2              455
#define R8A78000_CLK_KCRC3              456
#define R8A78000_CLK_KCRC4              457
#define R8A78000_CLK_KCRC5              458
#define R8A78000_CLK_KCRC6              459
#define R8A78000_CLK_KCRC7              460
#define R8A78000_CLK_KCRC8              461
#define R8A78000_CLK_KCRC9              462
#define R8A78000_CLK_KCRC10             463
#define R8A78000_CLK_INTAP0             464
#define R8A78000_CLK_INTTP              465
#define R8A78000_CLK_INTAP1             466
#define R8A78000_CLK_RTDM0              467
#define R8A78000_CLK_RTDM1              468
#define R8A78000_CLK_RTDM2              469
#define R8A78000_CLK_RTDM3              470
#define R8A78000_CLK_FBDM0              471
#define R8A78000_CLK_FBDM1              472
#define R8A78000_CLK_SECROM             473
#define R8A78000_CLK_CRAC0              474
#define R8A78000_CLK_CRAC1              475
#define R8A78000_CLK_CRAC2              476
#define R8A78000_CLK_CRAC3              477
#define R8A78000_CLK_CRAC4              478
#define R8A78000_CLK_CRAC5              479
#define R8A78000_CLK_CRAC6              480
#define R8A78000_CLK_CRAC7              481
#define R8A78000_CLK_CRAC8              482
#define R8A78000_CLK_CRAC9              483
#define R8A78000_CLK_CRAC10             484
#define R8A78000_CLK_CRAC11             485
#define R8A78000_CLK_CRAC12             486
#define R8A78000_CLK_CRAC13             487
#define R8A78000_CLK_CRAC14             488
#define R8A78000_CLK_CRAC15             489
#define R8A78000_CLK_CRAC16             490
#define R8A78000_CLK_CRAC17             491
#define R8A78000_CLK_CRAC18             492
#define R8A78000_CLK_CRAC19             493
#define R8A78000_CLK_APRTMGINT0         494
#define R8A78000_CLK_APRTMGINT1         495
#define R8A78000_CLK_APRTMGINT2         496
#define R8A78000_CLK_APRTMGINT3         497
#define R8A78000_CLK_APRTMGINT4         498
#define R8A78000_CLK_APRTMGINT5         499
#define R8A78000_CLK_APRTMGINT6         500
#define R8A78000_CLK_APRTMGINT7         501
#define R8A78000_CLK_C0RTMG             502
#define R8A78000_CLK_CMN_TOPN_GIC       503
#define R8A78000_CLK_CMN_TOPN_DBG       504
#define R8A78000_CLK_CMN_TOPE           505
#define R8A78000_CLK_CMN_TOPS           506
#define R8A78000_CLK_CMN_TOPW           507
#define R8A78000_CLK_UCIEBG0ICN0        508
#define R8A78000_CLK_UCIEBG0ICN1        509
#define R8A78000_CLK_CSBRG_DSPTOP       510
#define R8A78000_CLK_CSBRG_NPUTOP0      511
#define R8A78000_CLK_CSBRG_NPUTOP1      512
#define R8A78000_CLK_SCMT               513
#define R8A78000_CLK_UCMT               514
#define R8A78000_CLK_CMT0               515
#define R8A78000_CLK_CMT1               516
#define R8A78000_CLK_CMT2               517
#define R8A78000_CLK_CMT3               518
#define R8A78000_CLK_LTM0               519
#define R8A78000_CLK_LTM1               520
#define R8A78000_CLK_LTM2               521
#define R8A78000_CLK_INTAP_CMN2TOP0     522
#define R8A78000_CLK_PCI60BG0           523
#define R8A78000_CLK_PCI60BG1           524
#define R8A78000_CLK_ADVFSC             525
#define R8A78000_CLK_ADVFSC_KEN         526
#define R8A78000_CLK_TSC1               527
#define R8A78000_CLK_UCIE01             528
#define R8A78000_CLK_UCIE02             529
#define R8A78000_CLK_UCIE11             530
#define R8A78000_CLK_UCIE12             531
#define R8A78000_CLK_UCIEBG1DEV0        532
#define R8A78000_CLK_UCIEBG1DEV1        533
#define R8A78000_CLK_UCIEBG1ICN0        534
#define R8A78000_CLK_UCIEBG1ICN1        535
#define R8A78000_CLK_UCIEBG0DEV0        536
#define R8A78000_CLK_UCIEBG0DEV1        537
#define R8A78000_CLK_PCI601             538
#define R8A78000_CLK_PCI611             539
#define R8A78000_CLK_PCI602             540
#define R8A78000_CLK_PCI612             541
#define R8A78000_CLK_IMN_IMR000         542
#define R8A78000_CLK_IMN_IMR001         543
#define R8A78000_CLK_IMN_IMS00          544
#define R8A78000_CLK_IMN_IMS01          545
#define R8A78000_CLK_IMN_IMS02          546
#define R8A78000_CLK_IMN_IMS03          547
#define R8A78000_CLK_IMS_IMR000         548
#define R8A78000_CLK_IMS_IMR001         549
#define R8A78000_CLK_IMS_IMS00          550
#define R8A78000_CLK_IMS_IMS01          551
#define R8A78000_CLK_IMS_IMS02          552
#define R8A78000_CLK_IMS_IMS03          553
#define R8A78000_CLK_RGX_JONES0         554
#define R8A78000_CLK_RGX_MERCER0        555
#define R8A78000_CLK_RGX_MERCER1        556
#define R8A78000_CLK_RGX_MERCER2        557
#define R8A78000_CLK_RGX_MERCER3        558
#define R8A78000_CLK_RGX_TEXAS0         559
#define R8A78000_CLK_RGX_TEXAS1         560
#define R8A78000_CLK_RGX_SWIFT0         561
#define R8A78000_CLK_RGX_SWIFT1         562
#define R8A78000_CLK_RGX_SWIFT2         563
#define R8A78000_CLK_RGX_SWIFT3         564
#define R8A78000_CLK_RGX_JONES1         565
#define R8A78000_CLK_RGX_MERCER4        566
#define R8A78000_CLK_RGX_MERCER5        567
#define R8A78000_CLK_RGX_MERCER6        568
#define R8A78000_CLK_RGX_MERCER7        569
#define R8A78000_CLK_RGX_TEXAS2         570
#define R8A78000_CLK_RGX_TEXAS3         571
#define R8A78000_CLK_RGX_SWIFT4         572
#define R8A78000_CLK_RGX_SWIFT5         573
#define R8A78000_CLK_RGX_SWIFT6         574
#define R8A78000_CLK_RGX_SWIFT7         575
#define R8A78000_CLK_CSDBG_DSP          576
#define R8A78000_CLK_DSPARCSYN_RST      577
#define R8A78000_CLK_DSPARCSYN_AXI      578
#define R8A78000_CLK_DSPARCSYN_REG      579
#define R8A78000_CLK_DSP2_MISC_RST      580
#define R8A78000_CLK_DSP2_MISC_PORES    581
#define R8A78000_CLK_DSP2_MISC_ATRES    582
#define R8A78000_CLK_DSP2_CORE0_RST     583
#define R8A78000_CLK_DSP2_CORE0_CSD     584
#define R8A78000_CLK_DSP2_CORE1_RST     585
#define R8A78000_CLK_DSP2_CORE1_CSD     586
#define R8A78000_CLK_DSP2_CORE2_RST     587
#define R8A78000_CLK_DSP2_CORE2_CSD     588
#define R8A78000_CLK_DSP2_CORE3_RST     589
#define R8A78000_CLK_DSP2_CORE3_CSD     590
#define R8A78000_CLK_DSP_REG0           591
#define R8A78000_CLK_DSP3_MISC_RST      592
#define R8A78000_CLK_DSP3_MISC_PORES    593
#define R8A78000_CLK_DSP3_MISC_ATRES    594
#define R8A78000_CLK_DSP3_CORE0_RST     595
#define R8A78000_CLK_DSP3_CORE0_CSD     596
#define R8A78000_CLK_DSP3_CORE1_RST     597
#define R8A78000_CLK_DSP3_CORE1_CSD     598
#define R8A78000_CLK_DSP3_CORE2_RST     599
#define R8A78000_CLK_DSP3_CORE2_CSD     600
#define R8A78000_CLK_DSP3_CORE3_RST     601
#define R8A78000_CLK_DSP3_CORE3_CSD     602
#define R8A78000_CLK_DSP_REG1           603
#define R8A78000_CLK_DSP4_MISC_RST      604
#define R8A78000_CLK_DSP4_MISC_PORES    605
#define R8A78000_CLK_DSP4_MISC_ATRES    606
#define R8A78000_CLK_DSP4_CORE0_RST     607
#define R8A78000_CLK_DSP4_CORE0_CSD     608
#define R8A78000_CLK_DSP4_CORE1_RST     609
#define R8A78000_CLK_DSP4_CORE1_CSD     610
#define R8A78000_CLK_DSP4_CORE2_RST     611
#define R8A78000_CLK_DSP4_CORE2_CSD     612
#define R8A78000_CLK_DSP4_CORE3_RST     613
#define R8A78000_CLK_DSP4_CORE3_CSD     614
#define R8A78000_CLK_DSP_REG2           615
#define R8A78000_CLK_DSP5_MISC_RST      616
#define R8A78000_CLK_DSP5_MISC_PORES    617
#define R8A78000_CLK_DSP5_MISC_ATRES    618
#define R8A78000_CLK_DSP5_CORE0_RST     619
#define R8A78000_CLK_DSP5_CORE0_CSD     620
#define R8A78000_CLK_DSP5_CORE1_RST     621
#define R8A78000_CLK_DSP5_CORE1_CSD     622
#define R8A78000_CLK_DSP5_CORE2_RST     623
#define R8A78000_CLK_DSP5_CORE2_CSD     624
#define R8A78000_CLK_DSP5_CORE3_RST     625
#define R8A78000_CLK_DSP5_CORE3_CSD     626
#define R8A78000_CLK_DSP_REG3           627
#define R8A78000_CLK_DSP6_MISC_RST      628
#define R8A78000_CLK_DSP6_MISC_PORES    629
#define R8A78000_CLK_DSP6_MISC_ATRES    630
#define R8A78000_CLK_DSP6_CORE0_RST     631
#define R8A78000_CLK_DSP6_CORE0_CSD     632
#define R8A78000_CLK_DSP6_CORE1_RST     633
#define R8A78000_CLK_DSP6_CORE1_CSD     634
#define R8A78000_CLK_DSP6_CORE2_RST     635
#define R8A78000_CLK_DSP6_CORE2_CSD     636
#define R8A78000_CLK_DSP6_CORE3_RST     637
#define R8A78000_CLK_DSP6_CORE3_CSD     638
#define R8A78000_CLK_DSP_REG4           639
#define R8A78000_CLK_FCPRS0             640
#define R8A78000_CLK_FCPRS1             641
#define R8A78000_CLK_FCPRS2             642
#define R8A78000_CLK_FCPRS3             643
#define R8A78000_CLK_FCPRS4             644
#define R8A78000_CLK_FCPRS5             645
#define R8A78000_CLK_FCPRS6             646
#define R8A78000_CLK_FCPRS7             647
#define R8A78000_CLK_FCPRC0             648
#define R8A78000_CLK_FCPRC1             649
#define R8A78000_CLK_FCPRC2             650
#define R8A78000_CLK_FCPRC3             651
#define R8A78000_CLK_FCPRC4             652
#define R8A78000_CLK_FCPRC5             653
#define R8A78000_CLK_FCPRC6             654
#define R8A78000_CLK_FCPRC7             655
#define R8A78000_CLK_NPU0_CSDBG         656
#define R8A78000_CLK_NPU0_ATRES         657
#define R8A78000_CLK_NPU0_RST           658
#define R8A78000_CLK_NPU0_AXI           659
#define R8A78000_CLK_NPU0_NL2           660
#define R8A78000_CLK_NPU0_NL2ARC0       661
#define R8A78000_CLK_NPU0_NL2ARC1       662
#define R8A78000_CLK_NPU0_NL1GRP0       663
#define R8A78000_CLK_NPU0_SL0NL1ARC     664
#define R8A78000_CLK_NPU0_SL1NL1ARC     665
#define R8A78000_CLK_NPU0_SL2NL1ARC     666
#define R8A78000_CLK_NPU0_NL1GRP1       667
#define R8A78000_CLK_NPU0_SL3NL1ARC     668
#define R8A78000_CLK_NPU0_SL4NL1ARC     669
#define R8A78000_CLK_NPU0_SL5NL1ARC     670
#define R8A78000_CLK_NPU0_NL1GRP2       671
#define R8A78000_CLK_NPU0_SL6NL1ARC     672
#define R8A78000_CLK_NPU0_SL7NL1ARC     673
#define R8A78000_CLK_NPU0_SL8NL1ARC     674
#define R8A78000_CLK_NPU0_NL1GRP3       675
#define R8A78000_CLK_NPU0_SL9NL1ARC     676
#define R8A78000_CLK_NPU0_SL10NL1ARC    677
#define R8A78000_CLK_NPU0_SL11NL1ARC    678
#define R8A78000_CLK_NPU0_ARC_REG0      679
#define R8A78000_CLK_NPU0_AON_CORE      680
#define R8A78000_CLK_NPU0_AON_NOC       681
#define R8A78000_CLK_NPU0_AON_CFG       682
#define R8A78000_CLK_NPU0_AON_CSD       683
#define R8A78000_CLK_NPU0_CORE0_GRP0    684
#define R8A78000_CLK_NPU0_CORE1_GRP0    685
#define R8A78000_CLK_NPU0_CORE2_GRP0    686
#define R8A78000_CLK_NPU0_CORE0_GRP1    687
#define R8A78000_CLK_NPU0_CORE1_GRP1    688
#define R8A78000_CLK_NPU0_CORE2_GRP1    689
#define R8A78000_CLK_NPU0_CORE0_GRP2    690
#define R8A78000_CLK_NPU0_CORE1_GRP2    691
#define R8A78000_CLK_NPU0_CORE2_GRP2    692
#define R8A78000_CLK_NPU0_CORE0_GRP3    693
#define R8A78000_CLK_NPU0_CORE1_GRP3    694
#define R8A78000_CLK_NPU0_CORE2_GRP3    695
#define R8A78000_CLK_NPU0_PRES          696
#define R8A78000_CLK_NPU0_REG0          697
#define R8A78000_CLK_NPU0_MISC_RST      698
#define R8A78000_CLK_NPU0_MISC_PRES     699
#define R8A78000_CLK_NPU0_MISC_ATRES    700
#define R8A78000_CLK_NPU0_C0_DSP_RST    701
#define R8A78000_CLK_NPU0_C0_DSP_CSD    702
#define R8A78000_CLK_NPU0_C1_DSP_RST    703
#define R8A78000_CLK_NPU0_C1_DSP_CSD    704
#define R8A78000_CLK_NPU0_C2_DSP_RST    705
#define R8A78000_CLK_NPU0_C2_DSP_CSD    706
#define R8A78000_CLK_NPU0_C3_DSP_RST    707
#define R8A78000_CLK_NPU0_C3_DSP_CSD    708
#define R8A78000_CLK_NPU0_DSP_REG0      709
#define R8A78000_CLK_NPU1_CSDBG         710
#define R8A78000_CLK_NPU1_ATRES         711
#define R8A78000_CLK_NPU1_RST           712
#define R8A78000_CLK_NPU1_AXI           713
#define R8A78000_CLK_NPU1_NL2           714
#define R8A78000_CLK_NPU1_NL2ARC0       715
#define R8A78000_CLK_NPU1_NL2ARC1       716
#define R8A78000_CLK_NPU1_NL1GRP0       717
#define R8A78000_CLK_NPU1_SL0NL1ARC     718
#define R8A78000_CLK_NPU1_SL1NL1ARC     719
#define R8A78000_CLK_NPU1_SL2NL1ARC     720
#define R8A78000_CLK_NPU1_NL1GRP1       721
#define R8A78000_CLK_NPU1_SL3NL1ARC     722
#define R8A78000_CLK_NPU1_SL4NL1ARC     723
#define R8A78000_CLK_NPU1_SL5NL1ARC     724
#define R8A78000_CLK_NPU1_NL1GRP2       725
#define R8A78000_CLK_NPU1_SL6NL1ARC     726
#define R8A78000_CLK_NPU1_SL7NL1ARC     727
#define R8A78000_CLK_NPU1_SL8NL1ARC     728
#define R8A78000_CLK_NPU1_NL1GRP3       729
#define R8A78000_CLK_NPU1_SL9NL1ARC     730
#define R8A78000_CLK_NPU1_SL10NL1ARC    731
#define R8A78000_CLK_NPU1_SL11NL1ARC    732
#define R8A78000_CLK_NPU1_ARC_REG0      733
#define R8A78000_CLK_NPU1_AON_CORE      734
#define R8A78000_CLK_NPU1_AON_NOC       735
#define R8A78000_CLK_NPU1_AON_CFG       736
#define R8A78000_CLK_NPU1_AON_CSD       737
#define R8A78000_CLK_NPU1_CORE0_GRP0    738
#define R8A78000_CLK_NPU1_CORE1_GRP0    739
#define R8A78000_CLK_NPU1_CORE2_GRP0    740
#define R8A78000_CLK_NPU1_CORE0_GRP1    741
#define R8A78000_CLK_NPU1_CORE1_GRP1    742
#define R8A78000_CLK_NPU1_CORE2_GRP1    743
#define R8A78000_CLK_NPU1_CORE0_GRP2    744
#define R8A78000_CLK_NPU1_CORE1_GRP2    745
#define R8A78000_CLK_NPU1_CORE2_GRP2    746
#define R8A78000_CLK_NPU1_CORE0_GRP3    747
#define R8A78000_CLK_NPU1_CORE1_GRP3    748
#define R8A78000_CLK_NPU1_CORE2_GRP3    749
#define R8A78000_CLK_NPU1_PRES          750
#define R8A78000_CLK_NPU1_REG0          751
#define R8A78000_CLK_NPU1_MISC_RST      752
#define R8A78000_CLK_NPU1_MISC_PRES     753
#define R8A78000_CLK_NPU1_MISC_ATRES    754
#define R8A78000_CLK_NPU1_C0_DSP_RST    755
#define R8A78000_CLK_NPU1_C0_DSP_CSD    756
#define R8A78000_CLK_NPU1_C1_DSP_RST    757
#define R8A78000_CLK_NPU1_C1_DSP_CSD    758
#define R8A78000_CLK_NPU1_C2_DSP_RST    759
#define R8A78000_CLK_NPU1_C2_DSP_CSD    760
#define R8A78000_CLK_NPU1_C3_DSP_RST    761
#define R8A78000_CLK_NPU1_C3_DSP_CSD    762
#define R8A78000_CLK_NPU1_DSP_REG0      763
#define R8A78000_CLK_CMN_CORE0_PORES    764
#define R8A78000_CLK_CMN_CORE0_SYRES    765
#define R8A78000_CLK_CMN_CORE1_PORES    766
#define R8A78000_CLK_CMN_CORE1_SYRES    767
#define R8A78000_CLK_CMN_CORE2_PORES    768
#define R8A78000_CLK_CMN_CORE2_SYRES    769
#define R8A78000_CLK_CMN_CORE3_PORES    770
#define R8A78000_CLK_CMN_CORE3_SYRES    771
#define R8A78000_CLK_SCP                772
#define R8A78000_CLK_TAUD0              773
#define R8A78000_CLK_TAUD1              774
#define R8A78000_CLK_TAUJ1              775
#define R8A78000_CLK_MSI0               776
#define R8A78000_CLK_MSI1               777
#define R8A78000_CLK_MSI2               778
#define R8A78000_CLK_MSI3               779
#define R8A78000_CLK_I2C0               780
#define R8A78000_CLK_CANXL0             781
#define R8A78000_CLK_CANXL1             782
#define R8A78000_CLK_LIN00              783
#define R8A78000_CLK_LIN01              784
#define R8A78000_CLK_LIN02              785
#define R8A78000_CLK_LIN03              786
#define R8A78000_CLK_LIN10              787
#define R8A78000_CLK_LIN11              788
#define R8A78000_CLK_LIN12              789
#define R8A78000_CLK_LIN13              790
#define R8A78000_CLK_LIN20              791
#define R8A78000_CLK_LIN21              792
#define R8A78000_CLK_LIN22              793
#define R8A78000_CLK_LIN23              794
#define R8A78000_CLK_LIN30              795
#define R8A78000_CLK_LIN31              796
#define R8A78000_CLK_LIN32              797
#define R8A78000_CLK_LIN33              798
#define R8A78000_CLK_CANFD0             799
#define R8A78000_CLK_CANFD1             800
#define R8A78000_CLK_FRAY00             801
#define R8A78000_CLK_FRAY01             802
#define R8A78000_CLK_TSYN               803
#define R8A78000_CLK_WWDT200            804
#define R8A78000_CLK_WWDT201            805
#define R8A78000_CLK_SCDM0              806
#define R8A78000_CLK_SCDM1              807
#define R8A78000_CLK_INTSCP             808
#define R8A78000_CLK_TAUJ3              809
#define R8A78000_CLK_RTCA               810
#define R8A78000_CLK_GPIODM0            811
#define R8A78000_CLK_GPIODM1            812
#define R8A78000_CLK_GPIODM2            813
#define R8A78000_CLK_GPIODM3            814
#define R8A78000_CLK_S0D1               815
#define R8A78000_CLK_S0D2               816
#define R8A78000_CLK_S0D4               817
#define R8A78000_CLK_S0D8               818
#define R8A78000_CLK_CL                 819
#define R8A78000_CLK_SGD1               820
#define R8A78000_CLK_SGD2               821
#define R8A78000_CLK_ZT                 822
#define R8A78000_CLK_ZTR                823
#define R8A78000_CLK_CL16M              824
#define R8A78000_CLK_ZB3_TOP_0          825
#define R8A78000_CLK_ZB3_TOP_1          826
#define R8A78000_CLK_ZB3_TOP_2          827
#define R8A78000_CLK_ZB3_TOP_3          828
#define R8A78000_CLK_ZB3_TOP_4          829
#define R8A78000_CLK_ZB3_TOP_5          830
#define R8A78000_CLK_ZB3_TOP_6          831
#define R8A78000_CLK_ZB3_TOP_7          832
#define R8A78000_CLK_ZX                 833
#define R8A78000_CLK_ZC0_APU0           834
#define R8A78000_CLK_ZC1_APU0           835
#define R8A78000_CLK_ZD_APU0            836
#define R8A78000_CLK_ZC0_APU1           837
#define R8A78000_CLK_ZC1_APU1           838
#define R8A78000_CLK_ZD_APU1            839
#define R8A78000_CLK_ZC0_APU2           840
#define R8A78000_CLK_ZC1_APU2           841
#define R8A78000_CLK_ZD_APU2            842
#define R8A78000_CLK_ZC0_APU3           843
#define R8A78000_CLK_ZC1_APU3           844
#define R8A78000_CLK_ZD_APU3            845
#define R8A78000_CLK_ZC0_APU4           846
#define R8A78000_CLK_ZC1_APU4           847
#define R8A78000_CLK_ZD_APU4            848
#define R8A78000_CLK_ZC0_APU5           849
#define R8A78000_CLK_ZC1_APU5           850
#define R8A78000_CLK_ZD_APU5            851
#define R8A78000_CLK_ZC0_APU6           852
#define R8A78000_CLK_ZC1_APU6           853
#define R8A78000_CLK_ZD_APU6            854
#define R8A78000_CLK_ZC0_APU7           855
#define R8A78000_CLK_ZC1_APU7           856
#define R8A78000_CLK_ZD_APU7            857
#define R8A78000_CLK_S0D1_CMN_BUSN      858
#define R8A78000_CLK_S0D2_CMN_BUSN      859
#define R8A78000_CLK_S0D4_CMN_BUSN      860
#define R8A78000_CLK_ZX_CMN_BUSN        861
#define R8A78000_CLK_S0D1_CMN_BUSS      862
#define R8A78000_CLK_S0D2_CMN_BUSS      863
#define R8A78000_CLK_S0D4_CMN_BUSS      864
#define R8A78000_CLK_ZX_CMN_BUSS        865
#define R8A78000_CLK_ZX_CMN_MAIN0       866
#define R8A78000_CLK_ZX_CMN_MAIN1       867
#define R8A78000_CLK_CMN_CORE_GRP2      868
#define R8A78000_CLK_CMN_CORE_GRP3      869
#define R8A78000_CLK_CMN_CCG2_GRP0      870
#define R8A78000_CLK_CMN_CCG2_GRP1      871
#define R8A78000_CLK_CMN_CCG2_GRP2      872
#define R8A78000_CLK_CMN_CCG2_GRP3      873
#define R8A78000_CLK_CMN_CCG3_GRP0      874
#define R8A78000_CLK_CMN_CCG3_GRP1      875
#define R8A78000_CLK_CMN_CCG3_GRP2      876
#define R8A78000_CLK_CMN_CCG3_GRP3      877
#define R8A78000_CLK_SGD1_VIO_OTHER     878
#define R8A78000_CLK_SGD2_VIO_OTHER     879
#define R8A78000_CLK_SGD4_VIO_OTHER     880
#define R8A78000_CLK_SGD8_VIO_OTHER     881
#define R8A78000_CLK_SGD16_VIO_OTHER    882
#define R8A78000_CLK_VCON_VIO_OTHER     883
#define R8A78000_CLK_SGD1_VIO_BUS       884
#define R8A78000_CLK_SGD2_VIO_BUS       885
#define R8A78000_CLK_SGD4_VIO_BUS       886
#define R8A78000_CLK_SGD8_VIO_BUS       887
#define R8A78000_CLK_SGD16_VIO_BUS      888
#define R8A78000_CLK_SGD1_VIO_CSI0      889
#define R8A78000_CLK_SGD2_VIO_CSI0      890
#define R8A78000_CLK_SGD4_VIO_CSI0      891
#define R8A78000_CLK_SGD8_VIO_CSI0      892
#define R8A78000_CLK_SGD16_VIO_CSI0     893
#define R8A78000_CLK_CSI_VIO_CSI0       894
#define R8A78000_CLK_SGD1_VIO_CSI1      895
#define R8A78000_CLK_SGD2_VIO_CSI1      896
#define R8A78000_CLK_SGD4_VIO_CSI1      897
#define R8A78000_CLK_SGD8_VIO_CSI1      898
#define R8A78000_CLK_SGD16_VIO_CSI1     899
#define R8A78000_CLK_CSI_VIO_CSI1       900
#define R8A78000_CLK_SGD1_VIO_CSI2      901
#define R8A78000_CLK_SGD2_VIO_CSI2      902
#define R8A78000_CLK_SGD4_VIO_CSI2      903
#define R8A78000_CLK_SGD8_VIO_CSI2      904
#define R8A78000_CLK_SGD16_VIO_CSI2     905
#define R8A78000_CLK_CSI_VIO_CSI2       906
#define R8A78000_CLK_SGD1_VIO_ISP0      907
#define R8A78000_CLK_SGD2_VIO_ISP0      908
#define R8A78000_CLK_SGD4_VIO_ISP0      909
#define R8A78000_CLK_SGD8_VIO_ISP0      910
#define R8A78000_CLK_SGD16_VIO_ISP0     911
#define R8A78000_CLK_SGD1_VIO_ISP1      912
#define R8A78000_CLK_SGD2_VIO_ISP1      913
#define R8A78000_CLK_SGD4_VIO_ISP1      914
#define R8A78000_CLK_SGD8_VIO_ISP1      915
#define R8A78000_CLK_SGD16_VIO_ISP1     916
#define R8A78000_CLK_SGD1_VIO_ISP2      917
#define R8A78000_CLK_SGD2_VIO_ISP2      918
#define R8A78000_CLK_SGD4_VIO_ISP2      919
#define R8A78000_CLK_SGD8_VIO_ISP2      920
#define R8A78000_CLK_SGD16_VIO_ISP2     921
#define R8A78000_CLK_SGD1_VIO_ISP3      922
#define R8A78000_CLK_SGD2_VIO_ISP3      923
#define R8A78000_CLK_SGD4_VIO_ISP3      924
#define R8A78000_CLK_SGD8_VIO_ISP3      925
#define R8A78000_CLK_SGD16_VIO_ISP3     926
#define R8A78000_CLK_S0D1_VIO_IM0       927
#define R8A78000_CLK_S0D2_VIO_IM0       928
#define R8A78000_CLK_S0D4_VIO_IM0       929
#define R8A78000_CLK_S0D1_VIO_IM1       930
#define R8A78000_CLK_S0D2_VIO_IM1       931
#define R8A78000_CLK_S0D4_VIO_IM1       932
#define R8A78000_CLK_S0D1_VIO_IM2       933
#define R8A78000_CLK_S0D2_VIO_IM2       934
#define R8A78000_CLK_S0D4_VIO_IM2       935
#define R8A78000_CLK_SGD1_OTHER0        936
#define R8A78000_CLK_SGD2_OTHER0        937
#define R8A78000_CLK_SGD4_OTHER0        938
#define R8A78000_CLK_SGD8_OTHER0        939
#define R8A78000_CLK_SGD16_OTHER0       940
#define R8A78000_CLK_VCONCK_OTHER0      941
#define R8A78000_CLK_DP_EXT_OTHER0      942
#define R8A78000_CLK_SGD1_OTHER1        943
#define R8A78000_CLK_SGD2_OTHER1        944
#define R8A78000_CLK_SGD4_OTHER1        945
#define R8A78000_CLK_SGD8_OTHER1        946
#define R8A78000_CLK_SGD16_OTHER1       947
#define R8A78000_CLK_VCONCK_OTHER1      948
#define R8A78000_CLK_DP_EXT_OTHER1      949
#define R8A78000_CLK_SGD1_OTHER2        950
#define R8A78000_CLK_SGD2_OTHER2        951
#define R8A78000_CLK_SGD4_OTHER2        952
#define R8A78000_CLK_SGD8_OTHER2        953
#define R8A78000_CLK_SGD16_OTHER2       954
#define R8A78000_CLK_VCONCK_OTHER2      955
#define R8A78000_CLK_DP_EXT_OTHER2      956
#define R8A78000_CLK_SGD1_VIO_DP_TX     957
#define R8A78000_CLK_SGD2_VIO_DP_TX     958
#define R8A78000_CLK_SGD4_VIO_DP_TX     959
#define R8A78000_CLK_SGD8_VIO_DP_TX     960
#define R8A78000_CLK_SGD16_VIO_DP_TX    961
#define R8A78000_CLK_VCONCK_TX          962
#define R8A78000_CLK_DP_EXT_TX          963
#define R8A78000_CLK_S0D1_VIPN_OTHER    964
#define R8A78000_CLK_S0D2_VIPN_OTHER    965
#define R8A78000_CLK_S0D4_VIPN_OTHER    966
#define R8A78000_CLK_S0D1_VIPS_OTHER    967
#define R8A78000_CLK_S0D2_VIPS_OTHER    968
#define R8A78000_CLK_S0D4_VIPS_OTHER    969
#define R8A78000_CLK_S0D1_IMN_OTHER     970
#define R8A78000_CLK_S0D2_IMN_OTHER     971
#define R8A78000_CLK_S0D4_IMN_OTHER     972
#define R8A78000_CLK_S0D1_IMN_CORE0     973
#define R8A78000_CLK_S0D2_IMN_CORE0     974
#define R8A78000_CLK_S0D4_IMN_CORE0     975
#define R8A78000_CLK_S0D1_IMN_CORE1     976
#define R8A78000_CLK_S0D2_IMN_CORE1     977
#define R8A78000_CLK_S0D4_IMN_CORE1     978
#define R8A78000_CLK_S0D1_IMS_OTHER     979
#define R8A78000_CLK_S0D2_IMS_OTHER     980
#define R8A78000_CLK_S0D4_IMS_OTHER     981
#define R8A78000_CLK_S0D1_IMS_CORE0     982
#define R8A78000_CLK_S0D2_IMS_CORE0     983
#define R8A78000_CLK_S0D4_IMS_CORE0     984
#define R8A78000_CLK_S0D1_IMS_CORE1     985
#define R8A78000_CLK_S0D2_IMS_CORE1     986
#define R8A78000_CLK_S0D4_IMS_CORE1     987
#define R8A78000_CLK_ZGD1_GPC_OTHER     988
#define R8A78000_CLK_ZGD2_GPC_OTHER     989
#define R8A78000_CLK_ZGD4_GPC_OTHER     990
#define R8A78000_CLK_ZGD1_GPC_JONES0    991
#define R8A78000_CLK_ZGD2_GPC_JONES0    992
#define R8A78000_CLK_ZGD4_GPC_JONES0    993
#define R8A78000_CLK_ZGD1_GPC_JONES1    994
#define R8A78000_CLK_ZGD2_GPC_JONES1    995
#define R8A78000_CLK_ZGD4_GPC_JONES1    996
#define R8A78000_CLK_ZGD1_GPC_MER0      997
#define R8A78000_CLK_ZGD2_GPC_MER0      998
#define R8A78000_CLK_ZGD4_GPC_MER0      999
#define R8A78000_CLK_ZGD1_GPC_MER1      1000
#define R8A78000_CLK_ZGD2_GPC_MER1      1001
#define R8A78000_CLK_ZGD4_GPC_MER1      1002
#define R8A78000_CLK_ZGD1_GPC_MER2      1003
#define R8A78000_CLK_ZGD2_GPC_MER2      1004
#define R8A78000_CLK_ZGD4_GPC_MER2      1005
#define R8A78000_CLK_ZGD1_GPC_MER3      1006
#define R8A78000_CLK_ZGD2_GPC_MER3      1007
#define R8A78000_CLK_ZGD4_GPC_MER3      1008
#define R8A78000_CLK_ZGD1_GPC_MER4      1009
#define R8A78000_CLK_ZGD2_GPC_MER4      1010
#define R8A78000_CLK_ZGD4_GPC_MER4      1011
#define R8A78000_CLK_ZGD1_GPC_MER5      1012
#define R8A78000_CLK_ZGD2_GPC_MER5      1013
#define R8A78000_CLK_ZGD4_GPC_MER5      1014
#define R8A78000_CLK_ZGD1_GPC_MER6      1015
#define R8A78000_CLK_ZGD2_GPC_MER6      1016
#define R8A78000_CLK_ZGD4_GPC_MER6      1017
#define R8A78000_CLK_ZGD1_GPC_MER7      1018
#define R8A78000_CLK_ZGD2_GPC_MER7      1019
#define R8A78000_CLK_ZGD4_GPC_MER7      1020
#define R8A78000_CLK_ZGD1_GPC_TEXAS0    1021
#define R8A78000_CLK_ZGD2_GPC_TEXAS0    1022
#define R8A78000_CLK_ZGD4_GPC_TEXAS0    1023
#define R8A78000_CLK_ZGD1_GPC_TEXAS1    1024
#define R8A78000_CLK_ZGD2_GPC_TEXAS1    1025
#define R8A78000_CLK_ZGD4_GPC_TEXAS1    1026
#define R8A78000_CLK_ZGD1_GPC_TEXAS2    1027
#define R8A78000_CLK_ZGD2_GPC_TEXAS2    1028
#define R8A78000_CLK_ZGD4_GPC_TEXAS2    1029
#define R8A78000_CLK_ZGD1_GPC_TEXAS3    1030
#define R8A78000_CLK_ZGD2_GPC_TEXAS3    1031
#define R8A78000_CLK_ZGD4_GPC_TEXAS3    1032
#define R8A78000_CLK_ZGD1_GPC_SWIFT0    1033
#define R8A78000_CLK_ZGD2_GPC_SWIFT0    1034
#define R8A78000_CLK_ZGD4_GPC_SWIFT0    1035
#define R8A78000_CLK_ZGD1_GPC_SWIFT1    1036
#define R8A78000_CLK_ZGD2_GPC_SWIFT1    1037
#define R8A78000_CLK_ZGD4_GPC_SWIFT1    1038
#define R8A78000_CLK_ZGD1_GPC_SWIFT2    1039
#define R8A78000_CLK_ZGD2_GPC_SWIFT2    1040
#define R8A78000_CLK_ZGD4_GPC_SWIFT2    1041
#define R8A78000_CLK_ZGD1_GPC_SWIFT3    1042
#define R8A78000_CLK_ZGD2_GPC_SWIFT3    1043
#define R8A78000_CLK_ZGD4_GPC_SWIFT3    1044
#define R8A78000_CLK_ZGD1_GPC_SWIFT4    1045
#define R8A78000_CLK_ZGD2_GPC_SWIFT4    1046
#define R8A78000_CLK_ZGD4_GPC_SWIFT4    1047
#define R8A78000_CLK_ZGD1_GPC_SWIFT5    1048
#define R8A78000_CLK_ZGD2_GPC_SWIFT5    1049
#define R8A78000_CLK_ZGD4_GPC_SWIFT5    1050
#define R8A78000_CLK_ZGD1_GPC_SWIFT6    1051
#define R8A78000_CLK_ZGD2_GPC_SWIFT6    1052
#define R8A78000_CLK_ZGD4_GPC_SWIFT6    1053
#define R8A78000_CLK_ZGD1_GPC_SWIFT7    1054
#define R8A78000_CLK_ZGD2_GPC_SWIFT7    1055
#define R8A78000_CLK_ZGD4_GPC_SWIFT7    1056
#define R8A78000_CLK_SGD1_DSP_OTHER     1057
#define R8A78000_CLK_SGD2_DSP_OTHER     1058
#define R8A78000_CLK_SGD4_DSP_OTHER     1059
#define R8A78000_CLK_ZT_DSP_OTHER       1060
#define R8A78000_CLK_SGD1_DSP_BUS0      1061
#define R8A78000_CLK_SGD2_DSP_BUS0      1062
#define R8A78000_CLK_SGD4_DSP_BUS0      1063
#define R8A78000_CLK_ZT_DSP_BUS0        1064
#define R8A78000_CLK_SGD1_DSP_BUS1      1065
#define R8A78000_CLK_SGD2_DSP_BUS1      1066
#define R8A78000_CLK_SGD4_DSP_BUS1      1067
#define R8A78000_CLK_ZT_DSP_BUS1        1068
#define R8A78000_CLK_SGD1_DSP2_VPX0     1069
#define R8A78000_CLK_SGD2_DSP2_VPX0     1070
#define R8A78000_CLK_SGD4_DSP2_VPX0     1071
#define R8A78000_CLK_ZT_DSP2_VPX0       1072
#define R8A78000_CLK_WDT_DSP2_VPX0      1073
#define R8A78000_CLK_SGD1_DSP2_VPX1     1074
#define R8A78000_CLK_SGD2_DSP2_VPX1     1075
#define R8A78000_CLK_SGD4_DSP2_VPX1     1076
#define R8A78000_CLK_ZT_DSP2_VPX1       1077
#define R8A78000_CLK_WDT_DSP2_VPX1      1078
#define R8A78000_CLK_SGD1_DSP2_VPX2     1079
#define R8A78000_CLK_SGD2_DSP2_VPX2     1080
#define R8A78000_CLK_SGD4_DSP2_VPX2     1081
#define R8A78000_CLK_ZT_DSP2_VPX2       1082
#define R8A78000_CLK_WDT_DSP2_VPX2      1083
#define R8A78000_CLK_SGD1_DSP2_VPX3     1084
#define R8A78000_CLK_SGD2_DSP2_VPX3     1085
#define R8A78000_CLK_SGD4_DSP2_VPX3     1086
#define R8A78000_CLK_ZT_DSP2_VPX3       1087
#define R8A78000_CLK_WDT_DSP2_VPX3      1088
#define R8A78000_CLK_SGD1_DSP3_VPX0     1089
#define R8A78000_CLK_SGD2_DSP3_VPX0     1090
#define R8A78000_CLK_SGD4_DSP3_VPX0     1091
#define R8A78000_CLK_ZT_DSP3_VPX0       1092
#define R8A78000_CLK_WDT_DSP3_VPX0      1093
#define R8A78000_CLK_SGD1_DSP3_VPX1     1094
#define R8A78000_CLK_SGD2_DSP3_VPX1     1095
#define R8A78000_CLK_SGD4_DSP3_VPX1     1096
#define R8A78000_CLK_ZT_DSP3_VPX1       1097
#define R8A78000_CLK_WDT_DSP3_VPX1      1098
#define R8A78000_CLK_SGD1_DSP3_VPX2     1099
#define R8A78000_CLK_SGD2_DSP3_VPX2     1100
#define R8A78000_CLK_SGD4_DSP3_VPX2     1101
#define R8A78000_CLK_ZT_DSP3_VPX2       1102
#define R8A78000_CLK_WDT_DSP3_VPX2      1103
#define R8A78000_CLK_SGD1_DSP3_VPX3     1104
#define R8A78000_CLK_SGD2_DSP3_VPX3     1105
#define R8A78000_CLK_SGD4_DSP3_VPX3     1106
#define R8A78000_CLK_ZT_DSP3_VPX3       1107
#define R8A78000_CLK_WDT_DSP3_VPX3      1108
#define R8A78000_CLK_SGD1_DSP4_VPX0     1109
#define R8A78000_CLK_SGD2_DSP4_VPX0     1110
#define R8A78000_CLK_SGD4_DSP4_VPX0     1111
#define R8A78000_CLK_ZT_DSP4_VPX0       1112
#define R8A78000_CLK_WDT_DSP4_VPX0      1113
#define R8A78000_CLK_SGD1_DSP4_VPX1     1114
#define R8A78000_CLK_SGD2_DSP4_VPX1     1115
#define R8A78000_CLK_SGD4_DSP4_VPX1     1116
#define R8A78000_CLK_ZT_DSP4_VPX1       1117
#define R8A78000_CLK_WDT_DSP4_VPX1      1118
#define R8A78000_CLK_SGD1_DSP4_VPX2     1119
#define R8A78000_CLK_SGD2_DSP4_VPX2     1120
#define R8A78000_CLK_SGD4_DSP4_VPX2     1121
#define R8A78000_CLK_ZT_DSP4_VPX2       1122
#define R8A78000_CLK_WDT_DSP4_VPX2      1123
#define R8A78000_CLK_SGD1_DSP4_VPX3     1124
#define R8A78000_CLK_SGD2_DSP4_VPX3     1125
#define R8A78000_CLK_SGD4_DSP4_VPX3     1126
#define R8A78000_CLK_ZT_DSP4_VPX3       1127
#define R8A78000_CLK_WDT_DSP4_VPX3      1128
#define R8A78000_CLK_SGD1_DSP5_VPX0     1129
#define R8A78000_CLK_SGD2_DSP5_VPX0     1130
#define R8A78000_CLK_SGD4_DSP5_VPX0     1131
#define R8A78000_CLK_ZT_DSP5_VPX0       1132
#define R8A78000_CLK_WDT_DSP5_VPX0      1133
#define R8A78000_CLK_SGD1_DSP5_VPX1     1134
#define R8A78000_CLK_SGD2_DSP5_VPX1     1135
#define R8A78000_CLK_SGD4_DSP5_VPX1     1136
#define R8A78000_CLK_ZT_DSP5_VPX1       1137
#define R8A78000_CLK_WDT_DSP5_VPX1      1138
#define R8A78000_CLK_SGD1_DSP5_VPX2     1139
#define R8A78000_CLK_SGD2_DSP5_VPX2     1140
#define R8A78000_CLK_SGD4_DSP5_VPX2     1141
#define R8A78000_CLK_ZT_DSP5_VPX2       1142
#define R8A78000_CLK_WDT_DSP5_VPX2      1143
#define R8A78000_CLK_SGD1_DSP5_VPX3     1144
#define R8A78000_CLK_SGD2_DSP5_VPX3     1145
#define R8A78000_CLK_SGD4_DSP5_VPX3     1146
#define R8A78000_CLK_ZT_DSP5_VPX3       1147
#define R8A78000_CLK_WDT_DSP5_VPX3      1148
#define R8A78000_CLK_SGD1_DSP6_VPX0     1149
#define R8A78000_CLK_SGD2_DSP6_VPX0     1150
#define R8A78000_CLK_SGD4_DSP6_VPX0     1151
#define R8A78000_CLK_ZT_DSP6_VPX0       1152
#define R8A78000_CLK_WDT_DSP6_VPX0      1153
#define R8A78000_CLK_SGD1_DSP6_VPX1     1154
#define R8A78000_CLK_SGD2_DSP6_VPX1     1155
#define R8A78000_CLK_SGD4_DSP6_VPX1     1156
#define R8A78000_CLK_ZT_DSP6_VPX1       1157
#define R8A78000_CLK_WDT_DSP6_VPX1      1158
#define R8A78000_CLK_SGD1_DSP6_VPX2     1159
#define R8A78000_CLK_SGD2_DSP6_VPX2     1160
#define R8A78000_CLK_SGD4_DSP6_VPX2     1161
#define R8A78000_CLK_ZT_DSP6_VPX2       1162
#define R8A78000_CLK_WDT_DSP6_VPX2      1163
#define R8A78000_CLK_SGD1_DSP6_VPX3     1164
#define R8A78000_CLK_SGD2_DSP6_VPX3     1165
#define R8A78000_CLK_SGD4_DSP6_VPX3     1166
#define R8A78000_CLK_ZT_DSP6_VPX3       1167
#define R8A78000_CLK_WDT_DSP6_VPX3      1168
#define R8A78000_CLK_SGD1_DSP2_VPXL2    1169
#define R8A78000_CLK_SGD2_DSP2_VPXL2    1170
#define R8A78000_CLK_SGD4_DSP2_VPXL2    1171
#define R8A78000_CLK_ZT_DSP2_VPXL2      1172
#define R8A78000_CLK_WDT_DSP_VPXL2      1173
#define R8A78000_CLK_SGD1_DSP3_VPXL2    1174
#define R8A78000_CLK_SGD2_DSP3_VPXL2    1175
#define R8A78000_CLK_SGD4_DSP3_VPXL2    1176
#define R8A78000_CLK_ZT_DSP3_VPXL2      1177
#define R8A78000_CLK_WDT_DSP3_VPXL2     1178
#define R8A78000_CLK_SGD1_DSP4_VPXL2    1179
#define R8A78000_CLK_SGD2_DSP4_VPXL2    1180
#define R8A78000_CLK_SGD4_DSP4_VPXL2    1181
#define R8A78000_CLK_ZT_DSP4_VPXL2      1182
#define R8A78000_CLK_WDT_DSP4_VPXL2     1183
#define R8A78000_CLK_SGD1_DSP5_VPXL2    1184
#define R8A78000_CLK_SGD2_DSP5_VPXL2    1185
#define R8A78000_CLK_SGD4_DSP5_VPXL2    1186
#define R8A78000_CLK_ZT_DSP5_VPXL2      1187
#define R8A78000_CLK_WDT_DSP5_VPXL2     1188
#define R8A78000_CLK_SGD1_DSP6_VPXL2    1189
#define R8A78000_CLK_SGD2_DSP6_VPXL2    1190
#define R8A78000_CLK_SGD4_DSP6_VPXL2    1191
#define R8A78000_CLK_ZT_DSP6_VPXL2      1192
#define R8A78000_CLK_WDT_DSP6_VPXL2     1193
#define R8A78000_CLK_SGD1_NPU0_OTHER    1194
#define R8A78000_CLK_SGD2_NPU0_OTHER    1195
#define R8A78000_CLK_SGD4_NPU0_OTHER    1196
#define R8A78000_CLK_ZT_NPU0_OTHER      1197
#define R8A78000_CLK_SGD1_NPU0_NPUL2    1198
#define R8A78000_CLK_SGD2_NPU0_NPUL2    1199
#define R8A78000_CLK_SGD4_NPU0_NPUL2    1200
#define R8A78000_CLK_ZT_NPU0_NPU_L2     1201
#define R8A78000_CLK_WDT_NPU0_NPUL2     1202
#define R8A78000_CLK_SGD1_NPU0_VPXL2    1203
#define R8A78000_CLK_SGD2_NPU0_VPXL2    1204
#define R8A78000_CLK_SGD4_NPU0_VPXL2    1205
#define R8A78000_CLK_ZT_NPU0_VPX_L2     1206
#define R8A78000_CLK_WDT_NPU0_VPX_L2    1207
#define R8A78000_CLK_SGD1_N0_GRP0_C0    1208
#define R8A78000_CLK_SGD2_N0_GRP0_C0    1209
#define R8A78000_CLK_SGD4_N0_GRP0_C0    1210
#define R8A78000_CLK_ZT_N0_GRP0_C0      1211
#define R8A78000_CLK_WDT_N0_GRP0_C0     1212
#define R8A78000_CLK_SGD1_N0_GRP0_C1    1213
#define R8A78000_CLK_SGD2_N0_GRP0_C1    1214
#define R8A78000_CLK_SGD4_N0_GRP0_C1    1215
#define R8A78000_CLK_ZT_N0_GRP0_C1      1216
#define R8A78000_CLK_WDT_N0_GRP0_C1     1217
#define R8A78000_CLK_SGD1_N0_GRP0_C2    1218
#define R8A78000_CLK_SGD2_N0_GRP0_C2    1219
#define R8A78000_CLK_SGD4_N0_GRP0_C2    1220
#define R8A78000_CLK_ZT_N0_GRP0_C2      1221
#define R8A78000_CLK_WDT_N0_C02         1222
#define R8A78000_CLK_SGD1_N0_GRP1_C0    1223
#define R8A78000_CLK_SGD2_N0_GRP1_C0    1224
#define R8A78000_CLK_SGD4_N0_GRP1_C0    1225
#define R8A78000_CLK_ZT_N0_GRP1_C0      1226
#define R8A78000_CLK_WDT_N0_GRP1_C0     1227
#define R8A78000_CLK_SGD1_N0_GRP1_C1    1228
#define R8A78000_CLK_SGD2_N0_GRP1_C1    1229
#define R8A78000_CLK_SGD4_N0_GRP1_C1    1230
#define R8A78000_CLK_ZT_N0_GRP1_C1      1231
#define R8A78000_CLK_WDT_N0_GRP1_C1     1232
#define R8A78000_CLK_SGD1_N0_GRP1_C2    1233
#define R8A78000_CLK_SGD2_N0_GRP1_C2    1234
#define R8A78000_CLK_SGD4_N0_GRP1_C2    1235
#define R8A78000_CLK_ZT_N0_GRP1_C2      1236
#define R8A78000_CLK_WDT_N0_GRP1_C2     1237
#define R8A78000_CLK_SGD1_N0_GRP2_C0    1238
#define R8A78000_CLK_SGD2_N0_GRP2_C0    1239
#define R8A78000_CLK_SGD4_N0_GRP2_C0    1240
#define R8A78000_CLK_ZT_N0_GRP2_C0      1241
#define R8A78000_CLK_WDT_N0_GRP2_C0     1242
#define R8A78000_CLK_SGD1_N0_GRP2_C1    1243
#define R8A78000_CLK_SGD2_N0_GRP2_C1    1244
#define R8A78000_CLK_SGD4_N0_GRP2_C1    1245
#define R8A78000_CLK_ZT_N0_GRP2_C1      1246
#define R8A78000_CLK_WDT_N0_GRP2_C1     1247
#define R8A78000_CLK_SGD1_N0_GRP2_C2    1248
#define R8A78000_CLK_SGD2_N0_GRP2_C2    1249
#define R8A78000_CLK_SGD4_N0_GRP2_C2    1250
#define R8A78000_CLK_ZT_N0_GRP2_C2      1251
#define R8A78000_CLK_WDT_N0_GRP2_C2     1252
#define R8A78000_CLK_SGD1_N0_GRP3_C0    1253
#define R8A78000_CLK_SGD2_N0_GRP3_C0    1254
#define R8A78000_CLK_SGD4_N0_GRP3_C0    1255
#define R8A78000_CLK_ZT_N0_GRP3_C0      1256
#define R8A78000_CLK_WDT_N0_GRP3_C0     1257
#define R8A78000_CLK_SGD1_N0_GRP3_C1    1258
#define R8A78000_CLK_SGD2_N0_GRP3_C1    1259
#define R8A78000_CLK_SGD4_N0_GRP3_C1    1260
#define R8A78000_CLK_ZT_N0_GRP3_C1      1261
#define R8A78000_CLK_WDT_N0_GRP3_C1     1262
#define R8A78000_CLK_SGD1_N0_GRP3_C2    1263
#define R8A78000_CLK_SGD2_N0_GRP3_C2    1264
#define R8A78000_CLK_SGD4_N0_GRP3_C2    1265
#define R8A78000_CLK_ZT_N0_GRP3_C2      1266
#define R8A78000_CLK_WDT_N0_GRP3_C2     1267
#define R8A78000_CLK_SGD1_N0_VPX_C0     1268
#define R8A78000_CLK_SGD2_N0_VPX_C0     1269
#define R8A78000_CLK_SGD4_N0_VPX_C0     1270
#define R8A78000_CLK_ZT_N0_VPX_C0       1271
#define R8A78000_CLK_WDT_N0_VPX_C0      1272
#define R8A78000_CLK_SGD1_N0_VPX_C1     1273
#define R8A78000_CLK_SGD2_N0_VPX_C1     1274
#define R8A78000_CLK_SGD4_N0_VPX_C1     1275
#define R8A78000_CLK_ZT_N0_VPX_C1       1276
#define R8A78000_CLK_WDT_N0_VPX_C1      1277
#define R8A78000_CLK_SGD1_N0_VPX_C2     1278
#define R8A78000_CLK_SGD2_N0_VPX_C2     1279
#define R8A78000_CLK_SGD4_N0_VPX_C2     1280
#define R8A78000_CLK_ZT_N0_VPX_C2       1281
#define R8A78000_CLK_WDT_N0_VPX_C2      1282
#define R8A78000_CLK_SGD1_N0_VPX_C3     1283
#define R8A78000_CLK_SGD2_N0_VPX_C3     1284
#define R8A78000_CLK_SGD4_N0_VPX_C3     1285
#define R8A78000_CLK_ZT_N0_VPX_C3       1286
#define R8A78000_CLK_WDT_N0_VPX_C3      1287
#define R8A78000_CLK_SGD1_NPU1_OTHER    1288
#define R8A78000_CLK_SGD2_NPU1_OTHER    1289
#define R8A78000_CLK_SGD4_NPU1_OTHER    1290
#define R8A78000_CLK_ZT_NPU1_OTHER      1291
#define R8A78000_CLK_SGD1_NPU1_NPUL2    1292
#define R8A78000_CLK_SGD2_NPU1_NPUL2    1293
#define R8A78000_CLK_SGD4_NPU1_NPUL2    1294
#define R8A78000_CLK_ZT_NPU1_NPU_L2     1295
#define R8A78000_CLK_WDT_NPU1_NPUL2     1296
#define R8A78000_CLK_SGD1_NPU1_VPXL2    1297
#define R8A78000_CLK_SGD2_NPU1_VPXL2    1298
#define R8A78000_CLK_SGD4_NPU1_VPXL2    1299
#define R8A78000_CLK_ZT_NPU1_VPX_L2     1300
#define R8A78000_CLK_WDT_N1_VPX_L2      1301
#define R8A78000_CLK_SGD1_N1_GRP0_C0    1302
#define R8A78000_CLK_SGD2_N1_GRP0_C0    1303
#define R8A78000_CLK_SGD4_N1_GRP0_C0    1304
#define R8A78000_CLK_ZT_N1_GRP0_C0      1305
#define R8A78000_CLK_WDT_N1_GRP0_C0     1306
#define R8A78000_CLK_SGD1_N1_GRP0_C1    1307
#define R8A78000_CLK_SGD2_N1_GRP0_C1    1308
#define R8A78000_CLK_SGD4_N1_GRP0_C1    1309
#define R8A78000_CLK_ZT_N1_GRP0_C1      1310
#define R8A78000_CLK_WDT_N1_GRP0_C1     1311
#define R8A78000_CLK_SGD1_N1_GRP0_C2    1312
#define R8A78000_CLK_SGD2_N1_GRP0_C2    1313
#define R8A78000_CLK_SGD4_N1_GRP0_C2    1314
#define R8A78000_CLK_ZT_N1_GRP0_C2      1315
#define R8A78000_CLK_WDT_N1_C02         1316
#define R8A78000_CLK_SGD1_N1_GRP1_C0    1317
#define R8A78000_CLK_SGD2_N1_GRP1_C0    1318
#define R8A78000_CLK_SGD4_N1_GRP1_C0    1319
#define R8A78000_CLK_ZT_N1_GRP1_C0      1320
#define R8A78000_CLK_WDT_N1_GRP1_C0     1321
#define R8A78000_CLK_SGD1_N1_GRP1_C1    1322
#define R8A78000_CLK_SGD2_N1_GRP1_C1    1323
#define R8A78000_CLK_SGD4_N1_GRP1_C1    1324
#define R8A78000_CLK_ZT_N1_GRP1_C1      1325
#define R8A78000_CLK_WDT_N1_GRP1_C1     1326
#define R8A78000_CLK_SGD1_N1_GRP1_C2    1327
#define R8A78000_CLK_SGD2_N1_GRP1_C2    1328
#define R8A78000_CLK_SGD4_N1_GRP1_C2    1329
#define R8A78000_CLK_ZT_N1_GRP1_C2      1330
#define R8A78000_CLK_WDT_N1_GRP1_C2     1331
#define R8A78000_CLK_SGD1_N1_GRP2_C0    1332
#define R8A78000_CLK_SGD2_N1_GRP2_C0    1333
#define R8A78000_CLK_SGD4_N1_GRP2_C0    1334
#define R8A78000_CLK_ZT_N1_GRP2_C0      1335
#define R8A78000_CLK_WDT_N1_GRP2_C0     1336
#define R8A78000_CLK_SGD1_N1_GRP2_C1    1337
#define R8A78000_CLK_SGD2_N1_GRP2_C1    1338
#define R8A78000_CLK_SGD4_N1_GRP2_C1    1339
#define R8A78000_CLK_ZT_N1_GRP2_C1      1340
#define R8A78000_CLK_WDT_N1_GRP2_C1     1341
#define R8A78000_CLK_SGD1_N1_GRP2_C2    1342
#define R8A78000_CLK_SGD2_N1_GRP2_C2    1343
#define R8A78000_CLK_SGD4_N1_GRP2_C2    1344
#define R8A78000_CLK_ZT_N1_GRP2_C2      1345
#define R8A78000_CLK_WDT_N1_GRP2_C2     1346
#define R8A78000_CLK_SGD1_N1_GRP3_C0    1347
#define R8A78000_CLK_SGD2_N1_GRP3_C0    1348
#define R8A78000_CLK_SGD4_N1_GRP3_C0    1349
#define R8A78000_CLK_ZT_N1_GRP3_C0      1350
#define R8A78000_CLK_WDT_N1_GRP3_C0     1351
#define R8A78000_CLK_SGD1_N1_GRP3_C1    1352
#define R8A78000_CLK_SGD2_N1_GRP3_C1    1353
#define R8A78000_CLK_SGD4_N1_GRP3_C1    1354
#define R8A78000_CLK_ZT_N1_GRP3_C1      1355
#define R8A78000_CLK_WDT_N1_GRP3_C1     1356
#define R8A78000_CLK_SGD1_N1_GRP3_C2    1357
#define R8A78000_CLK_SGD2_N1_GRP3_C2    1358
#define R8A78000_CLK_SGD4_N1_GRP3_C2    1359
#define R8A78000_CLK_ZT_N1_GRP3_C2      1360
#define R8A78000_CLK_WDT_N1_GRP3_C2     1361
#define R8A78000_CLK_SGD1_N1_VPX_C0     1362
#define R8A78000_CLK_SGD2_N1_VPX_C0     1363
#define R8A78000_CLK_SGD4_N1_VPX_C0     1364
#define R8A78000_CLK_ZT_N1_VPX_C0       1365
#define R8A78000_CLK_WDT_N1_VPX_C0      1366
#define R8A78000_CLK_SGD1_N1_VPX_C1     1367
#define R8A78000_CLK_SGD2_N1_VPX_C1     1368
#define R8A78000_CLK_SGD4_N1_VPX_C1     1369
#define R8A78000_CLK_ZT_N1_VPX_C1       1370
#define R8A78000_CLK_WDT_N1_VPX_C1      1371
#define R8A78000_CLK_SGD1_N1_VPX_C2     1372
#define R8A78000_CLK_SGD2_N1_VPX_C2     1373
#define R8A78000_CLK_SGD4_N1_VPX_C2     1374
#define R8A78000_CLK_ZT_N1_VPX_C2       1375
#define R8A78000_CLK_WDT_N1_VPX_C2      1376
#define R8A78000_CLK_SGD1_N1_VPX_C3     1377
#define R8A78000_CLK_SGD2_N1_VPX_C3     1378
#define R8A78000_CLK_SGD4_N1_VPX_C3     1379
#define R8A78000_CLK_ZT_N1_VPX_C3       1380
#define R8A78000_CLK_WDT_N1_VPX_C3      1381
#define R8A78000_CLK_ZRD6_RT_MAIN       1382
#define R8A78000_CLK_ZRD12_RT_MAIN      1383
#define R8A78000_CLK_ZRD24_RT_MAIN      1384
#define R8A78000_CLK_ZRD48_RT_MAIN      1385
#define R8A78000_CLK_ZRD96_RT_MAIN      1386
#define R8A78000_CLK_ZT_RT_MAIN         1387
#define R8A78000_CLK_ZTR_RT_MAIN        1388
#define R8A78000_CLK_CL16M_RT_MAIN      1389
#define R8A78000_CLK_SAD1_RT_MAIN       1390
#define R8A78000_CLK_SAD2_RT_MAIN       1391
#define R8A78000_CLK_SAD4_RT_MAIN       1392
#define R8A78000_CLK_ZRD6_RT_DMAC       1393
#define R8A78000_CLK_ZRD12_RT_DMAC      1394
#define R8A78000_CLK_ZRD24_RT_DMAC      1395
#define R8A78000_CLK_ZRD48_RT_DMAC      1396
#define R8A78000_CLK_ZRD96_RT_DMAC      1397
#define R8A78000_CLK_ZT_RT_DMAC         1398
#define R8A78000_CLK_ZTR_RT_DMAC        1399
#define R8A78000_CLK_CL16M_RT_DMAC      1400
#define R8A78000_CLK_ZRD6_RT_CR52SS0    1401
#define R8A78000_CLK_ZRD12_RT_SS0       1402
#define R8A78000_CLK_ZRD24_RT_SS0       1403
#define R8A78000_CLK_ZRD48_RT_SS0       1404
#define R8A78000_CLK_ZRD96_RT_SS0       1405
#define R8A78000_CLK_ZT_RT_CR52SS0      1406
#define R8A78000_CLK_ZTR_RT_CR52SS0     1407
#define R8A78000_CLK_ZR_RT_CR52SS0      1408
#define R8A78000_CLK_ZRD6_RT_CR52SS1    1409
#define R8A78000_CLK_ZRD12_RT_SS1       1410
#define R8A78000_CLK_ZRD24_RT_SS1       1411
#define R8A78000_CLK_ZRD48_RT_SS1       1412
#define R8A78000_CLK_ZRD96_RT_SS1       1413
#define R8A78000_CLK_ZT_RT_CR52SS1      1414
#define R8A78000_CLK_ZTR_RT_CR52SS1     1415
#define R8A78000_CLK_ZR_RT_CR52SS1      1416
#define R8A78000_CLK_ZRD6_RT_CR52SS2    1417
#define R8A78000_CLK_ZRD12_RT_SS2       1418
#define R8A78000_CLK_ZRD24_RT_SS2       1419
#define R8A78000_CLK_ZRD48_RT_SS2       1420
#define R8A78000_CLK_ZRD96_RT_SS2       1421
#define R8A78000_CLK_ZT_RT_CR52SS2      1422
#define R8A78000_CLK_ZTR_RT_CR52SS2     1423
#define R8A78000_CLK_ZR_RT_CR52SS2      1424
#define R8A78000_CLK_ZR_RT_C00          1425
#define R8A78000_CLK_ZR_RT_C01          1426
#define R8A78000_CLK_ZR_RT_C10          1427
#define R8A78000_CLK_ZR_RT_C11          1428
#define R8A78000_CLK_ZR_RT_C20          1429
#define R8A78000_CLK_ZR_RT_C21          1430
#define R8A78000_CLK_ZR_RT_SHADOW00     1431
#define R8A78000_CLK_ZR_RT_SHADOW01     1432
#define R8A78000_CLK_ZR_RT_SHADOW10     1433
#define R8A78000_CLK_ZR_RT_SHADOW11     1434
#define R8A78000_CLK_ZR_RT_SHADOW20     1435
#define R8A78000_CLK_ZR_RT_SHADOW21     1436
#define R8A78000_CLK_ZRD6_RT_SEC        1437
#define R8A78000_CLK_ZRD12_RT_SEC       1438
#define R8A78000_CLK_ZRD24_RT_SEC       1439
#define R8A78000_CLK_ZRD48_RT_SEC       1440
#define R8A78000_CLK_ZRD96_RT_SEC       1441
#define R8A78000_CLK_ZRD6_RT_MEM        1442
#define R8A78000_CLK_ZRD12_RT_MEM       1443
#define R8A78000_CLK_ZRD24_RT_MEM       1444
#define R8A78000_CLK_ZRD48_RT_MEM       1445
#define R8A78000_CLK_ZRD96_RT_MEM       1446
#define R8A78000_CLK_ZT_RT_MEM          1447
#define R8A78000_CLK_ZTR_RT_MEM         1448
#define R8A78000_CLK_BUSD1_SCP_MAIN     1449
#define R8A78000_CLK_BUSD2_SCP_MAIN     1450
#define R8A78000_CLK_BUSD4_SCP_MAIN     1451
#define R8A78000_CLK_BUSD6_SCP_MAIN     1452
#define R8A78000_CLK_BUSD8_SCP_MAIN     1453
#define R8A78000_CLK_BUSD16_SCP_MAIN    1454
#define R8A78000_CLK_BUSD32_SCP_MAIN    1455
#define R8A78000_CLK_CANFD_SCP_MAIN     1456
#define R8A78000_CLK_FRAY_SCP_MAIN      1457
#define R8A78000_CLK_LIN_SCP_MAIN       1458
#define R8A78000_CLK_MSO_SCP_MAIN       1459
#define R8A78000_CLK_CANXL_SCP_MAIN     1460
#define R8A78000_CLK_CL16M_SCP_MAIN     1461
#define R8A78000_CLK_ZT_SCP_MAIN        1462
#define R8A78000_CLK_SGD1_HSCS_OTHER    1463
#define R8A78000_CLK_SGD2_HSCS_OTHER    1464
#define R8A78000_CLK_SGD4_HSCS_OTHER    1465
#define R8A78000_CLK_SGD8_HSCS_OTHER    1466
#define R8A78000_CLK_SGD16_HSCS_OTH     1467
#define R8A78000_CLK_PCICK_HSCS_OTH     1468
#define R8A78000_CLK_SGD1_HSCS_PCI      1469
#define R8A78000_CLK_SGD2_HSCS_PCI      1470
#define R8A78000_CLK_SGD4_HSCS_PCI      1471
#define R8A78000_CLK_SGD8_HSCS_PCI      1472
#define R8A78000_CLK_SGD16_HSCS_PCI     1473
#define R8A78000_CLK_PCICK_HSCS_PC      1474
#define R8A78000_CLK_SGD1_HSCS_UCI0     1475
#define R8A78000_CLK_SGD12_HSCS_UCI0    1476
#define R8A78000_CLK_SGD24_HSCS_UCI0    1477
#define R8A78000_CLK_SGD48_HSCS_UCI0    1478
#define R8A78000_CLK_SGD96_HSCS_UCI0    1479
#define R8A78000_CLK_SB_HSCS_UCI0       1480
#define R8A78000_CLK_CD1_HSCS_UCI0      1481
#define R8A78000_CLK_CD2_HSCS_UCI0      1482
#define R8A78000_CLK_REF_HSCS_UCI0      1483
#define R8A78000_CLK_SGD1_HSCS_UCI1     1484
#define R8A78000_CLK_SGD12_HSCS_UCI1    1485
#define R8A78000_CLK_SGD24_HSCS_UCI1    1486
#define R8A78000_CLK_SGD48_HSCS_UCI1    1487
#define R8A78000_CLK_SGD96_HSCS_UCI1    1488
#define R8A78000_CLK_SB_HSCS_UCI1       1489
#define R8A78000_CLK_CD1_HSCS_UCI1      1490
#define R8A78000_CLK_CD2_HSCS_UCI1      1491
#define R8A78000_CLK_REF_HSCS_UCI1      1492
#define R8A78000_CLK_S0D1_HSCN_OTHER    1493
#define R8A78000_CLK_S0D2_HSCN_OTHER    1494
#define R8A78000_CLK_S0D4_HSCN_OTHER    1495
#define R8A78000_CLK_S0D8_HSCN_OTHER    1496
#define R8A78000_CLK_S0D12_HSCN_OTH     1497
#define R8A78000_CLK_S0D16_HSCN_OTH     1498
#define R8A78000_CLK_S0D24_HSCN_OTH     1499
#define R8A78000_CLK_ZT_HSCN_OTHER      1500
#define R8A78000_CLK_ZTR_HSCN_OTHER     1501
#define R8A78000_CLK_CL16M_HSCN_OTH     1502
#define R8A78000_CLK_S0D1_HSCN_PCI4     1503
#define R8A78000_CLK_S0D2_HSCN_PCI4     1504
#define R8A78000_CLK_S0D4_HSCN_PCI4     1505
#define R8A78000_CLK_S0D8_HSCN_PCI4     1506
#define R8A78000_CLK_S0D12_HSCN_PCI4    1507
#define R8A78000_CLK_S0D16_HSCN_PCI4    1508
#define R8A78000_CLK_S0D24_HSCN_PCI4    1509
#define R8A78000_CLK_ZT_HSCN_PCI4       1510
#define R8A78000_CLK_ZTR_HSCN_PCI4      1511
#define R8A78000_CLK_CL16M_HSCN_PCI4    1512
#define R8A78000_CLK_S0D1_HSCN_USB      1513
#define R8A78000_CLK_S0D2_HSCN_USB      1514
#define R8A78000_CLK_S0D4_HSCN_USB      1515
#define R8A78000_CLK_S0D8_HSCN_USB      1516
#define R8A78000_CLK_S0D12_HSCN_USB     1517
#define R8A78000_CLK_S0D16_HSCN_USB     1518
#define R8A78000_CLK_S0D24_HSCN_USB     1519
#define R8A78000_CLK_ZT_HSCN_USB        1520
#define R8A78000_CLK_ZTR_HSCN_USB       1521
#define R8A78000_CLK_CL16M_HSCN_USB     1522
#define R8A78000_CLK_S0D1_RSW3_MFWD     1523
#define R8A78000_CLK_S0D2_RSW3_MFWD     1524
#define R8A78000_CLK_S0D4_RSW3_MFWD     1525
#define R8A78000_CLK_S0D8_RSW3_MFWD     1526
#define R8A78000_CLK_S0D12_RSW3_MFWD    1527
#define R8A78000_CLK_S0D16_RSW3_MFWD    1528
#define R8A78000_CLK_S0D24_RSW3_MFWD    1529
#define R8A78000_CLK_SUBD1_RSW3_MFWD    1530
#define R8A78000_CLK_SUBD2_RSW3_MFWD    1531
#define R8A78000_CLK_CORE_RSW3_MFWD     1532
#define R8A78000_CLK_S0D1_RSW3_MAIN     1533
#define R8A78000_CLK_S0D2_RSW3_MAIN     1534
#define R8A78000_CLK_S0D4_RSW3_MAIN     1535
#define R8A78000_CLK_S0D8_RSW3_MAIN     1536
#define R8A78000_CLK_S0D12_RSW3_MAIN    1537
#define R8A78000_CLK_S0D16_RSW3_MAIN    1538
#define R8A78000_CLK_S0D24_RSW3_MAIN    1539
#define R8A78000_CLK_SUBD1_RSW3_MAIN    1540
#define R8A78000_CLK_SUBD2_RSW3_MAIN    1541
#define R8A78000_CLK_CORE_RSW3_MAIN     1542
#define R8A78000_CLK_S0D1_RSW3_AES      1543
#define R8A78000_CLK_S0D2_RSW3_AES      1544
#define R8A78000_CLK_S0D4_RSW3_AES      1545
#define R8A78000_CLK_S0D8_RSW3_AES      1546
#define R8A78000_CLK_S0D12_RSW3_AES     1547
#define R8A78000_CLK_S0D16_RSW3_AES     1548
#define R8A78000_CLK_S0D24_RSW3_AES     1549
#define R8A78000_CLK_SUBD1_RSW3_AES     1550
#define R8A78000_CLK_SUBD2_RSW3_AES     1551
#define R8A78000_CLK_CORE_RSW3_AES      1552
#define R8A78000_CLK_S0D1_RSW3_TSN      1553
#define R8A78000_CLK_S0D2_RSW3_TSN      1554
#define R8A78000_CLK_S0D4_RSW3_TSN      1555
#define R8A78000_CLK_S0D8_RSW3_TSN      1556
#define R8A78000_CLK_S0D12_RSW3_TSN     1557
#define R8A78000_CLK_S0D16_RSW3_TSN     1558
#define R8A78000_CLK_S0D24_RSW3_TSN     1559
#define R8A78000_CLK_SUBD1_RSW3_TSN     1560
#define R8A78000_CLK_SUBD2_RSW3_TSN     1561
#define R8A78000_CLK_CORE_RSW3_TSN      1562
#define R8A78000_CLK_S0D1_MM_BUS        1563
#define R8A78000_CLK_S0D2_MM_BUS        1564
#define R8A78000_CLK_S0D4_MM_BUS        1565
#define R8A78000_CLK_S0D1_MM_INIU       1566
#define R8A78000_CLK_S0D2_MM_INIU       1567
#define R8A78000_CLK_S0D4_MM_INIU       1568
#define R8A78000_CLK_S0D1_MM_AXCIDB     1569
#define R8A78000_CLK_S0D2_MM_AXCIDB     1570
#define R8A78000_CLK_S0D4_MM_AXCIDB     1571
#define R8A78000_CLK_S0D1_MM_TNIU0      1572
#define R8A78000_CLK_S0D2_MM_TNIU0      1573
#define R8A78000_CLK_S0D4_MM_TNIU0      1574
#define R8A78000_CLK_S0D1_MM_TNIU1      1575
#define R8A78000_CLK_S0D2_MM_TNIU1      1576
#define R8A78000_CLK_S0D4_MM_TNIU1      1577
#define R8A78000_CLK_S0D1_MM_OTHER      1578
#define R8A78000_CLK_S0D2_MM_OTHER      1579
#define R8A78000_CLK_S0D4_MM_OTHER      1580
#define R8A78000_CLK_S0D1_MM_DBSC0      1581
#define R8A78000_CLK_S0D2_MM_DBSC0      1582
#define R8A78000_CLK_S0D4_MM_DBSC0      1583
#define R8A78000_CLK_ZB3D1_MM_DBSC0     1584
#define R8A78000_CLK_S0D1_MM_DBSC1      1585
#define R8A78000_CLK_S0D2_MM_DBSC1      1586
#define R8A78000_CLK_S0D4_MM_DBSC1      1587
#define R8A78000_CLK_ZB3D1_MM_DBSC1     1588
#define R8A78000_CLK_S0D1_MM_DBSC2      1589
#define R8A78000_CLK_S0D2_MM_DBSC2      1590
#define R8A78000_CLK_S0D4_MM_DBSC2      1591
#define R8A78000_CLK_ZB3D1_MM_DBSC2     1592
#define R8A78000_CLK_S0D1_MM_DBSC3      1593
#define R8A78000_CLK_S0D2_MM_DBSC3      1594
#define R8A78000_CLK_S0D4_MM_DBSC3      1595
#define R8A78000_CLK_ZB3D1_MM_DBSC3     1596
#define R8A78000_CLK_S0D1_MM_DBSC4      1597
#define R8A78000_CLK_S0D2_MM_DBSC4      1598
#define R8A78000_CLK_S0D4_MM_DBSC4      1599
#define R8A78000_CLK_ZB3D1_MM_DBSC4     1600
#define R8A78000_CLK_S0D1_MM_DBSC5      1601
#define R8A78000_CLK_S0D2_MM_DBSC5      1602
#define R8A78000_CLK_S0D4_MM_DBSC5      1603
#define R8A78000_CLK_ZB3D1_MM_DBSC5     1604
#define R8A78000_CLK_S0D1_MM_DBSC6      1605
#define R8A78000_CLK_S0D2_MM_DBSC6      1606
#define R8A78000_CLK_S0D4_MM_DBSC6      1607
#define R8A78000_CLK_ZB3D1_MM_DBSC6     1608
#define R8A78000_CLK_S0D1_MM_DBSC7      1609
#define R8A78000_CLK_S0D2_MM_DBSC7      1610
#define R8A78000_CLK_S0D4_MM_DBSC7      1611
#define R8A78000_CLK_ZB3D1_MM_DBSC7     1612
#define R8A78000_CLK_S0D1_DDR0_MAIN     1613
#define R8A78000_CLK_S0D2_DDR0_MAIN     1614
#define R8A78000_CLK_S0D4_DDR0_MAIN     1615
#define R8A78000_CLK_ZB3D1_DDR0_MAIN    1616
#define R8A78000_CLK_S0D1_DDR1_MAIN     1617
#define R8A78000_CLK_S0D2_DDR1_MAIN     1618
#define R8A78000_CLK_S0D4_DDR1_MAIN     1619
#define R8A78000_CLK_ZB3D1_DDR1_MAIN    1620
#define R8A78000_CLK_S0D1_DDR2_MAIN     1621
#define R8A78000_CLK_S0D2_DDR2_MAIN     1622
#define R8A78000_CLK_S0D4_DDR2_MAIN     1623
#define R8A78000_CLK_ZB3D1_DDR2_MAIN    1624
#define R8A78000_CLK_S0D1_DDR3_MAIN     1625
#define R8A78000_CLK_S0D2_DDR3_MAIN     1626
#define R8A78000_CLK_S0D4_DDR3_MAIN     1627
#define R8A78000_CLK_ZB3D1_DDR3_MAIN    1628
#define R8A78000_CLK_S0D1_DDR4_MAIN     1629
#define R8A78000_CLK_S0D2_DDR4_MAIN     1630
#define R8A78000_CLK_S0D4_DDR4_MAIN     1631
#define R8A78000_CLK_ZB3D1_DDR4_MAIN    1632
#define R8A78000_CLK_S0D1_DDR5_MAIN     1633
#define R8A78000_CLK_S0D2_DDR5_MAIN     1634
#define R8A78000_CLK_S0D4_DDR5_MAIN     1635
#define R8A78000_CLK_ZB3D1_DDR5_MAIN    1636
#define R8A78000_CLK_S0D1_DDR6_MAIN     1637
#define R8A78000_CLK_S0D2_DDR6_MAIN     1638
#define R8A78000_CLK_S0D4_DDR6_MAIN     1639
#define R8A78000_CLK_ZB3D1_DDR6_MAIN    1640
#define R8A78000_CLK_S0D1_DDR7_MAIN     1641
#define R8A78000_CLK_S0D2_DDR7_MAIN     1642
#define R8A78000_CLK_S0D4_DDR7_MAIN     1643
#define R8A78000_CLK_ZB3D1_DDR7_MAIN    1644
#define R8A78000_CLK_SGD4_PERW_MAIN     1645
#define R8A78000_CLK_SGD8_PERW_MAIN     1646
#define R8A78000_CLK_SGD16_PERW_MAIN    1647
#define R8A78000_CLK_SGD32_PERW_MAIN    1648
#define R8A78000_CLK_SGAD4_PERW_M       1649
#define R8A78000_CLK_SGAD8_PERW_M       1650
#define R8A78000_CLK_SGAD16_PERW_M      1651
#define R8A78000_CLK_SGAD32_PERW_M      1652
#define R8A78000_CLK_S0AD8_PERW_M       1653
#define R8A78000_CLK_CL16M_PERW_MAIN    1654
#define R8A78000_CLK_MSOCK_PERW_MAIN    1655
#define R8A78000_CLK_SA_I3C_PERW_M      1656
#define R8A78000_CLK_SGD4_PERW_BUS      1657
#define R8A78000_CLK_SGD8_PERW_BUS      1658
#define R8A78000_CLK_SGD16_PERW_BUS     1659
#define R8A78000_CLK_SGD32_PERW_BUS     1660
#define R8A78000_CLK_SGAD4_PERW_BUS     1661
#define R8A78000_CLK_SGAD8_PERW_BUS     1662
#define R8A78000_CLK_SGAD16_PERW_BUS    1663
#define R8A78000_CLK_SGAD32_PERW_BUS    1664
#define R8A78000_CLK_S0AD8_PERW_BUS     1665
#define R8A78000_CLK_CL16M_PERW_BUS     1666
#define R8A78000_CLK_MSOCK_PERW_BUS     1667
#define R8A78000_CLK_SA_I3C_PERW_BUS    1668
#define R8A78000_CLK_SGD4_MP_MAIN       1669
#define R8A78000_CLK_SGD8_MP_MAIN       1670
#define R8A78000_CLK_SGD16_MP_MAIN      1671
#define R8A78000_CLK_SGD32_MP_MAIN      1672
#define R8A78000_CLK_CL16M_MP_MAIN      1673
#define R8A78000_CLK_ADGHD1_MP_MAIN     1674
#define R8A78000_CLK_ADGHD4_MP_MAIN     1675
#define R8A78000_CLK_SGD4_MP_BUS        1676
#define R8A78000_CLK_SGD8_MP_BUS        1677
#define R8A78000_CLK_SGD16_MP_BUS       1678
#define R8A78000_CLK_SGD32_MP_BUS       1679
#define R8A78000_CLK_CL16M_MP_BUS       1680
#define R8A78000_CLK_ADGHD1CK_MP_BUS    1681
#define R8A78000_CLK_ADGHD4CK_MP_BUS    1682
#define R8A78000_CLK_S0D1_PERE_MAIN     1683
#define R8A78000_CLK_S0D2_PERE_MAIN     1684
#define R8A78000_CLK_S0D3_PERE_MAIN     1685
#define R8A78000_CLK_S0D4_PERE_MAIN     1686
#define R8A78000_CLK_S0D6_PERE_MAIN     1687
#define R8A78000_CLK_S0D8_PERE_MAIN     1688
#define R8A78000_CLK_S0D12_PERE_MAIN    1689
#define R8A78000_CLK_S0D24_PERE_MAIN    1690
#define R8A78000_CLK_SD0H_PERE_MAIN     1691
#define R8A78000_CLK_SD0_PERE_MAIN      1692
#define R8A78000_CLK_RPCCK_PERE_MAIN    1693
#define R8A78000_CLK_RPCD2_PERE_MAIN    1694
#define R8A78000_CLK_CL16M_PERE_MAIN    1695
#define R8A78000_CLK_UFS_PERE_MAIN      1696

 
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RENESAS_CLOCK_R8A78000_H_ */