Zephyr API Documentation
4.4.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
r8a78000_pd.h
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2026 BayLibre, SAS
3
*
4
* SPDX-License-Identifier: Apache-2.0
5
*/
6
7
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_POWER_RENESAS_PD_R8A78000_H_
8
#define ZEPHYR_INCLUDE_DT_BINDINGS_POWER_RENESAS_PD_R8A78000_H_
9
14
16
17
/* Power domain IDs */
18
#define R8A78000_PD_VIPN 0
19
#define R8A78000_PD_VCN 1
20
#define R8A78000_PD_VIPS 2
21
#define R8A78000_PD_VCS 3
22
#define R8A78000_PD_VIO0 4
23
#define R8A78000_PD_VIO1 5
24
#define R8A78000_PD_VIO2 6
25
#define R8A78000_PD_VIO3 7
26
#define R8A78000_PD_DP0 8
27
#define R8A78000_PD_DP1 9
28
#define R8A78000_PD_DP2 10
29
#define R8A78000_PD_VIO4 11
30
#define R8A78000_PD_UFS0 12
31
#define R8A78000_PD_UFS1 13
32
#define R8A78000_PD_PCI4 14
33
#define R8A78000_PD_RSW 15
34
#define R8A78000_PD_USB 16
35
#define R8A78000_PD_MPP0 17
36
#define R8A78000_PD_MPP1 18
37
#define R8A78000_PD_MPP2 19
38
#define R8A78000_PD_MPP3 20
39
#define R8A78000_PD_RC00 21
40
#define R8A78000_PD_RC01 22
41
#define R8A78000_PD_RC02 23
42
#define R8A78000_PD_RC03 24
43
#define R8A78000_PD_RC04 25
44
#define R8A78000_PD_RC05 26
45
#define R8A78000_PD_RC06 27
46
#define R8A78000_PD_RC07 28
47
#define R8A78000_PD_RC08 29
48
#define R8A78000_PD_RC09 30
49
#define R8A78000_PD_RC10 31
50
#define R8A78000_PD_RC11 32
51
#define R8A78000_PD_UCI 33
52
#define R8A78000_PD_PCI6 34
53
#define R8A78000_PD_IM0 35
54
#define R8A78000_PD_IM1 36
55
#define R8A78000_PD_IM2 37
56
#define R8A78000_PD_IM3 38
57
#define R8A78000_PD_GPCB0 39
58
#define R8A78000_PD_GPCA0 40
59
#define R8A78000_PD_GPCB1 41
60
#define R8A78000_PD_GPCA1 42
61
#define R8A78000_PD_DSP2 43
62
#define R8A78000_PD_DSP3 44
63
#define R8A78000_PD_DSP4 45
64
#define R8A78000_PD_DSP5 46
65
#define R8A78000_PD_DSP6 47
66
#define R8A78000_PD_NPU0C00 48
67
#define R8A78000_PD_NPU0C01 49
68
#define R8A78000_PD_NPU0C02 50
69
#define R8A78000_PD_NPU0C03 51
70
#define R8A78000_PD_NPU0C04 52
71
#define R8A78000_PD_NPU0C05 53
72
#define R8A78000_PD_NPU0C06 54
73
#define R8A78000_PD_NPU0C07 55
74
#define R8A78000_PD_NPU0C08 56
75
#define R8A78000_PD_NPU0C09 57
76
#define R8A78000_PD_NPU0C10 58
77
#define R8A78000_PD_NPU0C11 59
78
#define R8A78000_PD_NPU0 60
79
#define R8A78000_PD_DSP0 61
80
#define R8A78000_PD_NPU1C00 62
81
#define R8A78000_PD_NPU1C01 63
82
#define R8A78000_PD_NPU1C02 64
83
#define R8A78000_PD_NPU1C03 65
84
#define R8A78000_PD_NPU1C04 66
85
#define R8A78000_PD_NPU1C05 67
86
#define R8A78000_PD_NPU1C06 68
87
#define R8A78000_PD_NPU1C07 69
88
#define R8A78000_PD_NPU1C08 70
89
#define R8A78000_PD_NPU1C09 71
90
#define R8A78000_PD_NPU1C10 72
91
#define R8A78000_PD_NPU1C11 73
92
#define R8A78000_PD_NPU1 74
93
#define R8A78000_PD_DSP1 75
94
#define R8A78000_PD_AC00 76
95
#define R8A78000_PD_AC01 77
96
#define R8A78000_PD_AC02 78
97
#define R8A78000_PD_AC03 79
98
#define R8A78000_PD_AC04 80
99
#define R8A78000_PD_AC05 81
100
#define R8A78000_PD_AC06 82
101
#define R8A78000_PD_AC07 83
102
#define R8A78000_PD_AC08 84
103
#define R8A78000_PD_AC09 85
104
#define R8A78000_PD_AC10 86
105
#define R8A78000_PD_AC11 87
106
#define R8A78000_PD_AC12 88
107
#define R8A78000_PD_AC13 89
108
#define R8A78000_PD_AC14 90
109
#define R8A78000_PD_AC15 91
110
#define R8A78000_PD_ACL0 92
111
#define R8A78000_PD_ACL1 93
112
#define R8A78000_PD_ACL2 94
113
#define R8A78000_PD_ACL3 95
114
#define R8A78000_PD_AC16 96
115
#define R8A78000_PD_AC17 97
116
#define R8A78000_PD_AC18 98
117
#define R8A78000_PD_AC19 99
118
#define R8A78000_PD_AC20 100
119
#define R8A78000_PD_AC21 101
120
#define R8A78000_PD_AC22 102
121
#define R8A78000_PD_AC23 103
122
#define R8A78000_PD_AC24 104
123
#define R8A78000_PD_AC25 105
124
#define R8A78000_PD_AC26 106
125
#define R8A78000_PD_AC27 107
126
#define R8A78000_PD_AC28 108
127
#define R8A78000_PD_AC29 109
128
#define R8A78000_PD_AC30 110
129
#define R8A78000_PD_AC31 111
130
#define R8A78000_PD_ACL4 112
131
#define R8A78000_PD_ACL5 113
132
#define R8A78000_PD_ACL6 114
133
#define R8A78000_PD_ACL7 115
134
#define R8A78000_PD_CMN 116
135
#define R8A78000_PD_P_RPU_CORE00 117
136
#define R8A78000_PD_P_RPU_CORE01 118
137
#define R8A78000_PD_P_RPU_CORE02 119
138
#define R8A78000_PD_P_RPU_CORE03 120
139
#define R8A78000_PD_P_RPU_CORE04 121
140
#define R8A78000_PD_P_RPU_CORE05 122
141
#define R8A78000_PD_P_RPU_CORE06 123
142
#define R8A78000_PD_P_RPU_CORE07 124
143
#define R8A78000_PD_P_RPU_CORE08 125
144
#define R8A78000_PD_P_RPU_CORE09 126
145
#define R8A78000_PD_P_RPU_CORE10 127
146
#define R8A78000_PD_P_RPU_CORE11 128
147
#define R8A78000_PD_P_APU_CORE00 129
148
#define R8A78000_PD_P_APU_CORE01 130
149
#define R8A78000_PD_P_APU_CORE02 131
150
#define R8A78000_PD_P_APU_CORE03 132
151
#define R8A78000_PD_P_APU_CORE04 133
152
#define R8A78000_PD_P_APU_CORE05 134
153
#define R8A78000_PD_P_APU_CORE06 135
154
#define R8A78000_PD_P_APU_CORE07 136
155
#define R8A78000_PD_P_APU_CORE08 137
156
#define R8A78000_PD_P_APU_CORE09 138
157
#define R8A78000_PD_P_APU_CORE10 139
158
#define R8A78000_PD_P_APU_CORE11 140
159
#define R8A78000_PD_P_APU_CORE12 141
160
#define R8A78000_PD_P_APU_CORE13 142
161
#define R8A78000_PD_P_APU_CORE14 143
162
#define R8A78000_PD_P_APU_CORE15 144
163
#define R8A78000_PD_P_APU_CORE16 145
164
#define R8A78000_PD_P_APU_CORE17 146
165
#define R8A78000_PD_P_APU_CORE18 147
166
#define R8A78000_PD_P_APU_CORE19 148
167
#define R8A78000_PD_P_APU_CORE20 149
168
#define R8A78000_PD_P_APU_CORE21 150
169
#define R8A78000_PD_P_APU_CORE22 151
170
#define R8A78000_PD_P_APU_CORE23 152
171
#define R8A78000_PD_P_APU_CORE24 153
172
#define R8A78000_PD_P_APU_CORE25 154
173
#define R8A78000_PD_P_APU_CORE26 155
174
#define R8A78000_PD_P_APU_CORE27 156
175
#define R8A78000_PD_P_APU_CORE28 157
176
#define R8A78000_PD_P_APU_CORE29 158
177
#define R8A78000_PD_P_APU_CORE30 159
178
#define R8A78000_PD_P_APU_CORE31 160
179
#define R8A78000_PD_P_APU_DSU00 161
180
#define R8A78000_PD_P_APU_DSU01 162
181
#define R8A78000_PD_P_APU_DSU02 163
182
#define R8A78000_PD_P_APU_DSU03 164
183
#define R8A78000_PD_P_APU_DSU04 165
184
#define R8A78000_PD_P_APU_DSU05 166
185
#define R8A78000_PD_P_APU_DSU06 167
186
#define R8A78000_PD_P_APU_DSU07 168
187
#define R8A78000_PD_Q_APU_CORE00 169
188
#define R8A78000_PD_Q_APU_CORE01 170
189
#define R8A78000_PD_Q_APU_CORE02 171
190
#define R8A78000_PD_Q_APU_CORE03 172
191
#define R8A78000_PD_Q_APU_CORE04 173
192
#define R8A78000_PD_Q_APU_CORE05 174
193
#define R8A78000_PD_Q_APU_CORE06 175
194
#define R8A78000_PD_Q_APU_CORE07 176
195
#define R8A78000_PD_Q_APU_CORE08 177
196
#define R8A78000_PD_Q_APU_CORE09 178
197
#define R8A78000_PD_Q_APU_CORE10 179
198
#define R8A78000_PD_Q_APU_CORE11 180
199
#define R8A78000_PD_Q_APU_CORE12 181
200
#define R8A78000_PD_Q_APU_CORE13 182
201
#define R8A78000_PD_Q_APU_CORE14 183
202
#define R8A78000_PD_Q_APU_CORE15 184
203
#define R8A78000_PD_Q_APU_CORE16 185
204
#define R8A78000_PD_Q_APU_CORE17 186
205
#define R8A78000_PD_Q_APU_CORE18 187
206
#define R8A78000_PD_Q_APU_CORE19 188
207
#define R8A78000_PD_Q_APU_CORE20 189
208
#define R8A78000_PD_Q_APU_CORE21 190
209
#define R8A78000_PD_Q_APU_CORE22 191
210
#define R8A78000_PD_Q_APU_CORE23 192
211
#define R8A78000_PD_Q_APU_CORE24 193
212
#define R8A78000_PD_Q_APU_CORE25 194
213
#define R8A78000_PD_Q_APU_CORE26 195
214
#define R8A78000_PD_Q_APU_CORE27 196
215
#define R8A78000_PD_Q_APU_CORE28 197
216
#define R8A78000_PD_Q_APU_CORE29 198
217
#define R8A78000_PD_Q_APU_CORE30 199
218
#define R8A78000_PD_Q_APU_CORE31 200
219
#define R8A78000_PD_P_CMN 201
220
#define R8A78000_PD_Q_CMN00 202
221
#define R8A78000_PD_Q_CMN01 203
222
#define R8A78000_PD_Q_CMN02 204
223
#define R8A78000_PD_Q_CMN03 205
224
#define R8A78000_PD_Q_CMN04 206
225
#define R8A78000_PD_Q_APU_PPU00 207
226
#define R8A78000_PD_Q_APU_PPU01 208
227
#define R8A78000_PD_Q_APU_PPU02 209
228
#define R8A78000_PD_Q_APU_PPU03 210
229
#define R8A78000_PD_Q_APU_PPU04 211
230
#define R8A78000_PD_Q_APU_PPU05 212
231
#define R8A78000_PD_Q_APU_PPU06 213
232
#define R8A78000_PD_Q_APU_PPU07 214
233
#define R8A78000_PD_Q_APU_AT00 215
234
#define R8A78000_PD_Q_APU_AT01 216
235
#define R8A78000_PD_Q_APU_AT02 217
236
#define R8A78000_PD_Q_APU_AT03 218
237
#define R8A78000_PD_Q_APU_AT04 219
238
#define R8A78000_PD_Q_APU_AT05 220
239
#define R8A78000_PD_Q_APU_AT06 221
240
#define R8A78000_PD_Q_APU_AT07 222
241
#define R8A78000_PD_Q_APU_GIC00 223
242
#define R8A78000_PD_Q_APU_GIC01 224
243
#define R8A78000_PD_Q_APU_GIC02 225
244
#define R8A78000_PD_Q_APU_GIC03 226
245
#define R8A78000_PD_Q_APU_GIC04 227
246
#define R8A78000_PD_Q_APU_GIC05 228
247
#define R8A78000_PD_Q_APU_GIC06 229
248
#define R8A78000_PD_Q_APU_GIC07 230
249
#define R8A78000_PD_Q_APU_PERIPH00 231
250
#define R8A78000_PD_Q_APU_PERIPH01 232
251
#define R8A78000_PD_Q_APU_PERIPH02 233
252
#define R8A78000_PD_Q_APU_PERIPH03 234
253
#define R8A78000_PD_Q_APU_PERIPH04 235
254
#define R8A78000_PD_Q_APU_PERIPH05 236
255
#define R8A78000_PD_Q_APU_PERIPH06 237
256
#define R8A78000_PD_Q_APU_PERIPH07 238
257
#define R8A78000_PD_Q_APU_S00 239
258
#define R8A78000_PD_Q_APU_S01 240
259
#define R8A78000_PD_Q_APU_S02 241
260
#define R8A78000_PD_Q_APU_S03 242
261
#define R8A78000_PD_Q_APU_S04 243
262
#define R8A78000_PD_Q_APU_S05 244
263
#define R8A78000_PD_Q_APU_S06 245
264
#define R8A78000_PD_Q_APU_S07 246
265
#define R8A78000_PD_Q_APU_P00 247
266
#define R8A78000_PD_Q_APU_P01 248
267
#define R8A78000_PD_Q_APU_P02 249
268
#define R8A78000_PD_Q_APU_P03 250
269
#define R8A78000_PD_Q_APU_P04 251
270
#define R8A78000_PD_Q_APU_P05 252
271
#define R8A78000_PD_Q_APU_P06 253
272
#define R8A78000_PD_Q_APU_P07 254
273
275
276
#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_POWER_RENESAS_PD_R8A78000_H_ */
zephyr
dt-bindings
power
r8a78000_pd.h
Generated on
for Zephyr API Documentation by
1.16.1
1.16.1