Zephyr API Documentation 4.3.99
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ra6m2-elc.h
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1/*
2 * Copyright (c) 2025 Renesas Electronics Corporation
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
11
12#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_MISC_RENESAS_RA_ELC_RA6M2_ELC_H_
13#define ZEPHYR_INCLUDE_DT_BINDINGS_MISC_RENESAS_RA_ELC_RA6M2_ELC_H_
14
19#define RA_ELC_EVENT_NONE 0x0
20#define RA_ELC_EVENT_ICU_IRQ0 0x001
21#define RA_ELC_EVENT_ICU_IRQ1 0x002
22#define RA_ELC_EVENT_ICU_IRQ2 0x003
23#define RA_ELC_EVENT_ICU_IRQ3 0x004
24#define RA_ELC_EVENT_ICU_IRQ4 0x005
25#define RA_ELC_EVENT_ICU_IRQ5 0x006
26#define RA_ELC_EVENT_ICU_IRQ6 0x007
27#define RA_ELC_EVENT_ICU_IRQ7 0x008
28#define RA_ELC_EVENT_ICU_IRQ8 0x009
29#define RA_ELC_EVENT_ICU_IRQ9 0x00A
30#define RA_ELC_EVENT_ICU_IRQ10 0x00B
31#define RA_ELC_EVENT_ICU_IRQ11 0x00C
32#define RA_ELC_EVENT_ICU_IRQ12 0x00D
33#define RA_ELC_EVENT_ICU_IRQ13 0x00E
34#define RA_ELC_EVENT_ICU_IRQ14 0x00F
35#define RA_ELC_EVENT_ICU_IRQ15 0x010
36#define RA_ELC_EVENT_DMAC0_INT 0x020
37#define RA_ELC_EVENT_DMAC1_INT 0x021
38#define RA_ELC_EVENT_DMAC2_INT 0x022
39#define RA_ELC_EVENT_DMAC3_INT 0x023
40#define RA_ELC_EVENT_DMAC4_INT 0x024
41#define RA_ELC_EVENT_DMAC5_INT 0x025
42#define RA_ELC_EVENT_DMAC6_INT 0x026
43#define RA_ELC_EVENT_DMAC7_INT 0x027
44#define RA_ELC_EVENT_DTC_COMPLETE 0x029
45#define RA_ELC_EVENT_DTC_END 0x02A
46#define RA_ELC_EVENT_ICU_SNOOZE_CANCEL 0x02D
47#define RA_ELC_EVENT_FCU_FIFERR 0x030
48#define RA_ELC_EVENT_FCU_FRDYI 0x031
49#define RA_ELC_EVENT_LVD_LVD1 0x038
50#define RA_ELC_EVENT_LVD_LVD2 0x039
51#define RA_ELC_EVENT_CGC_MOSC_STOP 0x03B
52#define RA_ELC_EVENT_LPM_SNOOZE_REQUEST 0x03C
53#define RA_ELC_EVENT_AGT0_INT 0x040
54#define RA_ELC_EVENT_AGT0_COMPARE_A 0x041
55#define RA_ELC_EVENT_AGT0_COMPARE_B 0x042
56#define RA_ELC_EVENT_AGT1_INT 0x043
57#define RA_ELC_EVENT_AGT1_COMPARE_A 0x044
58#define RA_ELC_EVENT_AGT1_COMPARE_B 0x045
59#define RA_ELC_EVENT_IWDT_UNDERFLOW 0x046
60#define RA_ELC_EVENT_WDT_UNDERFLOW 0x047
61#define RA_ELC_EVENT_RTC_ALARM 0x048
62#define RA_ELC_EVENT_RTC_PERIOD 0x049
63#define RA_ELC_EVENT_RTC_CARRY 0x04A
64#define RA_ELC_EVENT_ADC0_SCAN_END 0x04B
65#define RA_ELC_EVENT_ADC0_SCAN_END_B 0x04C
66#define RA_ELC_EVENT_ADC0_WINDOW_A 0x04D
67#define RA_ELC_EVENT_ADC0_WINDOW_B 0x04E
68#define RA_ELC_EVENT_ADC0_COMPARE_MATCH 0x04F
69#define RA_ELC_EVENT_ADC0_COMPARE_MISMATCH 0x050
70#define RA_ELC_EVENT_ADC1_SCAN_END 0x051
71#define RA_ELC_EVENT_ADC1_SCAN_END_B 0x052
72#define RA_ELC_EVENT_ADC1_WINDOW_A 0x053
73#define RA_ELC_EVENT_ADC1_WINDOW_B 0x054
74#define RA_ELC_EVENT_ADC1_COMPARE_MATCH 0x055
75#define RA_ELC_EVENT_ADC1_COMPARE_MISMATCH 0x056
76#define RA_ELC_EVENT_ACMPHS0_INT 0x057
77#define RA_ELC_EVENT_ACMPHS1_INT 0x058
78#define RA_ELC_EVENT_ACMPHS2_INT 0x059
79#define RA_ELC_EVENT_ACMPHS3_INT 0x05A
80#define RA_ELC_EVENT_ACMPHS4_INT 0x05B
81#define RA_ELC_EVENT_ACMPHS5_INT 0x05C
82#define RA_ELC_EVENT_USBFS_FIFO_0 0x05F
83#define RA_ELC_EVENT_USBFS_FIFO_1 0x060
84#define RA_ELC_EVENT_USBFS_INT 0x061
85#define RA_ELC_EVENT_USBFS_RESUME 0x062
86#define RA_ELC_EVENT_IIC0_RXI 0x063
87#define RA_ELC_EVENT_IIC0_TXI 0x064
88#define RA_ELC_EVENT_IIC0_TEI 0x065
89#define RA_ELC_EVENT_IIC0_ERI 0x066
90#define RA_ELC_EVENT_IIC0_WUI 0x067
91#define RA_ELC_EVENT_IIC1_RXI 0x068
92#define RA_ELC_EVENT_IIC1_TXI 0x069
93#define RA_ELC_EVENT_IIC1_TEI 0x06A
94#define RA_ELC_EVENT_IIC1_ERI 0x06B
95#define RA_ELC_EVENT_IIC2_RXI 0x06D
96#define RA_ELC_EVENT_IIC2_TXI 0x06E
97#define RA_ELC_EVENT_IIC2_TEI 0x06F
98#define RA_ELC_EVENT_IIC2_ERI 0x070
99#define RA_ELC_EVENT_SSI0_TXI 0x072
100#define RA_ELC_EVENT_SSI0_RXI 0x073
101#define RA_ELC_EVENT_SSI0_INT 0x075
102#define RA_ELC_EVENT_SRC_INPUT_FIFO_EMPTY 0x07A
103#define RA_ELC_EVENT_SRC_OUTPUT_FIFO_FULL 0x07B
104#define RA_ELC_EVENT_SRC_OUTPUT_FIFO_OVERFLOW 0x07C
105#define RA_ELC_EVENT_SRC_OUTPUT_FIFO_UNDERFLOW 0x07D
106#define RA_ELC_EVENT_SRC_CONVERSION_END 0x07E
107#define RA_ELC_EVENT_PDC_RECEIVE_DATA_READY 0x07F
108#define RA_ELC_EVENT_PDC_FRAME_END 0x080
109#define RA_ELC_EVENT_PDC_INT 0x081
110#define RA_ELC_EVENT_CTSU_WRITE 0x082
111#define RA_ELC_EVENT_CTSU_READ 0x083
112#define RA_ELC_EVENT_CTSU_END 0x084
113#define RA_ELC_EVENT_KEY_INT 0x085
114#define RA_ELC_EVENT_DOC_INT 0x086
115#define RA_ELC_EVENT_CAC_FREQUENCY_ERROR 0x087
116#define RA_ELC_EVENT_CAC_MEASUREMENT_END 0x088
117#define RA_ELC_EVENT_CAC_OVERFLOW 0x089
118#define RA_ELC_EVENT_CAN0_ERROR 0x08A
119#define RA_ELC_EVENT_CAN0_FIFO_RX 0x08B
120#define RA_ELC_EVENT_CAN0_FIFO_TX 0x08C
121#define RA_ELC_EVENT_CAN0_MAILBOX_RX 0x08D
122#define RA_ELC_EVENT_CAN0_MAILBOX_TX 0x08E
123#define RA_ELC_EVENT_CAN1_ERROR 0x08F
124#define RA_ELC_EVENT_CAN1_FIFO_RX 0x090
125#define RA_ELC_EVENT_CAN1_FIFO_TX 0x091
126#define RA_ELC_EVENT_CAN1_MAILBOX_RX 0x092
127#define RA_ELC_EVENT_CAN1_MAILBOX_TX 0x093
128#define RA_ELC_EVENT_IOPORT_EVENT_1 0x094
129#define RA_ELC_EVENT_IOPORT_EVENT_2 0x095
130#define RA_ELC_EVENT_IOPORT_EVENT_3 0x096
131#define RA_ELC_EVENT_IOPORT_EVENT_4 0x097
132#define RA_ELC_EVENT_ELC_SOFTWARE_EVENT_0 0x098
133#define RA_ELC_EVENT_ELC_SOFTWARE_EVENT_1 0x099
134#define RA_ELC_EVENT_POEG0_EVENT 0x09A
135#define RA_ELC_EVENT_POEG1_EVENT 0x09B
136#define RA_ELC_EVENT_POEG2_EVENT 0x09C
137#define RA_ELC_EVENT_POEG3_EVENT 0x09D
138#define RA_ELC_EVENT_GPT0_CAPTURE_COMPARE_A 0x0B0
139#define RA_ELC_EVENT_GPT0_CAPTURE_COMPARE_B 0x0B1
140#define RA_ELC_EVENT_GPT0_COMPARE_C 0x0B2
141#define RA_ELC_EVENT_GPT0_COMPARE_D 0x0B3
142#define RA_ELC_EVENT_GPT0_COMPARE_E 0x0B4
143#define RA_ELC_EVENT_GPT0_COMPARE_F 0x0B5
144#define RA_ELC_EVENT_GPT0_COUNTER_OVERFLOW 0x0B6
145#define RA_ELC_EVENT_GPT0_COUNTER_UNDERFLOW 0x0B7
146#define RA_ELC_EVENT_GPT0_AD_TRIG_A 0x0B8
147#define RA_ELC_EVENT_GPT0_AD_TRIG_B 0x0B9
148#define RA_ELC_EVENT_GPT1_CAPTURE_COMPARE_A 0x0BA
149#define RA_ELC_EVENT_GPT1_CAPTURE_COMPARE_B 0x0BB
150#define RA_ELC_EVENT_GPT1_COMPARE_C 0x0BC
151#define RA_ELC_EVENT_GPT1_COMPARE_D 0x0BD
152#define RA_ELC_EVENT_GPT1_COMPARE_E 0x0BE
153#define RA_ELC_EVENT_GPT1_COMPARE_F 0x0BF
154#define RA_ELC_EVENT_GPT1_COUNTER_OVERFLOW 0x0C0
155#define RA_ELC_EVENT_GPT1_COUNTER_UNDERFLOW 0x0C1
156#define RA_ELC_EVENT_GPT1_AD_TRIG_A 0x0C2
157#define RA_ELC_EVENT_GPT1_AD_TRIG_B 0x0C3
158#define RA_ELC_EVENT_GPT2_CAPTURE_COMPARE_A 0x0C4
159#define RA_ELC_EVENT_GPT2_CAPTURE_COMPARE_B 0x0C5
160#define RA_ELC_EVENT_GPT2_COMPARE_C 0x0C6
161#define RA_ELC_EVENT_GPT2_COMPARE_D 0x0C7
162#define RA_ELC_EVENT_GPT2_COMPARE_E 0x0C8
163#define RA_ELC_EVENT_GPT2_COMPARE_F 0x0C9
164#define RA_ELC_EVENT_GPT2_COUNTER_OVERFLOW 0x0CA
165#define RA_ELC_EVENT_GPT2_COUNTER_UNDERFLOW 0x0CB
166#define RA_ELC_EVENT_GPT2_AD_TRIG_A 0x0CC
167#define RA_ELC_EVENT_GPT2_AD_TRIG_B 0x0CD
168#define RA_ELC_EVENT_GPT3_CAPTURE_COMPARE_A 0x0CE
169#define RA_ELC_EVENT_GPT3_CAPTURE_COMPARE_B 0x0CF
170#define RA_ELC_EVENT_GPT3_COMPARE_C 0x0D0
171#define RA_ELC_EVENT_GPT3_COMPARE_D 0x0D1
172#define RA_ELC_EVENT_GPT3_COMPARE_E 0x0D2
173#define RA_ELC_EVENT_GPT3_COMPARE_F 0x0D3
174#define RA_ELC_EVENT_GPT3_COUNTER_OVERFLOW 0x0D4
175#define RA_ELC_EVENT_GPT3_COUNTER_UNDERFLOW 0x0D5
176#define RA_ELC_EVENT_GPT3_AD_TRIG_A 0x0D6
177#define RA_ELC_EVENT_GPT3_AD_TRIG_B 0x0D7
178#define RA_ELC_EVENT_GPT4_CAPTURE_COMPARE_A 0x0D8
179#define RA_ELC_EVENT_GPT4_CAPTURE_COMPARE_B 0x0D9
180#define RA_ELC_EVENT_GPT4_COMPARE_C 0x0DA
181#define RA_ELC_EVENT_GPT4_COMPARE_D 0x0DB
182#define RA_ELC_EVENT_GPT4_COMPARE_E 0x0DC
183#define RA_ELC_EVENT_GPT4_COMPARE_F 0x0DD
184#define RA_ELC_EVENT_GPT4_COUNTER_OVERFLOW 0x0DE
185#define RA_ELC_EVENT_GPT4_COUNTER_UNDERFLOW 0x0DF
186#define RA_ELC_EVENT_GPT4_AD_TRIG_A 0x0E0
187#define RA_ELC_EVENT_GPT4_AD_TRIG_B 0x0E1
188#define RA_ELC_EVENT_GPT5_CAPTURE_COMPARE_A 0x0E2
189#define RA_ELC_EVENT_GPT5_CAPTURE_COMPARE_B 0x0E3
190#define RA_ELC_EVENT_GPT5_COMPARE_C 0x0E4
191#define RA_ELC_EVENT_GPT5_COMPARE_D 0x0E5
192#define RA_ELC_EVENT_GPT5_COMPARE_E 0x0E6
193#define RA_ELC_EVENT_GPT5_COMPARE_F 0x0E7
194#define RA_ELC_EVENT_GPT5_COUNTER_OVERFLOW 0x0E8
195#define RA_ELC_EVENT_GPT5_COUNTER_UNDERFLOW 0x0E9
196#define RA_ELC_EVENT_GPT5_AD_TRIG_A 0x0EA
197#define RA_ELC_EVENT_GPT5_AD_TRIG_B 0x0EB
198#define RA_ELC_EVENT_GPT6_CAPTURE_COMPARE_A 0x0EC
199#define RA_ELC_EVENT_GPT6_CAPTURE_COMPARE_B 0x0ED
200#define RA_ELC_EVENT_GPT6_COMPARE_C 0x0EE
201#define RA_ELC_EVENT_GPT6_COMPARE_D 0x0EF
202#define RA_ELC_EVENT_GPT6_COMPARE_E 0x0F0
203#define RA_ELC_EVENT_GPT6_COMPARE_F 0x0F1
204#define RA_ELC_EVENT_GPT6_COUNTER_OVERFLOW 0x0F2
205#define RA_ELC_EVENT_GPT6_COUNTER_UNDERFLOW 0x0F3
206#define RA_ELC_EVENT_GPT6_AD_TRIG_A 0x0F4
207#define RA_ELC_EVENT_GPT6_AD_TRIG_B 0x0F5
208#define RA_ELC_EVENT_GPT7_CAPTURE_COMPARE_A 0x0F6
209#define RA_ELC_EVENT_GPT7_CAPTURE_COMPARE_B 0x0F7
210#define RA_ELC_EVENT_GPT7_COMPARE_C 0x0F8
211#define RA_ELC_EVENT_GPT7_COMPARE_D 0x0F9
212#define RA_ELC_EVENT_GPT7_COMPARE_E 0x0FA
213#define RA_ELC_EVENT_GPT7_COMPARE_F 0x0FB
214#define RA_ELC_EVENT_GPT7_COUNTER_OVERFLOW 0x0FC
215#define RA_ELC_EVENT_GPT7_COUNTER_UNDERFLOW 0x0FD
216#define RA_ELC_EVENT_GPT7_AD_TRIG_A 0x0FE
217#define RA_ELC_EVENT_GPT7_AD_TRIG_B 0x0FF
218#define RA_ELC_EVENT_GPT8_CAPTURE_COMPARE_A 0x100
219#define RA_ELC_EVENT_GPT8_CAPTURE_COMPARE_B 0x101
220#define RA_ELC_EVENT_GPT8_COMPARE_C 0x102
221#define RA_ELC_EVENT_GPT8_COMPARE_D 0x103
222#define RA_ELC_EVENT_GPT8_COMPARE_E 0x104
223#define RA_ELC_EVENT_GPT8_COMPARE_F 0x105
224#define RA_ELC_EVENT_GPT8_COUNTER_OVERFLOW 0x106
225#define RA_ELC_EVENT_GPT8_COUNTER_UNDERFLOW 0x107
226#define RA_ELC_EVENT_GPT9_CAPTURE_COMPARE_A 0x10A
227#define RA_ELC_EVENT_GPT9_CAPTURE_COMPARE_B 0x10B
228#define RA_ELC_EVENT_GPT9_COMPARE_C 0x10C
229#define RA_ELC_EVENT_GPT9_COMPARE_D 0x10D
230#define RA_ELC_EVENT_GPT9_COMPARE_E 0x10E
231#define RA_ELC_EVENT_GPT9_COMPARE_F 0x10F
232#define RA_ELC_EVENT_GPT9_COUNTER_OVERFLOW 0x110
233#define RA_ELC_EVENT_GPT9_COUNTER_UNDERFLOW 0x111
234#define RA_ELC_EVENT_GPT10_CAPTURE_COMPARE_A 0x114
235#define RA_ELC_EVENT_GPT10_CAPTURE_COMPARE_B 0x115
236#define RA_ELC_EVENT_GPT10_COMPARE_C 0x116
237#define RA_ELC_EVENT_GPT10_COMPARE_D 0x117
238#define RA_ELC_EVENT_GPT10_COMPARE_E 0x118
239#define RA_ELC_EVENT_GPT10_COMPARE_F 0x119
240#define RA_ELC_EVENT_GPT10_COUNTER_OVERFLOW 0x11A
241#define RA_ELC_EVENT_GPT10_COUNTER_UNDERFLOW 0x11B
242#define RA_ELC_EVENT_GPT11_CAPTURE_COMPARE_A 0x11E
243#define RA_ELC_EVENT_GPT11_CAPTURE_COMPARE_B 0x11F
244#define RA_ELC_EVENT_GPT11_COMPARE_C 0x120
245#define RA_ELC_EVENT_GPT11_COMPARE_D 0x121
246#define RA_ELC_EVENT_GPT11_COMPARE_E 0x122
247#define RA_ELC_EVENT_GPT11_COMPARE_F 0x123
248#define RA_ELC_EVENT_GPT11_COUNTER_OVERFLOW 0x124
249#define RA_ELC_EVENT_GPT11_COUNTER_UNDERFLOW 0x125
250#define RA_ELC_EVENT_GPT12_CAPTURE_COMPARE_A 0x128
251#define RA_ELC_EVENT_GPT12_CAPTURE_COMPARE_B 0x129
252#define RA_ELC_EVENT_GPT12_COMPARE_C 0x12A
253#define RA_ELC_EVENT_GPT12_COMPARE_D 0x12B
254#define RA_ELC_EVENT_GPT12_COMPARE_E 0x12C
255#define RA_ELC_EVENT_GPT12_COMPARE_F 0x12D
256#define RA_ELC_EVENT_GPT12_COUNTER_OVERFLOW 0x12E
257#define RA_ELC_EVENT_GPT12_COUNTER_UNDERFLOW 0x12F
258#define RA_ELC_EVENT_GPT13_CAPTURE_COMPARE_A 0x132
259#define RA_ELC_EVENT_GPT13_CAPTURE_COMPARE_B 0x133
260#define RA_ELC_EVENT_GPT13_COMPARE_C 0x134
261#define RA_ELC_EVENT_GPT13_COMPARE_D 0x135
262#define RA_ELC_EVENT_GPT13_COMPARE_E 0x136
263#define RA_ELC_EVENT_GPT13_COMPARE_F 0x137
264#define RA_ELC_EVENT_GPT13_COUNTER_OVERFLOW 0x138
265#define RA_ELC_EVENT_GPT13_COUNTER_UNDERFLOW 0x139
266#define RA_ELC_EVENT_OPS_UVW_EDGE 0x150
267#define RA_ELC_EVENT_EDMAC0_EINT 0x163
268#define RA_ELC_EVENT_SCI0_RXI 0x174
269#define RA_ELC_EVENT_SCI0_TXI 0x175
270#define RA_ELC_EVENT_SCI0_TEI 0x176
271#define RA_ELC_EVENT_SCI0_ERI 0x177
272#define RA_ELC_EVENT_SCI0_AM 0x178
273#define RA_ELC_EVENT_SCI0_RXI_OR_ERI 0x179
274#define RA_ELC_EVENT_SCI1_RXI 0x17A
275#define RA_ELC_EVENT_SCI1_TXI 0x17B
276#define RA_ELC_EVENT_SCI1_TEI 0x17C
277#define RA_ELC_EVENT_SCI1_ERI 0x17D
278#define RA_ELC_EVENT_SCI1_AM 0x17E
279#define RA_ELC_EVENT_SCI2_RXI 0x180
280#define RA_ELC_EVENT_SCI2_TXI 0x181
281#define RA_ELC_EVENT_SCI2_TEI 0x182
282#define RA_ELC_EVENT_SCI2_ERI 0x183
283#define RA_ELC_EVENT_SCI2_AM 0x184
284#define RA_ELC_EVENT_SCI3_RXI 0x186
285#define RA_ELC_EVENT_SCI3_TXI 0x187
286#define RA_ELC_EVENT_SCI3_TEI 0x188
287#define RA_ELC_EVENT_SCI3_ERI 0x189
288#define RA_ELC_EVENT_SCI3_AM 0x18A
289#define RA_ELC_EVENT_SCI4_RXI 0x18C
290#define RA_ELC_EVENT_SCI4_TXI 0x18D
291#define RA_ELC_EVENT_SCI4_TEI 0x18E
292#define RA_ELC_EVENT_SCI4_ERI 0x18F
293#define RA_ELC_EVENT_SCI4_AM 0x190
294#define RA_ELC_EVENT_SCI5_RXI 0x192
295#define RA_ELC_EVENT_SCI5_TXI 0x193
296#define RA_ELC_EVENT_SCI5_TEI 0x194
297#define RA_ELC_EVENT_SCI5_ERI 0x195
298#define RA_ELC_EVENT_SCI5_AM 0x196
299#define RA_ELC_EVENT_SCI6_RXI 0x198
300#define RA_ELC_EVENT_SCI6_TXI 0x199
301#define RA_ELC_EVENT_SCI6_TEI 0x19A
302#define RA_ELC_EVENT_SCI6_ERI 0x19B
303#define RA_ELC_EVENT_SCI6_AM 0x19C
304#define RA_ELC_EVENT_SCI7_RXI 0x19E
305#define RA_ELC_EVENT_SCI7_TXI 0x19F
306#define RA_ELC_EVENT_SCI7_TEI 0x1A0
307#define RA_ELC_EVENT_SCI7_ERI 0x1A1
308#define RA_ELC_EVENT_SCI7_AM 0x1A2
309#define RA_ELC_EVENT_SCI8_RXI 0x1A4
310#define RA_ELC_EVENT_SCI8_TXI 0x1A5
311#define RA_ELC_EVENT_SCI8_TEI 0x1A6
312#define RA_ELC_EVENT_SCI8_ERI 0x1A7
313#define RA_ELC_EVENT_SCI8_AM 0x1A8
314#define RA_ELC_EVENT_SCI9_RXI 0x1AA
315#define RA_ELC_EVENT_SCI9_TXI 0x1AB
316#define RA_ELC_EVENT_SCI9_TEI 0x1AC
317#define RA_ELC_EVENT_SCI9_ERI 0x1AD
318#define RA_ELC_EVENT_SCI9_AM 0x1AE
319#define RA_ELC_EVENT_SPI0_RXI 0x1BC
320#define RA_ELC_EVENT_SPI0_TXI 0x1BD
321#define RA_ELC_EVENT_SPI0_IDLE 0x1BE
322#define RA_ELC_EVENT_SPI0_ERI 0x1BF
323#define RA_ELC_EVENT_SPI0_TEI 0x1C0
324#define RA_ELC_EVENT_SPI1_RXI 0x1C1
325#define RA_ELC_EVENT_SPI1_TXI 0x1C2
326#define RA_ELC_EVENT_SPI1_IDLE 0x1C3
327#define RA_ELC_EVENT_SPI1_ERI 0x1C4
328#define RA_ELC_EVENT_SPI1_TEI 0x1C5
329#define RA_ELC_EVENT_QSPI_INT 0x1C6
330#define RA_ELC_EVENT_SDHIMMC0_ACCS 0x1C7
331#define RA_ELC_EVENT_SDHIMMC0_SDIO 0x1C8
332#define RA_ELC_EVENT_SDHIMMC0_CARD 0x1C9
333#define RA_ELC_EVENT_SDHIMMC0_DMA_REQ 0x1CA
334#define RA_ELC_EVENT_SDHIMMC1_ACCS 0x1CB
335#define RA_ELC_EVENT_SDHIMMC1_SDIO 0x1CC
336#define RA_ELC_EVENT_SDHIMMC1_CARD 0x1CD
337#define RA_ELC_EVENT_SDHIMMC1_DMA_REQ 0x1CE
338
340
345#define RA_ELC_PERIPHERAL_GPT_A 0
346#define RA_ELC_PERIPHERAL_GPT_B 1
347#define RA_ELC_PERIPHERAL_GPT_C 2
348#define RA_ELC_PERIPHERAL_GPT_D 3
349#define RA_ELC_PERIPHERAL_GPT_E 4
350#define RA_ELC_PERIPHERAL_GPT_F 5
351#define RA_ELC_PERIPHERAL_GPT_G 6
352#define RA_ELC_PERIPHERAL_GPT_H 7
353#define RA_ELC_PERIPHERAL_ADC0 8
354#define RA_ELC_PERIPHERAL_ADC0_B 9
355#define RA_ELC_PERIPHERAL_ADC1 10
356#define RA_ELC_PERIPHERAL_ADC1_B 11
357#define RA_ELC_PERIPHERAL_DAC0 12
358#define RA_ELC_PERIPHERAL_DAC1 13
359#define RA_ELC_PERIPHERAL_IOPORT1 14
360#define RA_ELC_PERIPHERAL_IOPORT2 15
361#define RA_ELC_PERIPHERAL_IOPORT3 16
362#define RA_ELC_PERIPHERAL_IOPORT4 17
363#define RA_ELC_PERIPHERAL_CTSU 18
364
366
367#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_MISC_RENESAS_RA_ELC_RA6M2_ELC_H_ */