Zephyr API Documentation 4.3.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
wuc_nxp_llwu.h
Go to the documentation of this file.
1/*
2 * Copyright 2026 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12
13#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_WUC_NXP_LLWU_H_
14#define ZEPHYR_INCLUDE_DT_BINDINGS_WUC_NXP_LLWU_H_
15
28
32#define NXP_LLWU_WAKEUP_SOURCE_TYPE_PIN (0U << 31)
34#define NXP_LLWU_WAKEUP_SOURCE_TYPE_MODULE (1U << 31)
36
40#define NXP_LLWU_PIN_EDGE_RISING 1
42#define NXP_LLWU_PIN_EDGE_FALLING 2
44#define NXP_LLWU_PIN_EDGE_ANY 3
46
53#define NXP_LLWU_PIN_WAKEUP(pin_index, edge_type) \
54 (NXP_LLWU_WAKEUP_SOURCE_TYPE_PIN | (((edge_type) & 0x3) << 8) | ((pin_index) & 0xFF))
55
61#define NXP_LLWU_MODULE_WAKEUP(module_index) \
62 (NXP_LLWU_WAKEUP_SOURCE_TYPE_MODULE | ((module_index) & 0xFF))
63
67#define NXP_LLWU_PIN_0_RISING NXP_LLWU_PIN_WAKEUP(1, NXP_LLWU_PIN_EDGE_RISING)
69#define NXP_LLWU_PIN_0_FALLING NXP_LLWU_PIN_WAKEUP(1, NXP_LLWU_PIN_EDGE_FALLING)
71#define NXP_LLWU_PIN_0_ANY NXP_LLWU_PIN_WAKEUP(1, NXP_LLWU_PIN_EDGE_ANY)
72
74#define NXP_LLWU_PIN_1_RISING NXP_LLWU_PIN_WAKEUP(2, NXP_LLWU_PIN_EDGE_RISING)
76#define NXP_LLWU_PIN_1_FALLING NXP_LLWU_PIN_WAKEUP(2, NXP_LLWU_PIN_EDGE_FALLING)
78#define NXP_LLWU_PIN_1_ANY NXP_LLWU_PIN_WAKEUP(2, NXP_LLWU_PIN_EDGE_ANY)
79
81#define NXP_LLWU_PIN_2_RISING NXP_LLWU_PIN_WAKEUP(3, NXP_LLWU_PIN_EDGE_RISING)
83#define NXP_LLWU_PIN_2_FALLING NXP_LLWU_PIN_WAKEUP(3, NXP_LLWU_PIN_EDGE_FALLING)
85#define NXP_LLWU_PIN_2_ANY NXP_LLWU_PIN_WAKEUP(3, NXP_LLWU_PIN_EDGE_ANY)
86
88#define NXP_LLWU_PIN_3_RISING NXP_LLWU_PIN_WAKEUP(4, NXP_LLWU_PIN_EDGE_RISING)
90#define NXP_LLWU_PIN_3_FALLING NXP_LLWU_PIN_WAKEUP(4, NXP_LLWU_PIN_EDGE_FALLING)
92#define NXP_LLWU_PIN_3_ANY NXP_LLWU_PIN_WAKEUP(4, NXP_LLWU_PIN_EDGE_ANY)
93
95#define NXP_LLWU_PIN_4_RISING NXP_LLWU_PIN_WAKEUP(5, NXP_LLWU_PIN_EDGE_RISING)
97#define NXP_LLWU_PIN_4_FALLING NXP_LLWU_PIN_WAKEUP(5, NXP_LLWU_PIN_EDGE_FALLING)
99#define NXP_LLWU_PIN_4_ANY NXP_LLWU_PIN_WAKEUP(5, NXP_LLWU_PIN_EDGE_ANY)
100
102#define NXP_LLWU_PIN_5_RISING NXP_LLWU_PIN_WAKEUP(6, NXP_LLWU_PIN_EDGE_RISING)
104#define NXP_LLWU_PIN_5_FALLING NXP_LLWU_PIN_WAKEUP(6, NXP_LLWU_PIN_EDGE_FALLING)
106#define NXP_LLWU_PIN_5_ANY NXP_LLWU_PIN_WAKEUP(6, NXP_LLWU_PIN_EDGE_ANY)
107
109#define NXP_LLWU_PIN_6_RISING NXP_LLWU_PIN_WAKEUP(7, NXP_LLWU_PIN_EDGE_RISING)
111#define NXP_LLWU_PIN_6_FALLING NXP_LLWU_PIN_WAKEUP(7, NXP_LLWU_PIN_EDGE_FALLING)
113#define NXP_LLWU_PIN_6_ANY NXP_LLWU_PIN_WAKEUP(7, NXP_LLWU_PIN_EDGE_ANY)
114
116#define NXP_LLWU_PIN_7_RISING NXP_LLWU_PIN_WAKEUP(8, NXP_LLWU_PIN_EDGE_RISING)
118#define NXP_LLWU_PIN_7_FALLING NXP_LLWU_PIN_WAKEUP(8, NXP_LLWU_PIN_EDGE_FALLING)
120#define NXP_LLWU_PIN_7_ANY NXP_LLWU_PIN_WAKEUP(8, NXP_LLWU_PIN_EDGE_ANY)
121
123#define NXP_LLWU_PIN_8_RISING NXP_LLWU_PIN_WAKEUP(9, NXP_LLWU_PIN_EDGE_RISING)
125#define NXP_LLWU_PIN_8_FALLING NXP_LLWU_PIN_WAKEUP(9, NXP_LLWU_PIN_EDGE_FALLING)
127#define NXP_LLWU_PIN_8_ANY NXP_LLWU_PIN_WAKEUP(9, NXP_LLWU_PIN_EDGE_ANY)
128
130#define NXP_LLWU_PIN_9_RISING NXP_LLWU_PIN_WAKEUP(10, NXP_LLWU_PIN_EDGE_RISING)
132#define NXP_LLWU_PIN_9_FALLING NXP_LLWU_PIN_WAKEUP(10, NXP_LLWU_PIN_EDGE_FALLING)
134#define NXP_LLWU_PIN_9_ANY NXP_LLWU_PIN_WAKEUP(10, NXP_LLWU_PIN_EDGE_ANY)
135
137#define NXP_LLWU_PIN_10_RISING NXP_LLWU_PIN_WAKEUP(11, NXP_LLWU_PIN_EDGE_RISING)
139#define NXP_LLWU_PIN_10_FALLING NXP_LLWU_PIN_WAKEUP(11, NXP_LLWU_PIN_EDGE_FALLING)
141#define NXP_LLWU_PIN_10_ANY NXP_LLWU_PIN_WAKEUP(11, NXP_LLWU_PIN_EDGE_ANY)
142
144#define NXP_LLWU_PIN_11_RISING NXP_LLWU_PIN_WAKEUP(12, NXP_LLWU_PIN_EDGE_RISING)
146#define NXP_LLWU_PIN_11_FALLING NXP_LLWU_PIN_WAKEUP(12, NXP_LLWU_PIN_EDGE_FALLING)
148#define NXP_LLWU_PIN_11_ANY NXP_LLWU_PIN_WAKEUP(12, NXP_LLWU_PIN_EDGE_ANY)
149
151#define NXP_LLWU_PIN_12_RISING NXP_LLWU_PIN_WAKEUP(13, NXP_LLWU_PIN_EDGE_RISING)
153#define NXP_LLWU_PIN_12_FALLING NXP_LLWU_PIN_WAKEUP(13, NXP_LLWU_PIN_EDGE_FALLING)
155#define NXP_LLWU_PIN_12_ANY NXP_LLWU_PIN_WAKEUP(13, NXP_LLWU_PIN_EDGE_ANY)
156
158#define NXP_LLWU_PIN_13_RISING NXP_LLWU_PIN_WAKEUP(14, NXP_LLWU_PIN_EDGE_RISING)
160#define NXP_LLWU_PIN_13_FALLING NXP_LLWU_PIN_WAKEUP(14, NXP_LLWU_PIN_EDGE_FALLING)
162#define NXP_LLWU_PIN_13_ANY NXP_LLWU_PIN_WAKEUP(14, NXP_LLWU_PIN_EDGE_ANY)
163
165#define NXP_LLWU_PIN_14_RISING NXP_LLWU_PIN_WAKEUP(15, NXP_LLWU_PIN_EDGE_RISING)
167#define NXP_LLWU_PIN_14_FALLING NXP_LLWU_PIN_WAKEUP(15, NXP_LLWU_PIN_EDGE_FALLING)
169#define NXP_LLWU_PIN_14_ANY NXP_LLWU_PIN_WAKEUP(15, NXP_LLWU_PIN_EDGE_ANY)
170
172#define NXP_LLWU_PIN_15_RISING NXP_LLWU_PIN_WAKEUP(16, NXP_LLWU_PIN_EDGE_RISING)
174#define NXP_LLWU_PIN_15_FALLING NXP_LLWU_PIN_WAKEUP(16, NXP_LLWU_PIN_EDGE_FALLING)
176#define NXP_LLWU_PIN_15_ANY NXP_LLWU_PIN_WAKEUP(16, NXP_LLWU_PIN_EDGE_ANY)
178
182#define NXP_LLWU_MODULE_0 NXP_LLWU_MODULE_WAKEUP(1)
184#define NXP_LLWU_MODULE_1 NXP_LLWU_MODULE_WAKEUP(2)
186#define NXP_LLWU_MODULE_2 NXP_LLWU_MODULE_WAKEUP(3)
188#define NXP_LLWU_MODULE_3 NXP_LLWU_MODULE_WAKEUP(4)
190#define NXP_LLWU_MODULE_4 NXP_LLWU_MODULE_WAKEUP(5)
192#define NXP_LLWU_MODULE_5 NXP_LLWU_MODULE_WAKEUP(6)
194#define NXP_LLWU_MODULE_6 NXP_LLWU_MODULE_WAKEUP(7)
196#define NXP_LLWU_MODULE_7 NXP_LLWU_MODULE_WAKEUP(8)
198
202#define NXP_LLWU_IS_PIN_SOURCE(source) (((source) & (1U << 31)) == 0)
204#define NXP_LLWU_IS_MODULE_SOURCE(source) (((source) & (1U << 31)) != 0)
206#define NXP_LLWU_GET_PIN_INDEX(source) ((source) & 0xFF)
208#define NXP_LLWU_GET_PIN_EDGE(source) (((source) >> 8) & 0x3)
210#define NXP_LLWU_GET_MODULE_INDEX(source) ((source) & 0xFF)
212
213#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_WUC_NXP_LLWU_H_ */