Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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wuc_nxp_wuu.h
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1/*
2 * Copyright (c) 2025 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
22
23#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_WUC_NXP_WUU_H_
24#define ZEPHYR_INCLUDE_DT_BINDINGS_WUC_NXP_WUU_H_
25
27#define NXP_WUU_SOURCE_TYPE_POS 24
29#define NXP_WUU_SOURCE_INDEX_POS 16
31#define NXP_WUU_SOURCE_EDGE_POS 8
33#define NXP_WUU_SOURCE_EVENT_POS 0
34
36#define NXP_WUU_SOURCE_MASK 0xFF
37
39#define NXP_WUU_SOURCE_TYPE_PIN 0
41#define NXP_WUU_SOURCE_TYPE_MODULE 1
42
44#define NXP_WUU_EDGE_RISING 1
46#define NXP_WUU_EDGE_FALLING 2
48#define NXP_WUU_EDGE_ANY 3
49
51#define NXP_WUU_EVENT_INT 0
53#define NXP_WUU_EVENT_DMA 1
55#define NXP_WUU_EVENT_TRIGGER 2
56
65#define NXP_WUU_WAKEUP_SOURCE_ENCODE(type, index, edge, event) \
66 (((type) << NXP_WUU_SOURCE_TYPE_POS) | ((index) << NXP_WUU_SOURCE_INDEX_POS) | \
67 ((edge) << NXP_WUU_SOURCE_EDGE_POS) | ((event) << NXP_WUU_SOURCE_EVENT_POS))
68
75#define NXP_WUU_WAKEUP_SOURCE_DECODE(source, pos) (((source) >> (pos)) & NXP_WUU_SOURCE_MASK)
76
78#define NXP_WUU_WAKEUP_SOURCE_DECODE_TYPE(source) \
79 NXP_WUU_WAKEUP_SOURCE_DECODE(source, NXP_WUU_SOURCE_TYPE_POS)
80
82#define NXP_WUU_IS_PIN_SOURCE(source) \
83 (NXP_WUU_WAKEUP_SOURCE_DECODE_TYPE(source) == NXP_WUU_SOURCE_TYPE_PIN)
84
86#define NXP_WUU_IS_MODULE_SOURCE(source) \
87 (NXP_WUU_WAKEUP_SOURCE_DECODE_TYPE(source) == NXP_WUU_SOURCE_TYPE_MODULE)
88
90#define NXP_WUU_WAKEUP_SOURCE_DECODE_INDEX(source) \
91 NXP_WUU_WAKEUP_SOURCE_DECODE(source, NXP_WUU_SOURCE_INDEX_POS)
92
94#define NXP_WUU_WAKEUP_SOURCE_DECODE_EDGE(source) \
95 NXP_WUU_WAKEUP_SOURCE_DECODE(source, NXP_WUU_SOURCE_EDGE_POS)
96
98#define NXP_WUU_WAKEUP_SOURCE_DECODE_EVENT(source) \
99 NXP_WUU_WAKEUP_SOURCE_DECODE(source, NXP_WUU_SOURCE_EVENT_POS)
100
102#define NXP_WUU_PIN(index, edge, event) \
103 NXP_WUU_WAKEUP_SOURCE_ENCODE(NXP_WUU_SOURCE_TYPE_PIN, index, edge, event)
104
106#define NXP_WUU_MODULE(index, event) \
107 NXP_WUU_WAKEUP_SOURCE_ENCODE(NXP_WUU_SOURCE_TYPE_MODULE, index, 0, event)
108
112
114#define NXP_WUU_MODULE_0_INT NXP_WUU_MODULE(0, NXP_WUU_EVENT_INT)
116#define NXP_WUU_MODULE_0_DMA NXP_WUU_MODULE(0, NXP_WUU_EVENT_DMA)
117
119#define NXP_WUU_MODULE_1_INT NXP_WUU_MODULE(1, NXP_WUU_EVENT_INT)
121#define NXP_WUU_MODULE_1_DMA NXP_WUU_MODULE(1, NXP_WUU_EVENT_DMA)
122
124#define NXP_WUU_MODULE_2_INT NXP_WUU_MODULE(2, NXP_WUU_EVENT_INT)
126#define NXP_WUU_MODULE_2_DMA NXP_WUU_MODULE(2, NXP_WUU_EVENT_DMA)
127
129#define NXP_WUU_MODULE_3_INT NXP_WUU_MODULE(3, NXP_WUU_EVENT_INT)
131#define NXP_WUU_MODULE_3_DMA NXP_WUU_MODULE(3, NXP_WUU_EVENT_DMA)
132
134#define NXP_WUU_MODULE_4_INT NXP_WUU_MODULE(4, NXP_WUU_EVENT_INT)
136#define NXP_WUU_MODULE_4_DMA NXP_WUU_MODULE(4, NXP_WUU_EVENT_DMA)
137
139#define NXP_WUU_MODULE_5_INT NXP_WUU_MODULE(5, NXP_WUU_EVENT_INT)
141#define NXP_WUU_MODULE_5_DMA NXP_WUU_MODULE(5, NXP_WUU_EVENT_DMA)
142
144#define NXP_WUU_MODULE_6_INT NXP_WUU_MODULE(6, NXP_WUU_EVENT_INT)
146#define NXP_WUU_MODULE_6_DMA NXP_WUU_MODULE(6, NXP_WUU_EVENT_DMA)
147
149#define NXP_WUU_MODULE_7_INT NXP_WUU_MODULE(7, NXP_WUU_EVENT_INT)
151#define NXP_WUU_MODULE_7_DMA NXP_WUU_MODULE(7, NXP_WUU_EVENT_DMA)
152
154#define NXP_WUU_MODULE_8_INT NXP_WUU_MODULE(8, NXP_WUU_EVENT_INT)
156#define NXP_WUU_MODULE_8_DMA NXP_WUU_MODULE(8, NXP_WUU_EVENT_DMA)
157
161
162/* Pin 0 wakeup sources */
164#define NXP_WUU_PIN_0_RISING_INT NXP_WUU_PIN(0, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
166#define NXP_WUU_PIN_0_RISING_DMA NXP_WUU_PIN(0, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
168#define NXP_WUU_PIN_0_RISING_TRIGGER NXP_WUU_PIN(0, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
170#define NXP_WUU_PIN_0_FALLING_INT NXP_WUU_PIN(0, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
172#define NXP_WUU_PIN_0_FALLING_DMA NXP_WUU_PIN(0, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
174#define NXP_WUU_PIN_0_FALLING_TRIGGER NXP_WUU_PIN(0, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
176#define NXP_WUU_PIN_0_ANY_INT NXP_WUU_PIN(0, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
178#define NXP_WUU_PIN_0_ANY_DMA NXP_WUU_PIN(0, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
180#define NXP_WUU_PIN_0_ANY_TRIGGER NXP_WUU_PIN(0, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
181
182/* Pin 1 wakeup sources */
184#define NXP_WUU_PIN_1_RISING_INT NXP_WUU_PIN(1, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
186#define NXP_WUU_PIN_1_RISING_DMA NXP_WUU_PIN(1, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
188#define NXP_WUU_PIN_1_RISING_TRIGGER NXP_WUU_PIN(1, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
190#define NXP_WUU_PIN_1_FALLING_INT NXP_WUU_PIN(1, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
192#define NXP_WUU_PIN_1_FALLING_DMA NXP_WUU_PIN(1, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
194#define NXP_WUU_PIN_1_FALLING_TRIGGER NXP_WUU_PIN(1, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
196#define NXP_WUU_PIN_1_ANY_INT NXP_WUU_PIN(1, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
198#define NXP_WUU_PIN_1_ANY_DMA NXP_WUU_PIN(1, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
200#define NXP_WUU_PIN_1_ANY_TRIGGER NXP_WUU_PIN(1, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
201
202/* Pin 2 wakeup sources */
204#define NXP_WUU_PIN_2_RISING_INT NXP_WUU_PIN(2, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
206#define NXP_WUU_PIN_2_RISING_DMA NXP_WUU_PIN(2, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
208#define NXP_WUU_PIN_2_RISING_TRIGGER NXP_WUU_PIN(2, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
210#define NXP_WUU_PIN_2_FALLING_INT NXP_WUU_PIN(2, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
212#define NXP_WUU_PIN_2_FALLING_DMA NXP_WUU_PIN(2, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
214#define NXP_WUU_PIN_2_FALLING_TRIGGER NXP_WUU_PIN(2, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
216#define NXP_WUU_PIN_2_ANY_INT NXP_WUU_PIN(2, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
218#define NXP_WUU_PIN_2_ANY_DMA NXP_WUU_PIN(2, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
220#define NXP_WUU_PIN_2_ANY_TRIGGER NXP_WUU_PIN(2, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
221
222/* Pin 3 wakeup sources */
224#define NXP_WUU_PIN_3_RISING_INT NXP_WUU_PIN(3, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
226#define NXP_WUU_PIN_3_RISING_DMA NXP_WUU_PIN(3, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
228#define NXP_WUU_PIN_3_RISING_TRIGGER NXP_WUU_PIN(3, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
230#define NXP_WUU_PIN_3_FALLING_INT NXP_WUU_PIN(3, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
232#define NXP_WUU_PIN_3_FALLING_DMA NXP_WUU_PIN(3, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
234#define NXP_WUU_PIN_3_FALLING_TRIGGER NXP_WUU_PIN(3, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
236#define NXP_WUU_PIN_3_ANY_INT NXP_WUU_PIN(3, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
238#define NXP_WUU_PIN_3_ANY_DMA NXP_WUU_PIN(3, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
240#define NXP_WUU_PIN_3_ANY_TRIGGER NXP_WUU_PIN(3, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
241
242/* Pin 4 wakeup sources */
244#define NXP_WUU_PIN_4_RISING_INT NXP_WUU_PIN(4, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
246#define NXP_WUU_PIN_4_RISING_DMA NXP_WUU_PIN(4, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
248#define NXP_WUU_PIN_4_RISING_TRIGGER NXP_WUU_PIN(4, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
250#define NXP_WUU_PIN_4_FALLING_INT NXP_WUU_PIN(4, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
252#define NXP_WUU_PIN_4_FALLING_DMA NXP_WUU_PIN(4, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
254#define NXP_WUU_PIN_4_FALLING_TRIGGER NXP_WUU_PIN(4, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
256#define NXP_WUU_PIN_4_ANY_INT NXP_WUU_PIN(4, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
258#define NXP_WUU_PIN_4_ANY_DMA NXP_WUU_PIN(4, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
260#define NXP_WUU_PIN_4_ANY_TRIGGER NXP_WUU_PIN(4, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
261
262/* Pin 5 wakeup sources */
264#define NXP_WUU_PIN_5_RISING_INT NXP_WUU_PIN(5, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
266#define NXP_WUU_PIN_5_RISING_DMA NXP_WUU_PIN(5, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
268#define NXP_WUU_PIN_5_RISING_TRIGGER NXP_WUU_PIN(5, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
270#define NXP_WUU_PIN_5_FALLING_INT NXP_WUU_PIN(5, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
272#define NXP_WUU_PIN_5_FALLING_DMA NXP_WUU_PIN(5, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
274#define NXP_WUU_PIN_5_FALLING_TRIGGER NXP_WUU_PIN(5, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
276#define NXP_WUU_PIN_5_ANY_INT NXP_WUU_PIN(5, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
278#define NXP_WUU_PIN_5_ANY_DMA NXP_WUU_PIN(5, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
280#define NXP_WUU_PIN_5_ANY_TRIGGER NXP_WUU_PIN(5, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
281
282/* Pin 6 wakeup sources */
284#define NXP_WUU_PIN_6_RISING_INT NXP_WUU_PIN(6, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
286#define NXP_WUU_PIN_6_RISING_DMA NXP_WUU_PIN(6, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
288#define NXP_WUU_PIN_6_RISING_TRIGGER NXP_WUU_PIN(6, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
290#define NXP_WUU_PIN_6_FALLING_INT NXP_WUU_PIN(6, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
292#define NXP_WUU_PIN_6_FALLING_DMA NXP_WUU_PIN(6, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
294#define NXP_WUU_PIN_6_FALLING_TRIGGER NXP_WUU_PIN(6, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
296#define NXP_WUU_PIN_6_ANY_INT NXP_WUU_PIN(6, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
298#define NXP_WUU_PIN_6_ANY_DMA NXP_WUU_PIN(6, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
300#define NXP_WUU_PIN_6_ANY_TRIGGER NXP_WUU_PIN(6, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
301
302/* Pin 7 wakeup sources */
304#define NXP_WUU_PIN_7_RISING_INT NXP_WUU_PIN(7, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
306#define NXP_WUU_PIN_7_RISING_DMA NXP_WUU_PIN(7, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
308#define NXP_WUU_PIN_7_RISING_TRIGGER NXP_WUU_PIN(7, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
310#define NXP_WUU_PIN_7_FALLING_INT NXP_WUU_PIN(7, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
312#define NXP_WUU_PIN_7_FALLING_DMA NXP_WUU_PIN(7, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
314#define NXP_WUU_PIN_7_FALLING_TRIGGER NXP_WUU_PIN(7, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
316#define NXP_WUU_PIN_7_ANY_INT NXP_WUU_PIN(7, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
318#define NXP_WUU_PIN_7_ANY_DMA NXP_WUU_PIN(7, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
320#define NXP_WUU_PIN_7_ANY_TRIGGER NXP_WUU_PIN(7, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
321
322/* Pin 8 wakeup sources */
324#define NXP_WUU_PIN_8_RISING_INT NXP_WUU_PIN(8, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
326#define NXP_WUU_PIN_8_RISING_DMA NXP_WUU_PIN(8, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
328#define NXP_WUU_PIN_8_RISING_TRIGGER NXP_WUU_PIN(8, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
330#define NXP_WUU_PIN_8_FALLING_INT NXP_WUU_PIN(8, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
332#define NXP_WUU_PIN_8_FALLING_DMA NXP_WUU_PIN(8, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
334#define NXP_WUU_PIN_8_FALLING_TRIGGER NXP_WUU_PIN(8, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
336#define NXP_WUU_PIN_8_ANY_INT NXP_WUU_PIN(8, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
338#define NXP_WUU_PIN_8_ANY_DMA NXP_WUU_PIN(8, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
340#define NXP_WUU_PIN_8_ANY_TRIGGER NXP_WUU_PIN(8, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
341
342/* Pin 9 wakeup sources */
344#define NXP_WUU_PIN_9_RISING_INT NXP_WUU_PIN(9, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
346#define NXP_WUU_PIN_9_RISING_DMA NXP_WUU_PIN(9, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
348#define NXP_WUU_PIN_9_RISING_TRIGGER NXP_WUU_PIN(9, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
350#define NXP_WUU_PIN_9_FALLING_INT NXP_WUU_PIN(9, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
352#define NXP_WUU_PIN_9_FALLING_DMA NXP_WUU_PIN(9, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
354#define NXP_WUU_PIN_9_FALLING_TRIGGER NXP_WUU_PIN(9, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
356#define NXP_WUU_PIN_9_ANY_INT NXP_WUU_PIN(9, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
358#define NXP_WUU_PIN_9_ANY_DMA NXP_WUU_PIN(9, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
360#define NXP_WUU_PIN_9_ANY_TRIGGER NXP_WUU_PIN(9, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
361
362/* Pin 10 wakeup sources */
364#define NXP_WUU_PIN_10_RISING_INT NXP_WUU_PIN(10, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
366#define NXP_WUU_PIN_10_RISING_DMA NXP_WUU_PIN(10, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
368#define NXP_WUU_PIN_10_RISING_TRIGGER NXP_WUU_PIN(10, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
370#define NXP_WUU_PIN_10_FALLING_INT NXP_WUU_PIN(10, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
372#define NXP_WUU_PIN_10_FALLING_DMA NXP_WUU_PIN(10, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
374#define NXP_WUU_PIN_10_FALLING_TRIGGER NXP_WUU_PIN(10, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
376#define NXP_WUU_PIN_10_ANY_INT NXP_WUU_PIN(10, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
378#define NXP_WUU_PIN_10_ANY_DMA NXP_WUU_PIN(10, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
380#define NXP_WUU_PIN_10_ANY_TRIGGER NXP_WUU_PIN(10, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
381
382/* Pin 11 wakeup sources */
384#define NXP_WUU_PIN_11_RISING_INT NXP_WUU_PIN(11, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
386#define NXP_WUU_PIN_11_RISING_DMA NXP_WUU_PIN(11, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
388#define NXP_WUU_PIN_11_RISING_TRIGGER NXP_WUU_PIN(11, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
390#define NXP_WUU_PIN_11_FALLING_INT NXP_WUU_PIN(11, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
392#define NXP_WUU_PIN_11_FALLING_DMA NXP_WUU_PIN(11, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
394#define NXP_WUU_PIN_11_FALLING_TRIGGER NXP_WUU_PIN(11, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
396#define NXP_WUU_PIN_11_ANY_INT NXP_WUU_PIN(11, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
398#define NXP_WUU_PIN_11_ANY_DMA NXP_WUU_PIN(11, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
400#define NXP_WUU_PIN_11_ANY_TRIGGER NXP_WUU_PIN(11, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
401
402/* Pin 12 wakeup sources */
404#define NXP_WUU_PIN_12_RISING_INT NXP_WUU_PIN(12, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
406#define NXP_WUU_PIN_12_RISING_DMA NXP_WUU_PIN(12, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
408#define NXP_WUU_PIN_12_RISING_TRIGGER NXP_WUU_PIN(12, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
410#define NXP_WUU_PIN_12_FALLING_INT NXP_WUU_PIN(12, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
412#define NXP_WUU_PIN_12_FALLING_DMA NXP_WUU_PIN(12, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
414#define NXP_WUU_PIN_12_FALLING_TRIGGER NXP_WUU_PIN(12, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
416#define NXP_WUU_PIN_12_ANY_INT NXP_WUU_PIN(12, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
418#define NXP_WUU_PIN_12_ANY_DMA NXP_WUU_PIN(12, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
420#define NXP_WUU_PIN_12_ANY_TRIGGER NXP_WUU_PIN(12, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
421
422/* Pin 13 wakeup sources */
424#define NXP_WUU_PIN_13_RISING_INT NXP_WUU_PIN(13, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
426#define NXP_WUU_PIN_13_RISING_DMA NXP_WUU_PIN(13, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
428#define NXP_WUU_PIN_13_RISING_TRIGGER NXP_WUU_PIN(13, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
430#define NXP_WUU_PIN_13_FALLING_INT NXP_WUU_PIN(13, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
432#define NXP_WUU_PIN_13_FALLING_DMA NXP_WUU_PIN(13, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
434#define NXP_WUU_PIN_13_FALLING_TRIGGER NXP_WUU_PIN(13, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
436#define NXP_WUU_PIN_13_ANY_INT NXP_WUU_PIN(13, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
438#define NXP_WUU_PIN_13_ANY_DMA NXP_WUU_PIN(13, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
440#define NXP_WUU_PIN_13_ANY_TRIGGER NXP_WUU_PIN(13, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
441
442/* Pin 14 wakeup sources */
444#define NXP_WUU_PIN_14_RISING_INT NXP_WUU_PIN(14, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
446#define NXP_WUU_PIN_14_RISING_DMA NXP_WUU_PIN(14, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
448#define NXP_WUU_PIN_14_RISING_TRIGGER NXP_WUU_PIN(14, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
450#define NXP_WUU_PIN_14_FALLING_INT NXP_WUU_PIN(14, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
452#define NXP_WUU_PIN_14_FALLING_DMA NXP_WUU_PIN(14, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
454#define NXP_WUU_PIN_14_FALLING_TRIGGER NXP_WUU_PIN(14, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
456#define NXP_WUU_PIN_14_ANY_INT NXP_WUU_PIN(14, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
458#define NXP_WUU_PIN_14_ANY_DMA NXP_WUU_PIN(14, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
460#define NXP_WUU_PIN_14_ANY_TRIGGER NXP_WUU_PIN(14, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
461
462/* Pin 15 wakeup sources */
464#define NXP_WUU_PIN_15_RISING_INT NXP_WUU_PIN(15, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
466#define NXP_WUU_PIN_15_RISING_DMA NXP_WUU_PIN(15, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
468#define NXP_WUU_PIN_15_RISING_TRIGGER NXP_WUU_PIN(15, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
470#define NXP_WUU_PIN_15_FALLING_INT NXP_WUU_PIN(15, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
472#define NXP_WUU_PIN_15_FALLING_DMA NXP_WUU_PIN(15, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
474#define NXP_WUU_PIN_15_FALLING_TRIGGER NXP_WUU_PIN(15, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
476#define NXP_WUU_PIN_15_ANY_INT NXP_WUU_PIN(15, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
478#define NXP_WUU_PIN_15_ANY_DMA NXP_WUU_PIN(15, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
480#define NXP_WUU_PIN_15_ANY_TRIGGER NXP_WUU_PIN(15, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
481
482/* Pin 16 wakeup sources */
484#define NXP_WUU_PIN_16_RISING_INT NXP_WUU_PIN(16, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
486#define NXP_WUU_PIN_16_RISING_DMA NXP_WUU_PIN(16, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
488#define NXP_WUU_PIN_16_RISING_TRIGGER NXP_WUU_PIN(16, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
490#define NXP_WUU_PIN_16_FALLING_INT NXP_WUU_PIN(16, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
492#define NXP_WUU_PIN_16_FALLING_DMA NXP_WUU_PIN(16, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
494#define NXP_WUU_PIN_16_FALLING_TRIGGER NXP_WUU_PIN(16, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
496#define NXP_WUU_PIN_16_ANY_INT NXP_WUU_PIN(16, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
498#define NXP_WUU_PIN_16_ANY_DMA NXP_WUU_PIN(16, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
500#define NXP_WUU_PIN_16_ANY_TRIGGER NXP_WUU_PIN(16, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
501
502/* Pin 17 wakeup sources */
504#define NXP_WUU_PIN_17_RISING_INT NXP_WUU_PIN(17, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
506#define NXP_WUU_PIN_17_RISING_DMA NXP_WUU_PIN(17, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
508#define NXP_WUU_PIN_17_RISING_TRIGGER NXP_WUU_PIN(17, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
510#define NXP_WUU_PIN_17_FALLING_INT NXP_WUU_PIN(17, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
512#define NXP_WUU_PIN_17_FALLING_DMA NXP_WUU_PIN(17, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
514#define NXP_WUU_PIN_17_FALLING_TRIGGER NXP_WUU_PIN(17, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
516#define NXP_WUU_PIN_17_ANY_INT NXP_WUU_PIN(17, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
518#define NXP_WUU_PIN_17_ANY_DMA NXP_WUU_PIN(17, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
520#define NXP_WUU_PIN_17_ANY_TRIGGER NXP_WUU_PIN(17, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
521
522/* Pin 18 wakeup sources */
524#define NXP_WUU_PIN_18_RISING_INT NXP_WUU_PIN(18, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
526#define NXP_WUU_PIN_18_RISING_DMA NXP_WUU_PIN(18, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
528#define NXP_WUU_PIN_18_RISING_TRIGGER NXP_WUU_PIN(18, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
530#define NXP_WUU_PIN_18_FALLING_INT NXP_WUU_PIN(18, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
532#define NXP_WUU_PIN_18_FALLING_DMA NXP_WUU_PIN(18, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
534#define NXP_WUU_PIN_18_FALLING_TRIGGER NXP_WUU_PIN(18, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
536#define NXP_WUU_PIN_18_ANY_INT NXP_WUU_PIN(18, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
538#define NXP_WUU_PIN_18_ANY_DMA NXP_WUU_PIN(18, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
540#define NXP_WUU_PIN_18_ANY_TRIGGER NXP_WUU_PIN(18, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
541
542/* Pin 19 wakeup sources */
544#define NXP_WUU_PIN_19_RISING_INT NXP_WUU_PIN(19, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
546#define NXP_WUU_PIN_19_RISING_DMA NXP_WUU_PIN(19, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
548#define NXP_WUU_PIN_19_RISING_TRIGGER NXP_WUU_PIN(19, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
550#define NXP_WUU_PIN_19_FALLING_INT NXP_WUU_PIN(19, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
552#define NXP_WUU_PIN_19_FALLING_DMA NXP_WUU_PIN(19, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
554#define NXP_WUU_PIN_19_FALLING_TRIGGER NXP_WUU_PIN(19, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
556#define NXP_WUU_PIN_19_ANY_INT NXP_WUU_PIN(19, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
558#define NXP_WUU_PIN_19_ANY_DMA NXP_WUU_PIN(19, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
560#define NXP_WUU_PIN_19_ANY_TRIGGER NXP_WUU_PIN(19, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
561
562/* Pin 20 wakeup sources */
564#define NXP_WUU_PIN_20_RISING_INT NXP_WUU_PIN(20, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
566#define NXP_WUU_PIN_20_RISING_DMA NXP_WUU_PIN(20, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
568#define NXP_WUU_PIN_20_RISING_TRIGGER NXP_WUU_PIN(20, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
570#define NXP_WUU_PIN_20_FALLING_INT NXP_WUU_PIN(20, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
572#define NXP_WUU_PIN_20_FALLING_DMA NXP_WUU_PIN(20, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
574#define NXP_WUU_PIN_20_FALLING_TRIGGER NXP_WUU_PIN(20, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
576#define NXP_WUU_PIN_20_ANY_INT NXP_WUU_PIN(20, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
578#define NXP_WUU_PIN_20_ANY_DMA NXP_WUU_PIN(20, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
580#define NXP_WUU_PIN_20_ANY_TRIGGER NXP_WUU_PIN(20, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
581
582/* Pin 21 wakeup sources */
584#define NXP_WUU_PIN_21_RISING_INT NXP_WUU_PIN(21, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
586#define NXP_WUU_PIN_21_RISING_DMA NXP_WUU_PIN(21, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
588#define NXP_WUU_PIN_21_RISING_TRIGGER NXP_WUU_PIN(21, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
590#define NXP_WUU_PIN_21_FALLING_INT NXP_WUU_PIN(21, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
592#define NXP_WUU_PIN_21_FALLING_DMA NXP_WUU_PIN(21, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
594#define NXP_WUU_PIN_21_FALLING_TRIGGER NXP_WUU_PIN(21, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
596#define NXP_WUU_PIN_21_ANY_INT NXP_WUU_PIN(21, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
598#define NXP_WUU_PIN_21_ANY_DMA NXP_WUU_PIN(21, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
600#define NXP_WUU_PIN_21_ANY_TRIGGER NXP_WUU_PIN(21, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
601
602/* Pin 22 wakeup sources */
604#define NXP_WUU_PIN_22_RISING_INT NXP_WUU_PIN(22, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
606#define NXP_WUU_PIN_22_RISING_DMA NXP_WUU_PIN(22, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
608#define NXP_WUU_PIN_22_RISING_TRIGGER NXP_WUU_PIN(22, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
610#define NXP_WUU_PIN_22_FALLING_INT NXP_WUU_PIN(22, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
612#define NXP_WUU_PIN_22_FALLING_DMA NXP_WUU_PIN(22, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
614#define NXP_WUU_PIN_22_FALLING_TRIGGER NXP_WUU_PIN(22, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
616#define NXP_WUU_PIN_22_ANY_INT NXP_WUU_PIN(22, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
618#define NXP_WUU_PIN_22_ANY_DMA NXP_WUU_PIN(22, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
620#define NXP_WUU_PIN_22_ANY_TRIGGER NXP_WUU_PIN(22, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
621
622/* Pin 23 wakeup sources */
624#define NXP_WUU_PIN_23_RISING_INT NXP_WUU_PIN(23, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
626#define NXP_WUU_PIN_23_RISING_DMA NXP_WUU_PIN(23, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
628#define NXP_WUU_PIN_23_RISING_TRIGGER NXP_WUU_PIN(23, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
630#define NXP_WUU_PIN_23_FALLING_INT NXP_WUU_PIN(23, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
632#define NXP_WUU_PIN_23_FALLING_DMA NXP_WUU_PIN(23, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
634#define NXP_WUU_PIN_23_FALLING_TRIGGER NXP_WUU_PIN(23, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
636#define NXP_WUU_PIN_23_ANY_INT NXP_WUU_PIN(23, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
638#define NXP_WUU_PIN_23_ANY_DMA NXP_WUU_PIN(23, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
640#define NXP_WUU_PIN_23_ANY_TRIGGER NXP_WUU_PIN(23, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
641
642/* Pin 24 wakeup sources */
644#define NXP_WUU_PIN_24_RISING_INT NXP_WUU_PIN(24, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
646#define NXP_WUU_PIN_24_RISING_DMA NXP_WUU_PIN(24, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
648#define NXP_WUU_PIN_24_RISING_TRIGGER NXP_WUU_PIN(24, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
650#define NXP_WUU_PIN_24_FALLING_INT NXP_WUU_PIN(24, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
652#define NXP_WUU_PIN_24_FALLING_DMA NXP_WUU_PIN(24, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
654#define NXP_WUU_PIN_24_FALLING_TRIGGER NXP_WUU_PIN(24, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
656#define NXP_WUU_PIN_24_ANY_INT NXP_WUU_PIN(24, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
658#define NXP_WUU_PIN_24_ANY_DMA NXP_WUU_PIN(24, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
660#define NXP_WUU_PIN_24_ANY_TRIGGER NXP_WUU_PIN(24, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
661
662/* Pin 25 wakeup sources */
664#define NXP_WUU_PIN_25_RISING_INT NXP_WUU_PIN(25, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
666#define NXP_WUU_PIN_25_RISING_DMA NXP_WUU_PIN(25, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
668#define NXP_WUU_PIN_25_RISING_TRIGGER NXP_WUU_PIN(25, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
670#define NXP_WUU_PIN_25_FALLING_INT NXP_WUU_PIN(25, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
672#define NXP_WUU_PIN_25_FALLING_DMA NXP_WUU_PIN(25, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
674#define NXP_WUU_PIN_25_FALLING_TRIGGER NXP_WUU_PIN(25, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
676#define NXP_WUU_PIN_25_ANY_INT NXP_WUU_PIN(25, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
678#define NXP_WUU_PIN_25_ANY_DMA NXP_WUU_PIN(25, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
680#define NXP_WUU_PIN_25_ANY_TRIGGER NXP_WUU_PIN(25, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
681
682/* Pin 26 wakeup sources */
684#define NXP_WUU_PIN_26_RISING_INT NXP_WUU_PIN(26, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
686#define NXP_WUU_PIN_26_RISING_DMA NXP_WUU_PIN(26, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
688#define NXP_WUU_PIN_26_RISING_TRIGGER NXP_WUU_PIN(26, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
690#define NXP_WUU_PIN_26_FALLING_INT NXP_WUU_PIN(26, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
692#define NXP_WUU_PIN_26_FALLING_DMA NXP_WUU_PIN(26, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
694#define NXP_WUU_PIN_26_FALLING_TRIGGER NXP_WUU_PIN(26, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
696#define NXP_WUU_PIN_26_ANY_INT NXP_WUU_PIN(26, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
698#define NXP_WUU_PIN_26_ANY_DMA NXP_WUU_PIN(26, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
700#define NXP_WUU_PIN_26_ANY_TRIGGER NXP_WUU_PIN(26, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
701
702/* Pin 27 wakeup sources */
704#define NXP_WUU_PIN_27_RISING_INT NXP_WUU_PIN(27, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
706#define NXP_WUU_PIN_27_RISING_DMA NXP_WUU_PIN(27, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
708#define NXP_WUU_PIN_27_RISING_TRIGGER NXP_WUU_PIN(27, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
710#define NXP_WUU_PIN_27_FALLING_INT NXP_WUU_PIN(27, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
712#define NXP_WUU_PIN_27_FALLING_DMA NXP_WUU_PIN(27, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
714#define NXP_WUU_PIN_27_FALLING_TRIGGER NXP_WUU_PIN(27, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
716#define NXP_WUU_PIN_27_ANY_INT NXP_WUU_PIN(27, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
718#define NXP_WUU_PIN_27_ANY_DMA NXP_WUU_PIN(27, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
720#define NXP_WUU_PIN_27_ANY_TRIGGER NXP_WUU_PIN(27, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
721
722/* Pin 28 wakeup sources */
724#define NXP_WUU_PIN_28_RISING_INT NXP_WUU_PIN(28, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
726#define NXP_WUU_PIN_28_RISING_DMA NXP_WUU_PIN(28, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
728#define NXP_WUU_PIN_28_RISING_TRIGGER NXP_WUU_PIN(28, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
730#define NXP_WUU_PIN_28_FALLING_INT NXP_WUU_PIN(28, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
732#define NXP_WUU_PIN_28_FALLING_DMA NXP_WUU_PIN(28, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
734#define NXP_WUU_PIN_28_FALLING_TRIGGER NXP_WUU_PIN(28, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
736#define NXP_WUU_PIN_28_ANY_INT NXP_WUU_PIN(28, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
738#define NXP_WUU_PIN_28_ANY_DMA NXP_WUU_PIN(28, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
740#define NXP_WUU_PIN_28_ANY_TRIGGER NXP_WUU_PIN(28, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
741
742/* Pin 29 wakeup sources */
744#define NXP_WUU_PIN_29_RISING_INT NXP_WUU_PIN(29, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
746#define NXP_WUU_PIN_29_RISING_DMA NXP_WUU_PIN(29, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
748#define NXP_WUU_PIN_29_RISING_TRIGGER NXP_WUU_PIN(29, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
750#define NXP_WUU_PIN_29_FALLING_INT NXP_WUU_PIN(29, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
752#define NXP_WUU_PIN_29_FALLING_DMA NXP_WUU_PIN(29, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
754#define NXP_WUU_PIN_29_FALLING_TRIGGER NXP_WUU_PIN(29, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
756#define NXP_WUU_PIN_29_ANY_INT NXP_WUU_PIN(29, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
758#define NXP_WUU_PIN_29_ANY_DMA NXP_WUU_PIN(29, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
760#define NXP_WUU_PIN_29_ANY_TRIGGER NXP_WUU_PIN(29, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
761
762/* Pin 30 wakeup sources */
764#define NXP_WUU_PIN_30_RISING_INT NXP_WUU_PIN(30, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
766#define NXP_WUU_PIN_30_RISING_DMA NXP_WUU_PIN(30, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
768#define NXP_WUU_PIN_30_RISING_TRIGGER NXP_WUU_PIN(30, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
770#define NXP_WUU_PIN_30_FALLING_INT NXP_WUU_PIN(30, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
772#define NXP_WUU_PIN_30_FALLING_DMA NXP_WUU_PIN(30, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
774#define NXP_WUU_PIN_30_FALLING_TRIGGER NXP_WUU_PIN(30, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
776#define NXP_WUU_PIN_30_ANY_INT NXP_WUU_PIN(30, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
778#define NXP_WUU_PIN_30_ANY_DMA NXP_WUU_PIN(30, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
780#define NXP_WUU_PIN_30_ANY_TRIGGER NXP_WUU_PIN(30, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
781
782/* Pin 31 wakeup sources */
784#define NXP_WUU_PIN_31_RISING_INT NXP_WUU_PIN(31, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
786#define NXP_WUU_PIN_31_RISING_DMA NXP_WUU_PIN(31, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
788#define NXP_WUU_PIN_31_RISING_TRIGGER NXP_WUU_PIN(31, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
790#define NXP_WUU_PIN_31_FALLING_INT NXP_WUU_PIN(31, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
792#define NXP_WUU_PIN_31_FALLING_DMA NXP_WUU_PIN(31, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
794#define NXP_WUU_PIN_31_FALLING_TRIGGER NXP_WUU_PIN(31, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
796#define NXP_WUU_PIN_31_ANY_INT NXP_WUU_PIN(31, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
798#define NXP_WUU_PIN_31_ANY_DMA NXP_WUU_PIN(31, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
800#define NXP_WUU_PIN_31_ANY_TRIGGER NXP_WUU_PIN(31, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
801
802#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_WUC_NXP_WUU_H_ */