Zephyr API Documentation
4.4.99
A Scalable Open Source RTOS
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wuc_nxp_wuu.h
Go to the documentation of this file.
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/*
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* Copyright (c) 2025 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_WUC_NXP_WUU_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_WUC_NXP_WUU_H_
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#define NXP_WUU_SOURCE_TYPE_POS 24
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#define NXP_WUU_SOURCE_INDEX_POS 16
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#define NXP_WUU_SOURCE_EDGE_POS 8
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#define NXP_WUU_SOURCE_EVENT_POS 0
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#define NXP_WUU_SOURCE_MASK 0xFF
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#define NXP_WUU_SOURCE_TYPE_PIN 0
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#define NXP_WUU_SOURCE_TYPE_MODULE 1
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#define NXP_WUU_EDGE_RISING 1
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#define NXP_WUU_EDGE_FALLING 2
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#define NXP_WUU_EDGE_ANY 3
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#define NXP_WUU_EVENT_INT 0
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#define NXP_WUU_EVENT_DMA 1
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#define NXP_WUU_EVENT_TRIGGER 2
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#define NXP_WUU_WAKEUP_SOURCE_ENCODE(type, index, edge, event) \
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(((type) << NXP_WUU_SOURCE_TYPE_POS) | ((index) << NXP_WUU_SOURCE_INDEX_POS) | \
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((edge) << NXP_WUU_SOURCE_EDGE_POS) | ((event) << NXP_WUU_SOURCE_EVENT_POS))
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#define NXP_WUU_WAKEUP_SOURCE_DECODE(source, pos) (((source) >> (pos)) & NXP_WUU_SOURCE_MASK)
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#define NXP_WUU_WAKEUP_SOURCE_DECODE_TYPE(source) \
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NXP_WUU_WAKEUP_SOURCE_DECODE(source, NXP_WUU_SOURCE_TYPE_POS)
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#define NXP_WUU_IS_PIN_SOURCE(source) \
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(NXP_WUU_WAKEUP_SOURCE_DECODE_TYPE(source) == NXP_WUU_SOURCE_TYPE_PIN)
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#define NXP_WUU_IS_MODULE_SOURCE(source) \
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(NXP_WUU_WAKEUP_SOURCE_DECODE_TYPE(source) == NXP_WUU_SOURCE_TYPE_MODULE)
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#define NXP_WUU_WAKEUP_SOURCE_DECODE_INDEX(source) \
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NXP_WUU_WAKEUP_SOURCE_DECODE(source, NXP_WUU_SOURCE_INDEX_POS)
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#define NXP_WUU_WAKEUP_SOURCE_DECODE_EDGE(source) \
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NXP_WUU_WAKEUP_SOURCE_DECODE(source, NXP_WUU_SOURCE_EDGE_POS)
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#define NXP_WUU_WAKEUP_SOURCE_DECODE_EVENT(source) \
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NXP_WUU_WAKEUP_SOURCE_DECODE(source, NXP_WUU_SOURCE_EVENT_POS)
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#define NXP_WUU_PIN(index, edge, event) \
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NXP_WUU_WAKEUP_SOURCE_ENCODE(NXP_WUU_SOURCE_TYPE_PIN, index, edge, event)
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#define NXP_WUU_MODULE(index, event) \
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NXP_WUU_WAKEUP_SOURCE_ENCODE(NXP_WUU_SOURCE_TYPE_MODULE, index, 0, event)
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#define NXP_WUU_MODULE_0_INT NXP_WUU_MODULE(0, NXP_WUU_EVENT_INT)
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#define NXP_WUU_MODULE_0_DMA NXP_WUU_MODULE(0, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_MODULE_1_INT NXP_WUU_MODULE(1, NXP_WUU_EVENT_INT)
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#define NXP_WUU_MODULE_1_DMA NXP_WUU_MODULE(1, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_MODULE_2_INT NXP_WUU_MODULE(2, NXP_WUU_EVENT_INT)
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#define NXP_WUU_MODULE_2_DMA NXP_WUU_MODULE(2, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_MODULE_3_INT NXP_WUU_MODULE(3, NXP_WUU_EVENT_INT)
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#define NXP_WUU_MODULE_3_DMA NXP_WUU_MODULE(3, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_MODULE_4_INT NXP_WUU_MODULE(4, NXP_WUU_EVENT_INT)
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#define NXP_WUU_MODULE_4_DMA NXP_WUU_MODULE(4, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_MODULE_5_INT NXP_WUU_MODULE(5, NXP_WUU_EVENT_INT)
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#define NXP_WUU_MODULE_5_DMA NXP_WUU_MODULE(5, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_MODULE_6_INT NXP_WUU_MODULE(6, NXP_WUU_EVENT_INT)
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#define NXP_WUU_MODULE_6_DMA NXP_WUU_MODULE(6, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_MODULE_7_INT NXP_WUU_MODULE(7, NXP_WUU_EVENT_INT)
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#define NXP_WUU_MODULE_7_DMA NXP_WUU_MODULE(7, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_MODULE_8_INT NXP_WUU_MODULE(8, NXP_WUU_EVENT_INT)
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#define NXP_WUU_MODULE_8_DMA NXP_WUU_MODULE(8, NXP_WUU_EVENT_DMA)
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/* Pin 0 wakeup sources */
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#define NXP_WUU_PIN_0_RISING_INT NXP_WUU_PIN(0, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_0_RISING_DMA NXP_WUU_PIN(0, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_0_RISING_TRIGGER NXP_WUU_PIN(0, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_0_FALLING_INT NXP_WUU_PIN(0, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_0_FALLING_DMA NXP_WUU_PIN(0, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_0_FALLING_TRIGGER NXP_WUU_PIN(0, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_0_ANY_INT NXP_WUU_PIN(0, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_0_ANY_DMA NXP_WUU_PIN(0, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_0_ANY_TRIGGER NXP_WUU_PIN(0, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 1 wakeup sources */
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#define NXP_WUU_PIN_1_RISING_INT NXP_WUU_PIN(1, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_1_RISING_DMA NXP_WUU_PIN(1, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_1_RISING_TRIGGER NXP_WUU_PIN(1, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_1_FALLING_INT NXP_WUU_PIN(1, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_1_FALLING_DMA NXP_WUU_PIN(1, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_1_FALLING_TRIGGER NXP_WUU_PIN(1, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_1_ANY_INT NXP_WUU_PIN(1, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_1_ANY_DMA NXP_WUU_PIN(1, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_1_ANY_TRIGGER NXP_WUU_PIN(1, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 2 wakeup sources */
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#define NXP_WUU_PIN_2_RISING_INT NXP_WUU_PIN(2, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_2_RISING_DMA NXP_WUU_PIN(2, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_2_RISING_TRIGGER NXP_WUU_PIN(2, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_2_FALLING_INT NXP_WUU_PIN(2, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_2_FALLING_DMA NXP_WUU_PIN(2, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_2_FALLING_TRIGGER NXP_WUU_PIN(2, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_2_ANY_INT NXP_WUU_PIN(2, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_2_ANY_DMA NXP_WUU_PIN(2, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_2_ANY_TRIGGER NXP_WUU_PIN(2, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 3 wakeup sources */
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#define NXP_WUU_PIN_3_RISING_INT NXP_WUU_PIN(3, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_3_RISING_DMA NXP_WUU_PIN(3, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_3_RISING_TRIGGER NXP_WUU_PIN(3, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_3_FALLING_INT NXP_WUU_PIN(3, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_3_FALLING_DMA NXP_WUU_PIN(3, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_3_FALLING_TRIGGER NXP_WUU_PIN(3, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_3_ANY_INT NXP_WUU_PIN(3, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_3_ANY_DMA NXP_WUU_PIN(3, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_3_ANY_TRIGGER NXP_WUU_PIN(3, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 4 wakeup sources */
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#define NXP_WUU_PIN_4_RISING_INT NXP_WUU_PIN(4, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_4_RISING_DMA NXP_WUU_PIN(4, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_4_RISING_TRIGGER NXP_WUU_PIN(4, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_4_FALLING_INT NXP_WUU_PIN(4, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_4_FALLING_DMA NXP_WUU_PIN(4, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_4_FALLING_TRIGGER NXP_WUU_PIN(4, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_4_ANY_INT NXP_WUU_PIN(4, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_4_ANY_DMA NXP_WUU_PIN(4, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_4_ANY_TRIGGER NXP_WUU_PIN(4, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 5 wakeup sources */
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#define NXP_WUU_PIN_5_RISING_INT NXP_WUU_PIN(5, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_5_RISING_DMA NXP_WUU_PIN(5, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_5_RISING_TRIGGER NXP_WUU_PIN(5, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_5_FALLING_INT NXP_WUU_PIN(5, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_5_FALLING_DMA NXP_WUU_PIN(5, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_5_FALLING_TRIGGER NXP_WUU_PIN(5, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_5_ANY_INT NXP_WUU_PIN(5, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_5_ANY_DMA NXP_WUU_PIN(5, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_5_ANY_TRIGGER NXP_WUU_PIN(5, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 6 wakeup sources */
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#define NXP_WUU_PIN_6_RISING_INT NXP_WUU_PIN(6, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_6_RISING_DMA NXP_WUU_PIN(6, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_6_RISING_TRIGGER NXP_WUU_PIN(6, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_6_FALLING_INT NXP_WUU_PIN(6, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_6_FALLING_DMA NXP_WUU_PIN(6, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_6_FALLING_TRIGGER NXP_WUU_PIN(6, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_6_ANY_INT NXP_WUU_PIN(6, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_6_ANY_DMA NXP_WUU_PIN(6, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_6_ANY_TRIGGER NXP_WUU_PIN(6, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 7 wakeup sources */
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#define NXP_WUU_PIN_7_RISING_INT NXP_WUU_PIN(7, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_7_RISING_DMA NXP_WUU_PIN(7, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_7_RISING_TRIGGER NXP_WUU_PIN(7, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_7_FALLING_INT NXP_WUU_PIN(7, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_7_FALLING_DMA NXP_WUU_PIN(7, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_7_FALLING_TRIGGER NXP_WUU_PIN(7, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_7_ANY_INT NXP_WUU_PIN(7, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_7_ANY_DMA NXP_WUU_PIN(7, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_7_ANY_TRIGGER NXP_WUU_PIN(7, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 8 wakeup sources */
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#define NXP_WUU_PIN_8_RISING_INT NXP_WUU_PIN(8, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_8_RISING_DMA NXP_WUU_PIN(8, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_8_RISING_TRIGGER NXP_WUU_PIN(8, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_8_FALLING_INT NXP_WUU_PIN(8, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_8_FALLING_DMA NXP_WUU_PIN(8, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_8_FALLING_TRIGGER NXP_WUU_PIN(8, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_8_ANY_INT NXP_WUU_PIN(8, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_8_ANY_DMA NXP_WUU_PIN(8, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_8_ANY_TRIGGER NXP_WUU_PIN(8, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 9 wakeup sources */
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#define NXP_WUU_PIN_9_RISING_INT NXP_WUU_PIN(9, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_9_RISING_DMA NXP_WUU_PIN(9, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_9_RISING_TRIGGER NXP_WUU_PIN(9, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_9_FALLING_INT NXP_WUU_PIN(9, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_9_FALLING_DMA NXP_WUU_PIN(9, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_9_FALLING_TRIGGER NXP_WUU_PIN(9, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_9_ANY_INT NXP_WUU_PIN(9, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_9_ANY_DMA NXP_WUU_PIN(9, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_9_ANY_TRIGGER NXP_WUU_PIN(9, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 10 wakeup sources */
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#define NXP_WUU_PIN_10_RISING_INT NXP_WUU_PIN(10, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_10_RISING_DMA NXP_WUU_PIN(10, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_10_RISING_TRIGGER NXP_WUU_PIN(10, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_10_FALLING_INT NXP_WUU_PIN(10, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_10_FALLING_DMA NXP_WUU_PIN(10, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_10_FALLING_TRIGGER NXP_WUU_PIN(10, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_10_ANY_INT NXP_WUU_PIN(10, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_10_ANY_DMA NXP_WUU_PIN(10, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_10_ANY_TRIGGER NXP_WUU_PIN(10, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 11 wakeup sources */
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#define NXP_WUU_PIN_11_RISING_INT NXP_WUU_PIN(11, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_11_RISING_DMA NXP_WUU_PIN(11, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_11_RISING_TRIGGER NXP_WUU_PIN(11, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_11_FALLING_INT NXP_WUU_PIN(11, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_11_FALLING_DMA NXP_WUU_PIN(11, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_11_FALLING_TRIGGER NXP_WUU_PIN(11, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_11_ANY_INT NXP_WUU_PIN(11, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_11_ANY_DMA NXP_WUU_PIN(11, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_11_ANY_TRIGGER NXP_WUU_PIN(11, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
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/* Pin 12 wakeup sources */
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#define NXP_WUU_PIN_12_RISING_INT NXP_WUU_PIN(12, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_12_RISING_DMA NXP_WUU_PIN(12, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
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#define NXP_WUU_PIN_12_RISING_TRIGGER NXP_WUU_PIN(12, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
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#define NXP_WUU_PIN_12_FALLING_INT NXP_WUU_PIN(12, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
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#define NXP_WUU_PIN_12_FALLING_DMA NXP_WUU_PIN(12, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
414
#define NXP_WUU_PIN_12_FALLING_TRIGGER NXP_WUU_PIN(12, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
416
#define NXP_WUU_PIN_12_ANY_INT NXP_WUU_PIN(12, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
418
#define NXP_WUU_PIN_12_ANY_DMA NXP_WUU_PIN(12, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
420
#define NXP_WUU_PIN_12_ANY_TRIGGER NXP_WUU_PIN(12, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
421
422
/* Pin 13 wakeup sources */
424
#define NXP_WUU_PIN_13_RISING_INT NXP_WUU_PIN(13, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
426
#define NXP_WUU_PIN_13_RISING_DMA NXP_WUU_PIN(13, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
428
#define NXP_WUU_PIN_13_RISING_TRIGGER NXP_WUU_PIN(13, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
430
#define NXP_WUU_PIN_13_FALLING_INT NXP_WUU_PIN(13, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
432
#define NXP_WUU_PIN_13_FALLING_DMA NXP_WUU_PIN(13, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
434
#define NXP_WUU_PIN_13_FALLING_TRIGGER NXP_WUU_PIN(13, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
436
#define NXP_WUU_PIN_13_ANY_INT NXP_WUU_PIN(13, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
438
#define NXP_WUU_PIN_13_ANY_DMA NXP_WUU_PIN(13, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
440
#define NXP_WUU_PIN_13_ANY_TRIGGER NXP_WUU_PIN(13, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
441
442
/* Pin 14 wakeup sources */
444
#define NXP_WUU_PIN_14_RISING_INT NXP_WUU_PIN(14, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
446
#define NXP_WUU_PIN_14_RISING_DMA NXP_WUU_PIN(14, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
448
#define NXP_WUU_PIN_14_RISING_TRIGGER NXP_WUU_PIN(14, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
450
#define NXP_WUU_PIN_14_FALLING_INT NXP_WUU_PIN(14, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
452
#define NXP_WUU_PIN_14_FALLING_DMA NXP_WUU_PIN(14, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
454
#define NXP_WUU_PIN_14_FALLING_TRIGGER NXP_WUU_PIN(14, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
456
#define NXP_WUU_PIN_14_ANY_INT NXP_WUU_PIN(14, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
458
#define NXP_WUU_PIN_14_ANY_DMA NXP_WUU_PIN(14, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
460
#define NXP_WUU_PIN_14_ANY_TRIGGER NXP_WUU_PIN(14, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
461
462
/* Pin 15 wakeup sources */
464
#define NXP_WUU_PIN_15_RISING_INT NXP_WUU_PIN(15, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
466
#define NXP_WUU_PIN_15_RISING_DMA NXP_WUU_PIN(15, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
468
#define NXP_WUU_PIN_15_RISING_TRIGGER NXP_WUU_PIN(15, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
470
#define NXP_WUU_PIN_15_FALLING_INT NXP_WUU_PIN(15, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
472
#define NXP_WUU_PIN_15_FALLING_DMA NXP_WUU_PIN(15, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
474
#define NXP_WUU_PIN_15_FALLING_TRIGGER NXP_WUU_PIN(15, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
476
#define NXP_WUU_PIN_15_ANY_INT NXP_WUU_PIN(15, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
478
#define NXP_WUU_PIN_15_ANY_DMA NXP_WUU_PIN(15, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
480
#define NXP_WUU_PIN_15_ANY_TRIGGER NXP_WUU_PIN(15, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
481
482
/* Pin 16 wakeup sources */
484
#define NXP_WUU_PIN_16_RISING_INT NXP_WUU_PIN(16, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
486
#define NXP_WUU_PIN_16_RISING_DMA NXP_WUU_PIN(16, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
488
#define NXP_WUU_PIN_16_RISING_TRIGGER NXP_WUU_PIN(16, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
490
#define NXP_WUU_PIN_16_FALLING_INT NXP_WUU_PIN(16, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
492
#define NXP_WUU_PIN_16_FALLING_DMA NXP_WUU_PIN(16, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
494
#define NXP_WUU_PIN_16_FALLING_TRIGGER NXP_WUU_PIN(16, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
496
#define NXP_WUU_PIN_16_ANY_INT NXP_WUU_PIN(16, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
498
#define NXP_WUU_PIN_16_ANY_DMA NXP_WUU_PIN(16, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
500
#define NXP_WUU_PIN_16_ANY_TRIGGER NXP_WUU_PIN(16, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
501
502
/* Pin 17 wakeup sources */
504
#define NXP_WUU_PIN_17_RISING_INT NXP_WUU_PIN(17, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
506
#define NXP_WUU_PIN_17_RISING_DMA NXP_WUU_PIN(17, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
508
#define NXP_WUU_PIN_17_RISING_TRIGGER NXP_WUU_PIN(17, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
510
#define NXP_WUU_PIN_17_FALLING_INT NXP_WUU_PIN(17, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
512
#define NXP_WUU_PIN_17_FALLING_DMA NXP_WUU_PIN(17, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
514
#define NXP_WUU_PIN_17_FALLING_TRIGGER NXP_WUU_PIN(17, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
516
#define NXP_WUU_PIN_17_ANY_INT NXP_WUU_PIN(17, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
518
#define NXP_WUU_PIN_17_ANY_DMA NXP_WUU_PIN(17, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
520
#define NXP_WUU_PIN_17_ANY_TRIGGER NXP_WUU_PIN(17, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
521
522
/* Pin 18 wakeup sources */
524
#define NXP_WUU_PIN_18_RISING_INT NXP_WUU_PIN(18, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
526
#define NXP_WUU_PIN_18_RISING_DMA NXP_WUU_PIN(18, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
528
#define NXP_WUU_PIN_18_RISING_TRIGGER NXP_WUU_PIN(18, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
530
#define NXP_WUU_PIN_18_FALLING_INT NXP_WUU_PIN(18, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
532
#define NXP_WUU_PIN_18_FALLING_DMA NXP_WUU_PIN(18, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
534
#define NXP_WUU_PIN_18_FALLING_TRIGGER NXP_WUU_PIN(18, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
536
#define NXP_WUU_PIN_18_ANY_INT NXP_WUU_PIN(18, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
538
#define NXP_WUU_PIN_18_ANY_DMA NXP_WUU_PIN(18, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
540
#define NXP_WUU_PIN_18_ANY_TRIGGER NXP_WUU_PIN(18, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
541
542
/* Pin 19 wakeup sources */
544
#define NXP_WUU_PIN_19_RISING_INT NXP_WUU_PIN(19, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
546
#define NXP_WUU_PIN_19_RISING_DMA NXP_WUU_PIN(19, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
548
#define NXP_WUU_PIN_19_RISING_TRIGGER NXP_WUU_PIN(19, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
550
#define NXP_WUU_PIN_19_FALLING_INT NXP_WUU_PIN(19, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
552
#define NXP_WUU_PIN_19_FALLING_DMA NXP_WUU_PIN(19, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
554
#define NXP_WUU_PIN_19_FALLING_TRIGGER NXP_WUU_PIN(19, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
556
#define NXP_WUU_PIN_19_ANY_INT NXP_WUU_PIN(19, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
558
#define NXP_WUU_PIN_19_ANY_DMA NXP_WUU_PIN(19, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
560
#define NXP_WUU_PIN_19_ANY_TRIGGER NXP_WUU_PIN(19, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
561
562
/* Pin 20 wakeup sources */
564
#define NXP_WUU_PIN_20_RISING_INT NXP_WUU_PIN(20, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
566
#define NXP_WUU_PIN_20_RISING_DMA NXP_WUU_PIN(20, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
568
#define NXP_WUU_PIN_20_RISING_TRIGGER NXP_WUU_PIN(20, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
570
#define NXP_WUU_PIN_20_FALLING_INT NXP_WUU_PIN(20, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
572
#define NXP_WUU_PIN_20_FALLING_DMA NXP_WUU_PIN(20, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
574
#define NXP_WUU_PIN_20_FALLING_TRIGGER NXP_WUU_PIN(20, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
576
#define NXP_WUU_PIN_20_ANY_INT NXP_WUU_PIN(20, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
578
#define NXP_WUU_PIN_20_ANY_DMA NXP_WUU_PIN(20, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
580
#define NXP_WUU_PIN_20_ANY_TRIGGER NXP_WUU_PIN(20, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
581
582
/* Pin 21 wakeup sources */
584
#define NXP_WUU_PIN_21_RISING_INT NXP_WUU_PIN(21, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
586
#define NXP_WUU_PIN_21_RISING_DMA NXP_WUU_PIN(21, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
588
#define NXP_WUU_PIN_21_RISING_TRIGGER NXP_WUU_PIN(21, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
590
#define NXP_WUU_PIN_21_FALLING_INT NXP_WUU_PIN(21, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
592
#define NXP_WUU_PIN_21_FALLING_DMA NXP_WUU_PIN(21, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
594
#define NXP_WUU_PIN_21_FALLING_TRIGGER NXP_WUU_PIN(21, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
596
#define NXP_WUU_PIN_21_ANY_INT NXP_WUU_PIN(21, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
598
#define NXP_WUU_PIN_21_ANY_DMA NXP_WUU_PIN(21, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
600
#define NXP_WUU_PIN_21_ANY_TRIGGER NXP_WUU_PIN(21, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
601
602
/* Pin 22 wakeup sources */
604
#define NXP_WUU_PIN_22_RISING_INT NXP_WUU_PIN(22, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
606
#define NXP_WUU_PIN_22_RISING_DMA NXP_WUU_PIN(22, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
608
#define NXP_WUU_PIN_22_RISING_TRIGGER NXP_WUU_PIN(22, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
610
#define NXP_WUU_PIN_22_FALLING_INT NXP_WUU_PIN(22, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
612
#define NXP_WUU_PIN_22_FALLING_DMA NXP_WUU_PIN(22, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
614
#define NXP_WUU_PIN_22_FALLING_TRIGGER NXP_WUU_PIN(22, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
616
#define NXP_WUU_PIN_22_ANY_INT NXP_WUU_PIN(22, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
618
#define NXP_WUU_PIN_22_ANY_DMA NXP_WUU_PIN(22, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
620
#define NXP_WUU_PIN_22_ANY_TRIGGER NXP_WUU_PIN(22, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
621
622
/* Pin 23 wakeup sources */
624
#define NXP_WUU_PIN_23_RISING_INT NXP_WUU_PIN(23, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
626
#define NXP_WUU_PIN_23_RISING_DMA NXP_WUU_PIN(23, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
628
#define NXP_WUU_PIN_23_RISING_TRIGGER NXP_WUU_PIN(23, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
630
#define NXP_WUU_PIN_23_FALLING_INT NXP_WUU_PIN(23, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
632
#define NXP_WUU_PIN_23_FALLING_DMA NXP_WUU_PIN(23, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
634
#define NXP_WUU_PIN_23_FALLING_TRIGGER NXP_WUU_PIN(23, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
636
#define NXP_WUU_PIN_23_ANY_INT NXP_WUU_PIN(23, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
638
#define NXP_WUU_PIN_23_ANY_DMA NXP_WUU_PIN(23, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
640
#define NXP_WUU_PIN_23_ANY_TRIGGER NXP_WUU_PIN(23, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
641
642
/* Pin 24 wakeup sources */
644
#define NXP_WUU_PIN_24_RISING_INT NXP_WUU_PIN(24, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
646
#define NXP_WUU_PIN_24_RISING_DMA NXP_WUU_PIN(24, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
648
#define NXP_WUU_PIN_24_RISING_TRIGGER NXP_WUU_PIN(24, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
650
#define NXP_WUU_PIN_24_FALLING_INT NXP_WUU_PIN(24, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
652
#define NXP_WUU_PIN_24_FALLING_DMA NXP_WUU_PIN(24, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
654
#define NXP_WUU_PIN_24_FALLING_TRIGGER NXP_WUU_PIN(24, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
656
#define NXP_WUU_PIN_24_ANY_INT NXP_WUU_PIN(24, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
658
#define NXP_WUU_PIN_24_ANY_DMA NXP_WUU_PIN(24, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
660
#define NXP_WUU_PIN_24_ANY_TRIGGER NXP_WUU_PIN(24, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
661
662
/* Pin 25 wakeup sources */
664
#define NXP_WUU_PIN_25_RISING_INT NXP_WUU_PIN(25, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
666
#define NXP_WUU_PIN_25_RISING_DMA NXP_WUU_PIN(25, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
668
#define NXP_WUU_PIN_25_RISING_TRIGGER NXP_WUU_PIN(25, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
670
#define NXP_WUU_PIN_25_FALLING_INT NXP_WUU_PIN(25, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
672
#define NXP_WUU_PIN_25_FALLING_DMA NXP_WUU_PIN(25, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
674
#define NXP_WUU_PIN_25_FALLING_TRIGGER NXP_WUU_PIN(25, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
676
#define NXP_WUU_PIN_25_ANY_INT NXP_WUU_PIN(25, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
678
#define NXP_WUU_PIN_25_ANY_DMA NXP_WUU_PIN(25, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
680
#define NXP_WUU_PIN_25_ANY_TRIGGER NXP_WUU_PIN(25, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
681
682
/* Pin 26 wakeup sources */
684
#define NXP_WUU_PIN_26_RISING_INT NXP_WUU_PIN(26, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
686
#define NXP_WUU_PIN_26_RISING_DMA NXP_WUU_PIN(26, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
688
#define NXP_WUU_PIN_26_RISING_TRIGGER NXP_WUU_PIN(26, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
690
#define NXP_WUU_PIN_26_FALLING_INT NXP_WUU_PIN(26, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
692
#define NXP_WUU_PIN_26_FALLING_DMA NXP_WUU_PIN(26, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
694
#define NXP_WUU_PIN_26_FALLING_TRIGGER NXP_WUU_PIN(26, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
696
#define NXP_WUU_PIN_26_ANY_INT NXP_WUU_PIN(26, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
698
#define NXP_WUU_PIN_26_ANY_DMA NXP_WUU_PIN(26, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
700
#define NXP_WUU_PIN_26_ANY_TRIGGER NXP_WUU_PIN(26, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
701
702
/* Pin 27 wakeup sources */
704
#define NXP_WUU_PIN_27_RISING_INT NXP_WUU_PIN(27, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
706
#define NXP_WUU_PIN_27_RISING_DMA NXP_WUU_PIN(27, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
708
#define NXP_WUU_PIN_27_RISING_TRIGGER NXP_WUU_PIN(27, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
710
#define NXP_WUU_PIN_27_FALLING_INT NXP_WUU_PIN(27, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
712
#define NXP_WUU_PIN_27_FALLING_DMA NXP_WUU_PIN(27, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
714
#define NXP_WUU_PIN_27_FALLING_TRIGGER NXP_WUU_PIN(27, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
716
#define NXP_WUU_PIN_27_ANY_INT NXP_WUU_PIN(27, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
718
#define NXP_WUU_PIN_27_ANY_DMA NXP_WUU_PIN(27, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
720
#define NXP_WUU_PIN_27_ANY_TRIGGER NXP_WUU_PIN(27, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
721
722
/* Pin 28 wakeup sources */
724
#define NXP_WUU_PIN_28_RISING_INT NXP_WUU_PIN(28, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
726
#define NXP_WUU_PIN_28_RISING_DMA NXP_WUU_PIN(28, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
728
#define NXP_WUU_PIN_28_RISING_TRIGGER NXP_WUU_PIN(28, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
730
#define NXP_WUU_PIN_28_FALLING_INT NXP_WUU_PIN(28, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
732
#define NXP_WUU_PIN_28_FALLING_DMA NXP_WUU_PIN(28, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
734
#define NXP_WUU_PIN_28_FALLING_TRIGGER NXP_WUU_PIN(28, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
736
#define NXP_WUU_PIN_28_ANY_INT NXP_WUU_PIN(28, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
738
#define NXP_WUU_PIN_28_ANY_DMA NXP_WUU_PIN(28, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
740
#define NXP_WUU_PIN_28_ANY_TRIGGER NXP_WUU_PIN(28, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
741
742
/* Pin 29 wakeup sources */
744
#define NXP_WUU_PIN_29_RISING_INT NXP_WUU_PIN(29, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
746
#define NXP_WUU_PIN_29_RISING_DMA NXP_WUU_PIN(29, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
748
#define NXP_WUU_PIN_29_RISING_TRIGGER NXP_WUU_PIN(29, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
750
#define NXP_WUU_PIN_29_FALLING_INT NXP_WUU_PIN(29, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
752
#define NXP_WUU_PIN_29_FALLING_DMA NXP_WUU_PIN(29, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
754
#define NXP_WUU_PIN_29_FALLING_TRIGGER NXP_WUU_PIN(29, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
756
#define NXP_WUU_PIN_29_ANY_INT NXP_WUU_PIN(29, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
758
#define NXP_WUU_PIN_29_ANY_DMA NXP_WUU_PIN(29, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
760
#define NXP_WUU_PIN_29_ANY_TRIGGER NXP_WUU_PIN(29, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
761
762
/* Pin 30 wakeup sources */
764
#define NXP_WUU_PIN_30_RISING_INT NXP_WUU_PIN(30, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
766
#define NXP_WUU_PIN_30_RISING_DMA NXP_WUU_PIN(30, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
768
#define NXP_WUU_PIN_30_RISING_TRIGGER NXP_WUU_PIN(30, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
770
#define NXP_WUU_PIN_30_FALLING_INT NXP_WUU_PIN(30, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
772
#define NXP_WUU_PIN_30_FALLING_DMA NXP_WUU_PIN(30, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
774
#define NXP_WUU_PIN_30_FALLING_TRIGGER NXP_WUU_PIN(30, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
776
#define NXP_WUU_PIN_30_ANY_INT NXP_WUU_PIN(30, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
778
#define NXP_WUU_PIN_30_ANY_DMA NXP_WUU_PIN(30, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
780
#define NXP_WUU_PIN_30_ANY_TRIGGER NXP_WUU_PIN(30, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
781
782
/* Pin 31 wakeup sources */
784
#define NXP_WUU_PIN_31_RISING_INT NXP_WUU_PIN(31, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_INT)
786
#define NXP_WUU_PIN_31_RISING_DMA NXP_WUU_PIN(31, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_DMA)
788
#define NXP_WUU_PIN_31_RISING_TRIGGER NXP_WUU_PIN(31, NXP_WUU_EDGE_RISING, NXP_WUU_EVENT_TRIGGER)
790
#define NXP_WUU_PIN_31_FALLING_INT NXP_WUU_PIN(31, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_INT)
792
#define NXP_WUU_PIN_31_FALLING_DMA NXP_WUU_PIN(31, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_DMA)
794
#define NXP_WUU_PIN_31_FALLING_TRIGGER NXP_WUU_PIN(31, NXP_WUU_EDGE_FALLING, NXP_WUU_EVENT_TRIGGER)
796
#define NXP_WUU_PIN_31_ANY_INT NXP_WUU_PIN(31, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_INT)
798
#define NXP_WUU_PIN_31_ANY_DMA NXP_WUU_PIN(31, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_DMA)
800
#define NXP_WUU_PIN_31_ANY_TRIGGER NXP_WUU_PIN(31, NXP_WUU_EDGE_ANY, NXP_WUU_EVENT_TRIGGER)
801
802
#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_WUC_NXP_WUU_H_ */
zephyr
dt-bindings
wuc
wuc_nxp_wuu.h
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