This is the documentation for the latest (main) development branch of Zephyr. If you are looking for the documentation of previous releases, use the drop-down menu on the left and select the desired version.

microchip,xec-espi-host-dev (on espi bus)

Vendor: Microchip Technology Inc.

Description

Microchip XEC eSPI Host devices

Properties

Properties not inherited from the base binding file.

Name

Type

Details

ldn

int

logical device number

This property is required.

girqs

array

array of GIRQ and bit positions

pcrs

array

PCR sleep register index and bit position

host-io

int

Logical device Host I/O (x86) base. Refer to SoC documentation for the
number of I/O decoders implemented by a device (1 or 2) and the fixed
I/O masks.

host-io-addr-mask

int

Host I/O address mask. This value is fixed for all HW and is only
used by Port80 BIOS debug alias device to specify the byte lane the
alias address is mapped to in the 80h to 83h I/O range.

host-mem

int

Logical device Host memory (x86) base address. Refer to SoC
documentation for which logical devices implement a memory decoder
and the fixed memory address masking.

emi-mems

array

Each EMI host device supports Host access to two SoC data memory
regions. Each region requires three configuration parameters:
Base address in the SoC data memory, read limit, and write limit.
If bits[14:2] of the address written by the Host to the EC address
register is less than the limit value the access is allowed. Bit[15]
of the EC address selects which of the two memory regions is accessed.

emi-mem-cells

int

Constant value: 3

#girq-cells

int

Constant value: 1

#pcr-cells

int

Constant value: 2

Specifier cell names

  • emi-mem cells: base, rdlimit, wrlimit

  • girq cells: girqinfo

  • pcr cells: reg_idx, bitpos