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st,stm32-qspi

Vendor: STMicroelectronics

Description

These nodes are “qspi” bus nodes.

STM32 QSPI device representation. A stm32 quadspi node would typically
looks to this:

    &quadspi {
        pinctrl-0 = <&quadspi_clk_pe10 &quadspi_ncs_pe11
                     &quadspi_bk1_io0_pe12 &quadspi_bk1_io1_pe13
                     &quadspi_bk1_io2_pe14 &quadspi_bk1_io3_pe15>;

        dmas = <&dma1 5 5 0x0000 0x03>;
        dma-names = "tx_rx";

        status = "okay";
    };

Properties

Properties not inherited from the base binding file.

Name

Type

Details

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

This property is required.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

This property is required.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.