This is the documentation for the latest (main) development branch of Zephyr. If you are looking for the documentation of previous releases, use the drop-down menu on the left and select the desired version.

CONFIG_CLOCK_STM32_PLL3_R_ENABLE

Enable PLL3 R output

Type: bool

Help

Enable PLL3 R output.

Direct dependencies

CLOCK_STM32_PLL3_ENABLE && SOC_SERIES_STM32H7X && !CLOCK_CONTROL_STM32_HAS_DTS && !SOC_SERIES_STM32MP1X && CLOCK_CONTROL_STM32_CUBE && CLOCK_CONTROL

(Includes any dependencies from ifs and menus.)

Defaults

No defaults. Implicitly defaults to n.

Kconfig definition

At drivers/clock_control/Kconfig.stm32h7:156

Included via Kconfig:8Kconfig.zephyr:40drivers/Kconfig:54drivers/clock_control/Kconfig:25drivers/clock_control/Kconfig.stm32:153

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control → Enable PLL3

config CLOCK_STM32_PLL3_R_ENABLE
    bool "Enable PLL3 R output"
    depends on CLOCK_STM32_PLL3_ENABLE && SOC_SERIES_STM32H7X && !CLOCK_CONTROL_STM32_HAS_DTS && !SOC_SERIES_STM32MP1X && CLOCK_CONTROL_STM32_CUBE && CLOCK_CONTROL
    help
      Enable PLL3 R output.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)